JPS54150049A - Pre-fetch order control system - Google Patents
Pre-fetch order control systemInfo
- Publication number
- JPS54150049A JPS54150049A JP5933878A JP5933878A JPS54150049A JP S54150049 A JPS54150049 A JP S54150049A JP 5933878 A JP5933878 A JP 5933878A JP 5933878 A JP5933878 A JP 5933878A JP S54150049 A JPS54150049 A JP S54150049A
- Authority
- JP
- Japan
- Prior art keywords
- order
- address
- register
- contents
- store
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Advance Control (AREA)
Abstract
PURPOSE: To enhance the process capacity for the pre-fetch order control with a simple constitution by providing the order address register, the address holding register and the comparator circuit each and then detecting the coincidence between the order address and the store address.
CONSTITUTION: The m-units (m = 4 in this instance) of order which are read out based on the contents of order address register 6-0 and 6-1 is stored into pre-fetch order buffer 1. The calculation is given to the operand address in which the contents sent from input register 3 is supplied to adder 4, and the address advances between address holding registers 5-1W5-3 corresponding to the process stages of the order. In case the order is the store order, a comparison is given between the calculated store address and the contents of register 6-0 and 6-1 at comparator 9-1 and 9-2, and at the same time the store address of the m - 1st holding register 5-3 is compared with the contents of register 6-1 and 6-2 at comparator 10-1 and 10-2. And when a coincidence is obtained, the rereading is carried out for the order. As a result, the return to the original state is not required in case an overlap is detected, thus enchancing the process capacity.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5933878A JPS54150049A (en) | 1978-05-18 | 1978-05-18 | Pre-fetch order control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5933878A JPS54150049A (en) | 1978-05-18 | 1978-05-18 | Pre-fetch order control system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54150049A true JPS54150049A (en) | 1979-11-24 |
JPS5747450B2 JPS5747450B2 (en) | 1982-10-09 |
Family
ID=13110425
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5933878A Granted JPS54150049A (en) | 1978-05-18 | 1978-05-18 | Pre-fetch order control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54150049A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60138642A (en) * | 1983-12-27 | 1985-07-23 | Hitachi Ltd | Information processor |
JPH06214799A (en) * | 1992-05-06 | 1994-08-05 | Internatl Business Mach Corp <Ibm> | Method and apparatus for improvement of performance of random-sequence loading operation in computer system |
WO2002035356A1 (en) * | 2000-10-25 | 2002-05-02 | Assabet Ventures | Rapid configuration verification in a multi-component system |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58147421U (en) * | 1982-03-31 | 1983-10-04 | 小坂 郁夫 | school bag |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4912742A (en) * | 1972-05-09 | 1974-02-04 | ||
JPS4946347A (en) * | 1972-09-06 | 1974-05-02 |
-
1978
- 1978-05-18 JP JP5933878A patent/JPS54150049A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4912742A (en) * | 1972-05-09 | 1974-02-04 | ||
JPS4946347A (en) * | 1972-09-06 | 1974-05-02 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60138642A (en) * | 1983-12-27 | 1985-07-23 | Hitachi Ltd | Information processor |
JPH0552533B2 (en) * | 1983-12-27 | 1993-08-05 | Hitachi Ltd | |
JPH06214799A (en) * | 1992-05-06 | 1994-08-05 | Internatl Business Mach Corp <Ibm> | Method and apparatus for improvement of performance of random-sequence loading operation in computer system |
WO2002035356A1 (en) * | 2000-10-25 | 2002-05-02 | Assabet Ventures | Rapid configuration verification in a multi-component system |
Also Published As
Publication number | Publication date |
---|---|
JPS5747450B2 (en) | 1982-10-09 |
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