JPS5750060A - Memory controlling circuit - Google Patents
Memory controlling circuitInfo
- Publication number
- JPS5750060A JPS5750060A JP12578480A JP12578480A JPS5750060A JP S5750060 A JPS5750060 A JP S5750060A JP 12578480 A JP12578480 A JP 12578480A JP 12578480 A JP12578480 A JP 12578480A JP S5750060 A JPS5750060 A JP S5750060A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- address
- gate12
- constitution
- high speed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0615—Address space extension
- G06F12/0623—Address space extension for memory modules
Abstract
PURPOSE:To execute a memory access exceeding a boundary of a memory address, by means of a few hardware and also at a high speed. CONSTITUTION:In a processing equipment provided with a memory by which an address is assigned in a byte unit, and a memory access is executed in a unit >=2 bytes, a memory address register inputs an end signal END1 to an AND gate 12 when the first memory cycle ends. It is discriminated by the AND gate12 that the memory access exceeds the address boundary. When an output of the gate12 become ''1'', an FF13 is set, the memory starts the second memory cycle by a memory starting circuit 15. According to this constitution, contents of the memory address register are returned to its initial value at a high speed without requiring a subtracter, etc., and also without executing a subtraction processing by a microprogram.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12578480A JPS6017131B2 (en) | 1980-09-10 | 1980-09-10 | memory control circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12578480A JPS6017131B2 (en) | 1980-09-10 | 1980-09-10 | memory control circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5750060A true JPS5750060A (en) | 1982-03-24 |
JPS6017131B2 JPS6017131B2 (en) | 1985-05-01 |
Family
ID=14918763
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12578480A Expired JPS6017131B2 (en) | 1980-09-10 | 1980-09-10 | memory control circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6017131B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6019241A (en) * | 1983-07-12 | 1985-01-31 | Fujitsu Ltd | Boundary error detecting system for assembler instruction |
JPS62174842A (en) * | 1986-01-29 | 1987-07-31 | Hitachi Ltd | Data processor |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6364228U (en) * | 1986-10-16 | 1988-04-27 |
-
1980
- 1980-09-10 JP JP12578480A patent/JPS6017131B2/en not_active Expired
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6019241A (en) * | 1983-07-12 | 1985-01-31 | Fujitsu Ltd | Boundary error detecting system for assembler instruction |
JPH0756632B2 (en) * | 1983-07-12 | 1995-06-14 | 富士通株式会社 | Assembler instruction boundary error detection processing method |
JPS62174842A (en) * | 1986-01-29 | 1987-07-31 | Hitachi Ltd | Data processor |
Also Published As
Publication number | Publication date |
---|---|
JPS6017131B2 (en) | 1985-05-01 |
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