JPS54148340A - Memory circuit - Google Patents
Memory circuitInfo
- Publication number
- JPS54148340A JPS54148340A JP5676378A JP5676378A JPS54148340A JP S54148340 A JPS54148340 A JP S54148340A JP 5676378 A JP5676378 A JP 5676378A JP 5676378 A JP5676378 A JP 5676378A JP S54148340 A JPS54148340 A JP S54148340A
- Authority
- JP
- Japan
- Prior art keywords
- digit line
- output
- circuit
- plus
- memory cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Static Random-Access Memory (AREA)
Abstract
PURPOSE:To reduce the load capacity of the digit line as well as to increase the detection sesitivity for the memory circuit using the insulator gate type FET. CONSTITUTION:MOS sense amplifier 5 is composed with MOS transistors Q1 and Q2 which are connected in cross. In this circuit 5, memory cell C0 and C2 plus digit line 1 connected to dummy cell DS0 is connected to the gate of TrQ2 via the input/ output of MOSTrQ3, and at the same time digit line 2 connected to dummy cell DS1 plus memory cell C1 and C2 are connected to the gate of TrQ2 in circuit 5 via the input/output of TrQ4. Furthermore, memory cell C4 and C6 plus digit line 3 connected to dummy cell DS2 and digit line 4 connected to dummy cell DS3 plus memory cell C5 and C7 are connected to the gates of TrQ2 and Q1 of circuit 5 respectively via TrQ5 and Q6. Then address A2 of the gates of TrQ3 and Q4 are connected to output DSL0 and then to output DSL2 via address A2 of the gates of TrQ5 and Q6.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5676378A JPS54148340A (en) | 1978-05-12 | 1978-05-12 | Memory circuit |
DE2919166A DE2919166C2 (en) | 1978-05-12 | 1979-05-11 | Storage device |
US06/237,815 US4366559A (en) | 1978-05-12 | 1981-02-24 | Memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5676378A JPS54148340A (en) | 1978-05-12 | 1978-05-12 | Memory circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54148340A true JPS54148340A (en) | 1979-11-20 |
JPS6146918B2 JPS6146918B2 (en) | 1986-10-16 |
Family
ID=13036524
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5676378A Granted JPS54148340A (en) | 1978-05-12 | 1978-05-12 | Memory circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54148340A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5792486A (en) * | 1980-10-10 | 1982-06-09 | Inmos Corp | Folded bit line-common use sensing amplifier structure in mos memory |
JPS5823474A (en) * | 1981-08-05 | 1983-02-12 | Fujitsu Ltd | Semiconductor memory storage |
JPS60145594A (en) * | 1984-01-09 | 1985-08-01 | Nec Corp | Semiconductor memory device |
USRE32682E (en) * | 1980-10-10 | 1988-05-31 | Inmos Corporation | Folded bit line-shared sense amplifiers |
JPS63153792A (en) * | 1986-12-17 | 1988-06-27 | Sharp Corp | Semiconductor memory device |
JPH03116486A (en) * | 1990-05-18 | 1991-05-17 | Hitachi Ltd | Semiconductor memory device |
JPH0765583A (en) * | 1993-08-26 | 1995-03-10 | Nec Corp | Semiconductor storage device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50102231A (en) * | 1974-01-09 | 1975-08-13 | ||
JPS5350944A (en) * | 1976-10-20 | 1978-05-09 | Siemens Ag | Mos semiconductor memory |
-
1978
- 1978-05-12 JP JP5676378A patent/JPS54148340A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50102231A (en) * | 1974-01-09 | 1975-08-13 | ||
JPS5350944A (en) * | 1976-10-20 | 1978-05-09 | Siemens Ag | Mos semiconductor memory |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5792486A (en) * | 1980-10-10 | 1982-06-09 | Inmos Corp | Folded bit line-common use sensing amplifier structure in mos memory |
USRE32682E (en) * | 1980-10-10 | 1988-05-31 | Inmos Corporation | Folded bit line-shared sense amplifiers |
JPH0115957B2 (en) * | 1980-10-10 | 1989-03-22 | Inmos Corp | |
JPS5823474A (en) * | 1981-08-05 | 1983-02-12 | Fujitsu Ltd | Semiconductor memory storage |
JPH0334663B2 (en) * | 1981-08-05 | 1991-05-23 | Fujitsu Ltd | |
JPS60145594A (en) * | 1984-01-09 | 1985-08-01 | Nec Corp | Semiconductor memory device |
JPS63153792A (en) * | 1986-12-17 | 1988-06-27 | Sharp Corp | Semiconductor memory device |
JPH03116486A (en) * | 1990-05-18 | 1991-05-17 | Hitachi Ltd | Semiconductor memory device |
JPH0765583A (en) * | 1993-08-26 | 1995-03-10 | Nec Corp | Semiconductor storage device |
Also Published As
Publication number | Publication date |
---|---|
JPS6146918B2 (en) | 1986-10-16 |
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