JPS5355969A - Electronic device - Google Patents

Electronic device

Info

Publication number
JPS5355969A
JPS5355969A JP13104176A JP13104176A JPS5355969A JP S5355969 A JPS5355969 A JP S5355969A JP 13104176 A JP13104176 A JP 13104176A JP 13104176 A JP13104176 A JP 13104176A JP S5355969 A JPS5355969 A JP S5355969A
Authority
JP
Japan
Prior art keywords
electronic device
lead frame
secure
pad
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13104176A
Other languages
Japanese (ja)
Inventor
Kanemitsu Kubota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Epson Corp
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK, Epson Corp filed Critical Seiko Epson Corp
Priority to JP13104176A priority Critical patent/JPS5355969A/en
Publication of JPS5355969A publication Critical patent/JPS5355969A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29499Shape or distribution of the fillers

Abstract

PURPOSE: To secure an electric conduction between each pad of IC and the lead frame, thick film or thin circuit by just pressing the IC chip to the lead frame or onto the print wiring via the conductive anisotropic elastic substance.
COPYRIGHT: (C)1978,JPO&Japio
JP13104176A 1976-10-29 1976-10-29 Electronic device Pending JPS5355969A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13104176A JPS5355969A (en) 1976-10-29 1976-10-29 Electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13104176A JPS5355969A (en) 1976-10-29 1976-10-29 Electronic device

Publications (1)

Publication Number Publication Date
JPS5355969A true JPS5355969A (en) 1978-05-20

Family

ID=15048628

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13104176A Pending JPS5355969A (en) 1976-10-29 1976-10-29 Electronic device

Country Status (1)

Country Link
JP (1) JPS5355969A (en)

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