JPS5296875A - Mos type memory device - Google Patents
Mos type memory deviceInfo
- Publication number
- JPS5296875A JPS5296875A JP1305176A JP1305176A JPS5296875A JP S5296875 A JPS5296875 A JP S5296875A JP 1305176 A JP1305176 A JP 1305176A JP 1305176 A JP1305176 A JP 1305176A JP S5296875 A JPS5296875 A JP S5296875A
- Authority
- JP
- Japan
- Prior art keywords
- memory device
- type memory
- mos type
- loss
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Element Separation (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Abstract
PURPOSE:To decrease leakage current and loss and to increase the voltage, by making hold the electric charge on the gate insulating film under a plural number of gate electrodes crossing each other, between the source and drain domain.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP51013051A JPS6035829B2 (en) | 1976-02-09 | 1976-02-09 | memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP51013051A JPS6035829B2 (en) | 1976-02-09 | 1976-02-09 | memory device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5296875A true JPS5296875A (en) | 1977-08-15 |
JPS6035829B2 JPS6035829B2 (en) | 1985-08-16 |
Family
ID=11822317
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP51013051A Expired JPS6035829B2 (en) | 1976-02-09 | 1976-02-09 | memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6035829B2 (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6085155A (en) * | 1983-10-13 | 1985-05-14 | 理研軽金属工業株式会社 | Top beam apparatus for attaching pillar of handrail or fence |
JPS62260954A (en) * | 1986-04-11 | 1987-11-13 | 理研軽金属工業株式会社 | Top beam |
JPS62260953A (en) * | 1986-04-11 | 1987-11-13 | 理研軽金属工業株式会社 | Top beam |
JPS62253856A (en) * | 1986-04-25 | 1987-11-05 | 株式会社ツヅキ | Top beam mount method |
JPH0510097Y2 (en) * | 1988-03-15 | 1993-03-12 | ||
JPH0544420Y2 (en) * | 1988-07-20 | 1993-11-11 | ||
JPH0520827Y2 (en) * | 1989-03-24 | 1993-05-28 |
-
1976
- 1976-02-09 JP JP51013051A patent/JPS6035829B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS6035829B2 (en) | 1985-08-16 |
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