JPS5259576A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5259576A
JPS5259576A JP50136009A JP13600975A JPS5259576A JP S5259576 A JPS5259576 A JP S5259576A JP 50136009 A JP50136009 A JP 50136009A JP 13600975 A JP13600975 A JP 13600975A JP S5259576 A JPS5259576 A JP S5259576A
Authority
JP
Japan
Prior art keywords
semiconductor device
depositing
film
semiconductor substrate
face
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50136009A
Other languages
Japanese (ja)
Other versions
JPS5340873B2 (en
Inventor
Masaru Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP50136009A priority Critical patent/JPS5259576A/en
Publication of JPS5259576A publication Critical patent/JPS5259576A/en
Publication of JPS5340873B2 publication Critical patent/JPS5340873B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE: To eliminate shorting accidents owing to conductive foreign materials at the time of face-down bonding by depositing an Si3N4 film on the rear of a semiconductor substrate where there are no circuit wirings.
COPYRIGHT: (C)1977,JPO&Japio
JP50136009A 1975-11-11 1975-11-11 Semiconductor device Granted JPS5259576A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50136009A JPS5259576A (en) 1975-11-11 1975-11-11 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50136009A JPS5259576A (en) 1975-11-11 1975-11-11 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5259576A true JPS5259576A (en) 1977-05-17
JPS5340873B2 JPS5340873B2 (en) 1978-10-30

Family

ID=15165041

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50136009A Granted JPS5259576A (en) 1975-11-11 1975-11-11 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5259576A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5488076A (en) * 1977-12-24 1979-07-12 Fuji Electric Co Ltd Manufacture for semiconductor device

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56171230U (en) * 1980-05-19 1981-12-17
JPS5950726U (en) * 1982-09-29 1984-04-04 池田物産株式会社 Interior material

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5488076A (en) * 1977-12-24 1979-07-12 Fuji Electric Co Ltd Manufacture for semiconductor device

Also Published As

Publication number Publication date
JPS5340873B2 (en) 1978-10-30

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