JPS4914052A - - Google Patents

Info

Publication number
JPS4914052A
JPS4914052A JP4887672A JP4887672A JPS4914052A JP S4914052 A JPS4914052 A JP S4914052A JP 4887672 A JP4887672 A JP 4887672A JP 4887672 A JP4887672 A JP 4887672A JP S4914052 A JPS4914052 A JP S4914052A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4887672A
Other languages
Japanese (ja)
Other versions
JPS5240937B2 (it
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4887672A priority Critical patent/JPS5240937B2/ja
Priority to FR7317551A priority patent/FR2184865B1/fr
Priority to IT2413773A priority patent/IT987474B/it
Priority to DE19732324769 priority patent/DE2324769C3/de
Priority to GB2336073A priority patent/GB1438861A/en
Priority to DE19732366250 priority patent/DE2366250C2/de
Priority to DE19732366204 priority patent/DE2366204C2/de
Priority to DE19732366265 priority patent/DE2366265C3/de
Publication of JPS4914052A publication Critical patent/JPS4914052A/ja
Priority to US05/496,190 priority patent/US3962686A/en
Publication of JPS5240937B2 publication Critical patent/JPS5240937B2/ja
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/402—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh
    • G11C11/4023—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh using field effect transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
JP4887672A 1972-05-16 1972-05-16 Expired JPS5240937B2 (it)

Priority Applications (9)

Application Number Priority Date Filing Date Title
JP4887672A JPS5240937B2 (it) 1972-05-16 1972-05-16
FR7317551A FR2184865B1 (it) 1972-05-16 1973-05-15
IT2413773A IT987474B (it) 1972-05-16 1973-05-15 Circuito di memoria con transi stor ad effetto di campo
DE19732366250 DE2366250C2 (de) 1972-05-16 1973-05-16 Speicherschaltung mit Speicherzellen und Adressenleitungen
GB2336073A GB1438861A (en) 1972-05-16 1973-05-16 Memory circuits
DE19732324769 DE2324769C3 (de) 1972-05-16 1973-05-16 Steuerschaltung für einen Datenspeicher mit IG-FET's
DE19732366204 DE2366204C2 (de) 1972-05-16 1973-05-16 Speicherschaltung
DE19732366265 DE2366265C3 (de) 1972-05-16 1973-05-16 Pufferschaltung
US05/496,190 US3962686A (en) 1972-05-16 1974-08-09 Memory circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4887672A JPS5240937B2 (it) 1972-05-16 1972-05-16

Publications (2)

Publication Number Publication Date
JPS4914052A true JPS4914052A (it) 1974-02-07
JPS5240937B2 JPS5240937B2 (it) 1977-10-15

Family

ID=12815473

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4887672A Expired JPS5240937B2 (it) 1972-05-16 1972-05-16

Country Status (5)

Country Link
JP (1) JPS5240937B2 (it)
DE (1) DE2324769C3 (it)
FR (1) FR2184865B1 (it)
GB (1) GB1438861A (it)
IT (1) IT987474B (it)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5011632A (it) * 1973-06-01 1975-02-06
JPS51163830U (it) * 1975-06-20 1976-12-27
JPS5284929A (en) * 1976-01-07 1977-07-14 Hitachi Ltd Memory system
JPS52106640A (en) * 1976-03-05 1977-09-07 Hitachi Ltd Memory peripheral circuit
JPS5325323A (en) * 1976-08-23 1978-03-09 Hitachi Ltd Pre-sense amplifier
JPS5360125A (en) * 1976-11-11 1978-05-30 Nippon Telegr & Teleph Corp <Ntt> Semiconductor memory unit
JPS6075510A (ja) * 1983-09-30 1985-04-27 Mitsubishi Heavy Ind Ltd 連続製鋼炉における冷材スクラツプの供給方法
JPS60242593A (ja) * 1984-05-16 1985-12-02 Hitachi Micro Comput Eng Ltd 半導体記憶装置
JPS61126684A (ja) * 1984-11-26 1986-06-14 Hitachi Ltd メモリを内蔵した半導体集積回路
JPS63275093A (ja) * 1987-05-06 1988-11-11 Nec Corp 半導体記憶装置

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3964030A (en) * 1973-12-10 1976-06-15 Bell Telephone Laboratories, Incorporated Semiconductor memory array
US3969706A (en) * 1974-10-08 1976-07-13 Mostek Corporation Dynamic random access memory misfet integrated circuit
JPS51142925A (en) 1975-06-04 1976-12-08 Hitachi Ltd Address buffer circuit
US4042915A (en) * 1976-04-15 1977-08-16 National Semiconductor Corporation MOS dynamic random access memory having an improved address decoder circuit
JPS5810799B2 (ja) 1976-06-01 1983-02-28 テキサス インスツルメンツ インコ−ポレイテツド 半導体記憶装置
DE2760461C2 (de) * 1976-06-01 1994-04-21 Texas Instruments Inc Schaltungsanordnung für einen Halbleiterspeicher
JPS5453652A (en) * 1977-10-07 1979-04-27 Denyo Co Ltd Battery welder
JPH0124644Y2 (it) * 1979-08-28 1989-07-26
US4539661A (en) * 1982-06-30 1985-09-03 Fujitsu Limited Static-type semiconductor memory device
JPS5956292A (ja) * 1982-09-24 1984-03-31 Hitachi Ltd 半導体記憶装置
JP2511910B2 (ja) * 1986-11-11 1996-07-03 三菱電機株式会社 半導体記憶装置
DE3745016C2 (de) * 1986-11-11 1996-01-18 Mitsubishi Electric Corp Halbleiterspeichereinrichtung
US4926387A (en) * 1988-12-27 1990-05-15 Intel Corporation Memory timing circuit employing scaled-down models of bit lines using reduced number of memory cells
KR100296964B1 (ko) * 1999-06-28 2001-11-01 박종섭 패킷 명령어 구동형 메모리소자
GB2360113B (en) * 2000-03-08 2004-11-10 Seiko Epson Corp Dynamic random access memory

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1100462A (en) * 1963-10-02 1968-01-24 Automatic Telephone & Elect Improvements in or relating to magnetic core matrix data storage devices

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5011632A (it) * 1973-06-01 1975-02-06
JPS51163830U (it) * 1975-06-20 1976-12-27
JPS5545992B2 (it) * 1976-01-07 1980-11-20
JPS5284929A (en) * 1976-01-07 1977-07-14 Hitachi Ltd Memory system
JPS52106640A (en) * 1976-03-05 1977-09-07 Hitachi Ltd Memory peripheral circuit
JPS566062B2 (it) * 1976-03-05 1981-02-09
JPS5325323A (en) * 1976-08-23 1978-03-09 Hitachi Ltd Pre-sense amplifier
JPS5636515B2 (it) * 1976-08-23 1981-08-25
JPS5360125A (en) * 1976-11-11 1978-05-30 Nippon Telegr & Teleph Corp <Ntt> Semiconductor memory unit
JPS6075510A (ja) * 1983-09-30 1985-04-27 Mitsubishi Heavy Ind Ltd 連続製鋼炉における冷材スクラツプの供給方法
JPS60242593A (ja) * 1984-05-16 1985-12-02 Hitachi Micro Comput Eng Ltd 半導体記憶装置
JPS61126684A (ja) * 1984-11-26 1986-06-14 Hitachi Ltd メモリを内蔵した半導体集積回路
JPS63275093A (ja) * 1987-05-06 1988-11-11 Nec Corp 半導体記憶装置

Also Published As

Publication number Publication date
DE2324769B2 (de) 1978-12-21
FR2184865A1 (it) 1973-12-28
DE2324769C3 (de) 1987-07-09
FR2184865B1 (it) 1980-03-07
JPS5240937B2 (it) 1977-10-15
DE2324769A1 (de) 1973-12-06
GB1438861A (en) 1976-06-09
IT987474B (it) 1975-02-20

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