FR2184865B1 - - Google Patents

Info

Publication number
FR2184865B1
FR2184865B1 FR7317551A FR7317551A FR2184865B1 FR 2184865 B1 FR2184865 B1 FR 2184865B1 FR 7317551 A FR7317551 A FR 7317551A FR 7317551 A FR7317551 A FR 7317551A FR 2184865 B1 FR2184865 B1 FR 2184865B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7317551A
Other languages
French (fr)
Other versions
FR2184865A1 (it
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Publication of FR2184865A1 publication Critical patent/FR2184865A1/fr
Application granted granted Critical
Publication of FR2184865B1 publication Critical patent/FR2184865B1/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/402—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh
    • G11C11/4023—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh using field effect transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
FR7317551A 1972-05-16 1973-05-15 Expired FR2184865B1 (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4887672A JPS5240937B2 (it) 1972-05-16 1972-05-16

Publications (2)

Publication Number Publication Date
FR2184865A1 FR2184865A1 (it) 1973-12-28
FR2184865B1 true FR2184865B1 (it) 1980-03-07

Family

ID=12815473

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7317551A Expired FR2184865B1 (it) 1972-05-16 1973-05-15

Country Status (5)

Country Link
JP (1) JPS5240937B2 (it)
DE (1) DE2324769C3 (it)
FR (1) FR2184865B1 (it)
GB (1) GB1438861A (it)
IT (1) IT987474B (it)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5011632A (it) * 1973-06-01 1975-02-06
US3964030A (en) * 1973-12-10 1976-06-15 Bell Telephone Laboratories, Incorporated Semiconductor memory array
US3969706A (en) 1974-10-08 1976-07-13 Mostek Corporation Dynamic random access memory misfet integrated circuit
JPS51142925A (en) 1975-06-04 1976-12-08 Hitachi Ltd Address buffer circuit
JPS51163830U (it) * 1975-06-20 1976-12-27
JPS5284929A (en) * 1976-01-07 1977-07-14 Hitachi Ltd Memory system
JPS52106640A (en) * 1976-03-05 1977-09-07 Hitachi Ltd Memory peripheral circuit
US4042915A (en) * 1976-04-15 1977-08-16 National Semiconductor Corporation MOS dynamic random access memory having an improved address decoder circuit
JPS5810799B2 (ja) 1976-06-01 1983-02-28 テキサス インスツルメンツ インコ−ポレイテツド 半導体記憶装置
DE2760461C2 (de) * 1976-06-01 1994-04-21 Texas Instruments Inc Schaltungsanordnung für einen Halbleiterspeicher
JPS5325323A (en) * 1976-08-23 1978-03-09 Hitachi Ltd Pre-sense amplifier
JPS5360125A (en) * 1976-11-11 1978-05-30 Nippon Telegr & Teleph Corp <Ntt> Semiconductor memory unit
JPS5453652A (en) * 1977-10-07 1979-04-27 Denyo Co Ltd Battery welder
JPH0124644Y2 (it) * 1979-08-28 1989-07-26
US4539661A (en) * 1982-06-30 1985-09-03 Fujitsu Limited Static-type semiconductor memory device
JPS5956292A (ja) * 1982-09-24 1984-03-31 Hitachi Ltd 半導体記憶装置
JPS6075510A (ja) * 1983-09-30 1985-04-27 Mitsubishi Heavy Ind Ltd 連続製鋼炉における冷材スクラツプの供給方法
JPS60242593A (ja) * 1984-05-16 1985-12-02 Hitachi Micro Comput Eng Ltd 半導体記憶装置
JPH0736273B2 (ja) * 1984-11-26 1995-04-19 株式会社日立製作所 半導体集積回路
DE3745016C2 (de) * 1986-11-11 1996-01-18 Mitsubishi Electric Corp Halbleiterspeichereinrichtung
JP2511910B2 (ja) * 1986-11-11 1996-07-03 三菱電機株式会社 半導体記憶装置
JPS63275093A (ja) * 1987-05-06 1988-11-11 Nec Corp 半導体記憶装置
US4926387A (en) * 1988-12-27 1990-05-15 Intel Corporation Memory timing circuit employing scaled-down models of bit lines using reduced number of memory cells
KR100296964B1 (ko) * 1999-06-28 2001-11-01 박종섭 패킷 명령어 구동형 메모리소자
GB2360113B (en) * 2000-03-08 2004-11-10 Seiko Epson Corp Dynamic random access memory

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1100461A (en) * 1963-10-02 1968-01-24 Automatic Telephone & Elect Improvements in or relating to magnetic core matrix data storage devices

Also Published As

Publication number Publication date
FR2184865A1 (it) 1973-12-28
IT987474B (it) 1975-02-20
DE2324769B2 (de) 1978-12-21
GB1438861A (en) 1976-06-09
DE2324769A1 (de) 1973-12-06
JPS5240937B2 (it) 1977-10-15
DE2324769C3 (de) 1987-07-09
JPS4914052A (it) 1974-02-07

Similar Documents

Publication Publication Date Title
FR2184865A1 (it)
JPS4968247U (it)
CH557907A (it)
BG18106A1 (it)
BG18499A1 (it)
BG22072A3 (it)
CH1626173A4 (it)
CH1809873A4 (it)
CH583094A5 (it)
CH561453A5 (it)
CH561786A5 (it)
CH563097A5 (it)
CH564321A5 (it)
CH564392A5 (it)
CH564416A5 (it)
CH564448A5 (it)
CH565978A5 (it)
CH569167A5 (it)
CH570064A5 (it)
CH570176A5 (it)
CH570330A5 (it)
CH570503A5 (it)
CH571764A5 (it)
CH572351A5 (it)
CH572363A5 (it)