JPH1154663A - Resin-sealed semiconductor device and circuit member used therein, and manufacture of circuit member - Google Patents

Abstract

PROBLEM TO BE SOLVED: To increase the chip area in a small package, such as a TSOP(thin small outline package). SOLUTION: This device has a circuit unit 130A where a plurality of leads 133 and 134, integrally connect internal terminal 131 of a semiconductor device 110 and an external terminal 132 to an external circuit independently to each other, in an approximately flat surface. The surfaces of the internal terminal of the semiconductor device 110 and the external terminal are provided on a first surface side of the circuit unit 130A. The thicknesses of the internal terminal 131 and that of the leads 133 and 134 are small, and the thickness of the external terminal 132 is large. The semiconductor device 101 is mounted, via an insulating layer 120 on a surface opposite the terminal side of the circuit unit 130A. The terminal of the semiconductor device 110 and the internal terminal 131 of the circuit unit 130A are wire-connected on the terminal surface side. Further, an internal terminal formation region, etched to have a thin thickness, is further thinned and planarized by coining, and the package is resin- sealed with a part of the external terminal exposed to the outside.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-encapsulated semiconductor device (plastic package) on which a semiconductor element is mounted, and more particularly to a semiconductor device capable of responding to a reduction in package size and improving its mountability. The present invention relates to an apparatus and a manufacturing method thereof.

[0002]

2. Description of the Related Art In recent years, due to the progress of high integration and miniaturization technologies and the tendency of electronic devices to have higher performance and lighter, thinner and smaller size (current trend), semiconductor devices have been represented by LSI ASICs.
It is becoming more and more highly integrated and highly functional. Accordingly, the development trend of the encapsulated semiconductor device using the lead frame is also based on SOJ (Small).
Outline J-Leaded Package)
Through a surface mount type package such as QFP (Quad Flat Package) or TSOP (Thick Flat Package).
n Small Outline Package) to reduce the size of the package, with the main axis being thinner, and to improve chip storage efficiency by making the package three-dimensional, LOC (Lead On Chip)
Structure. However, resin-encapsulated semiconductor devices are required to have more pins, thinner, and smaller as well as higher integration and higher functionality. Due to the routing, the size reduction of packages has reached its limit. Further, in a small package such as TSOP, there is a limit to the number of pins due to lead routing and pin pitch.

[0003]

As described above, further high integration and high functionality of the resin-encapsulated semiconductor device are required, so that the resin-encapsulated semiconductor device has more pins and is thinner. And miniaturization are required. Under such circumstances, the present invention can increase the occupancy of the chip in the package size of the semiconductor device, make the semiconductor device smaller, and reduce the mounting area on the circuit board. It is an object of the present invention to provide a resin-encapsulated semiconductor device capable of improving a mounting density. At the same time, it is intended to further increase the number of pins, which has been difficult for a small package such as a conventional TSOP.

[0004]

According to the present invention, there is provided a resin-encapsulated semiconductor device comprising: an internal terminal portion for electrically connecting a terminal of a semiconductor element; an external terminal portion for connection to an external circuit; A plurality of circuit portions are provided in a substantially plane, each of which has a lead portion for integrally connecting the internal terminal portion and the external terminal portion. The circuit portions are arranged independently of each other. The terminal surface of the terminal is provided on the first surface side of the circuit portion, the circuit portion is provided with a second surface side other than the first surface side along one plane, and the internal terminal portion and the lead portion are The external terminal portion is formed to be thick, and the terminal surface of the external terminal portion is projected from the terminal surface of the internal terminal or the surface of the lead portion, which is not the second surface side. Is to connect the surface of the semiconductor element on the terminal side to the non-terminal side of the circuit via an insulating layer. It is attached and fixed, mounted on the circuit part, electrically connecting the terminal part of the semiconductor element and the terminal surface side of the internal terminal part of the circuit part with a wire, and exposing a part of the external terminal to the outside. A resin-sealed resin-sealed semiconductor device, or a resin in which external electrodes made of solder for mounting on a circuit board or the like are provided on a surface of an external terminal portion exposed to the outside of the resin-sealed semiconductor device. It is a sealed semiconductor device. And in the above, at least the terminal surface area of the internal terminal portion is coined,
It is characterized by being formed in a flat shape. Further, in the above, the terminals of the semiconductor element are arranged along a center line in the middle of a pair of sides of the terminal surface of the semiconductor element, and the internal terminals face each other so as to sandwich the center line. , And are provided respectively. Further, in the above, the resin sealing region is substantially matched to the outer dimensions of the semiconductor element.

[0005] A circuit member according to the present invention comprises an internal terminal for electrically connecting to a terminal of a semiconductor element, an external terminal for connection to an external circuit, and the internal terminal and the external terminal. A plurality of lead parts which are integrally connected to each other, and are disposed independently of each other in a substantially plane, and an external terminal part and an outer frame part which holds the whole outside thereof are connected to the lead part. A resin member for a resin-encapsulated semiconductor device, which is integrally connected via a connection lead different from that of the first embodiment, and wherein the terminal surface of the internal terminal portion and the terminal surface of the external terminal are provided on the first surface side. The second surface side of the member is a material surface along one plane, the internal terminal portion, the lead portion, and the connection lead portion are formed thinner than the thickness of the circuit member material, and the external terminal portion is formed of the circuit member. It is formed with the thickness of the material and is connected to the external circuit of the external terminal section. The terminal surface on the side is protruded from the surface of the lead portion or the surface of the connection lead portion that is not on the second surface side, and at least the terminal surface forming region of the internal terminal portion is coined. It is characterized by being. Then, by half-etching processing, the internal terminal portion and the lead portion forming region and the connection lead portion are made thinner than the thickness of the circuit member material, and the external terminal portion is made the circuit member material thickness so as to form an outer shape. It is characterized by having been done.

According to a method of manufacturing a circuit member of the present invention, an internal terminal portion for electrically connecting a terminal of a semiconductor element, an external terminal portion for connection to an external circuit, the internal terminal portion and an external terminal are provided. And an outer frame that holds a plurality of these in a substantially one plane, each of which is independently disposed, and which holds the entirety outside the external terminal portions and outside thereof. A method of manufacturing a circuit member for a resin-encapsulated semiconductor device in which the first and second portions are integrally connected via connection leads, wherein one surface is used as a material surface by half-etching to form an internal terminal portion and a lead region. The connecting lead portion is thinner than the thickness of the material of the circuit member, the external terminal portion is made to be the thickness of the material of the circuit member, and the outer shape processing is performed, and the internal terminal portion forming region is not on the material surface side. Depress the area including the terminal area, and It is characterized in that it has a coining step of the portions of the surface into a flat shape.

[0007]

The resin-encapsulated semiconductor device of the present invention has the above-described structure, so that the occupancy of the chip in the semiconductor device package size is increased, and the semiconductor device can be made smaller. That is, the mounting area of the semiconductor device on the circuit board is reduced, and the mounting density on the circuit board can be improved. Also, the terminal section is two-dimensionally arranged in a plurality of rows,
By providing a plurality of rows, it is possible to further increase the number of pins, which has been difficult for a small package such as a conventional TSOP. By forming an external electrode portion integrally connected to an external terminal portion with a solder ball, a BGA (Ball) is formed.
(Grid Array) type. Specifically, an internal terminal for electrically connecting to a terminal of the semiconductor element, an external terminal for connection to an external circuit, and the internal terminal and the external terminal are integrally connected. A plurality of lead portions and a plurality of circuit portions arranged independently of each other in a substantially plane; a terminal surface of an internal terminal portion for connection to a semiconductor element of the circuit portion; and an external terminal for connection to an external circuit Is provided on the first surface side of the circuit section, and the semiconductor element is formed by bonding and fixing the surface of the semiconductor element on the terminal side to the non-terminal side of the circuit section via an insulating layer. A terminal portion of the semiconductor element and a terminal surface side of an internal terminal portion of the circuit portion are electrically connected to each other by a wire, and the second surface side of the circuit portion is in one plane. The internal terminals and leads are formed thin, and the external terminals are thick. The terminal surface of the external terminal portion is projected from the terminal surface of the internal terminal or the surface of the lead portion, which is not the one plane side, and at least the terminal surface region of the internal terminal portion is flattened by coining. An external terminal exposed to the outside by being a resin-encapsulated semiconductor device in which a part of the external terminal is exposed to the outside and is resin-encapsulated. This is achieved by a resin-encapsulated semiconductor device in which external electrodes made of solder for mounting on a circuit board or the like are provided on the surface of the portion. The terminals of the semiconductor element are arranged along a center line between a pair of sides of the terminal surface of the semiconductor element, and the internal terminals are opposed to each other with the center line interposed therebetween, and are respectively along the center line. By being provided, the whole structure can be made simple and suitable for mass production. In particular, a CSP (ChipSize) in which the resin sealing region is substantially matched to the external dimensions of the semiconductor element.
(Package) can cope with downsizing of the semiconductor device.

The circuit member of the present invention, which has the above-described structure, is used for manufacturing the resin-encapsulated semiconductor device of the present invention. And a coining process. In particular, the terminal portion for connecting to the semiconductor element of the internal terminal portion is a portion that is difficult to be flattened by half etching with the miniaturization, but by flattening this by coining, the semiconductor At the time of manufacturing the device, it is possible to improve the wire bonding property. By coining, the thickness of the internal terminals was made even thinner than the thickness obtained by the etching process, and the required thickness was obtained, and the lead portions of the circuit members, the connection lead portions, etc. were thinned by half etching. The thickness of the part,
The thickness can be made larger than the thickness of the internal terminal portion, and as a result, the entire circuit member can be kept relatively strong.

According to the circuit member manufacturing method of the present invention, by adopting the above-described structure, the manufacturing of the circuit member of the present invention can be relatively easily performed by a combination of an etching step accompanied by a half-etching process and coining. Possible, and the result,
The present invention enables the production of the resin-sealed semiconductor device of the present invention.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A resin-sealed semiconductor device according to the present invention will be described with reference to the drawings. FIG. 1 shows an example of an embodiment of a resin-sealed semiconductor device of the present invention.
FIG. 1B is a schematic cross-sectional view, FIG. 1B is a view as seen from the external electrode side (A0 side in FIG. 1A), and FIG. 2 is a view showing the external electrode side and side surfaces of the semiconductor device shown in FIG. It is the perspective view shown intelligibly. FIG. 3 is a sectional view of a modification of the semiconductor device shown in FIG. 1, FIG. 4A is a schematic plan view of a circuit member of the present invention, and FIG. 4B is a dotted line in FIG. It is an expansion perspective view of the enclosed B0 part. 1, 2, 3, and 4, reference numerals 100 and 101 denote a resin-encapsulated semiconductor device, 110
Is a semiconductor element, 111 is a terminal (pad), 120 is an insulating layer, 123 is an insulating film, 125 is an adhesive layer, 13
0 is a circuit member, 130A is a circuit portion, 130S is a material surface,
131 is an internal terminal portion, 131S is a terminal surface, 132 is an external terminal portion, 132S is a terminal surface, 133 is a lead, 133S
Is a lead surface, 134 is a connection lead, 134S is a connection lead surface, 135 is a frame, 140 is a wire, 150 is a sealing resin, 160 is silver plating, and 170 is an external electrode made of solder. The resin-sealed semiconductor device 100 shown in FIG.
Only the area B1 within the dotted line of the circuit member 130 shown in FIG. 4 is resin-sealed and the other parts are separated and used. The semiconductor element 110 is connected to the terminal (pad) 111 side. Then, the terminal (pad) 111 of the semiconductor element 110 and the terminal surface 131S of the internal terminal portion 131 are electrically connected by wires 140 to the material surface 130S of the circuit portion 130 via the insulating layer 120. And the external terminal 132
Are exposed to the outside, and the whole is resin-sealed with a sealing resin 150. As shown in FIG. 1A, an internal terminal portion 131 for electrically connecting to a terminal 111 of the semiconductor element 110 and an external terminal portion 13 for connection to an external circuit.
2, and a plurality of lead portions 133 for integrally connecting the internal terminal portion 131 and the external terminal portion 132 are provided in a substantially plane, and a circuit portion 130A is provided independently of each other. Then, the terminal surface 131S of the internal terminal portion 131 for connecting to the semiconductor element 110 and the terminal surface 132S of the external terminal portion 132 for connecting to the external circuit of the circuit portion 130A are connected to the material surface 130S side of the circuit portion 130A ( Second
Is provided on the opposite side (first surface side).
In the example shown in FIG. 1, since the circuit member 130 shown in FIG. 4 is used, the connection lead 134 is left inside.

The circuit portion 130A used in the semiconductor device 100, which is inside the one-dot chain line region B1 of the circuit member 130 shown in FIG. 4A, is used on one surface side (second surface side). Are all formed on substantially the same plane as a material surface 130S, and the material surface 130S and the surface on the terminal portion 111 side of the semiconductor element 110 are bonded and fixed via an insulating layer 120. The internal terminal portion 131, the lead portion 133, and the connection lead portion 134 are formed to be thin (that is, thinner than the thickness of the material of the circuit member 130A), and the external terminal portion 132 is formed to be thick (that is, the material of the circuit member 130A). The terminal surface 132S of the external terminal portion 132 on the side to be connected to the external circuit is connected to the circuit portion 130.
The terminal surface 131S of the internal terminal portion 131 or the surface 133S of the lead portion 133, which is not the material surface 130S of A, protrudes. Further, at least the terminal surface 131 on the opposite side to the side of the internal terminal portion 131 connected to the semiconductor element 110.
The S region is formed flat by coining.
Further, an external electrode 170 made of solder for mounting on a circuit board or the like is provided on a part of the external terminal part 132 which is exposed to the outside, is resin-sealed, and is externally exposed. .

In the resin-encapsulated semiconductor device 100 shown in FIG. 1, the terminal portion 111 of the semiconductor element 110 is disposed along a center line between a pair of sides of the terminal surface of the semiconductor element 110. The portions 131 are opposed to each other so as to sandwich the center line, and are provided along the center line. Then, the internal terminal portion 131 of the circuit portion 130A is provided on the surface on the terminal portion side of the semiconductor element 110 via the insulating layer 120.
And a lead portion 133 connected to the
It is called OC (Lead On Chip). Also,
The resin-encapsulated semiconductor device 100 shown in FIG. 1 has a structure in which the resin-encapsulated region substantially matches the size of the semiconductor element, and is called a CSP (Chip Size Package).

An embodiment of the resin-encapsulated semiconductor device of the present invention is shown in FIG.
There is no particular limitation to the P type. Further, as shown in FIG. 3, the semiconductor device shown in FIG. 1 in which the external electrodes made of solder are not provided is given as a semiconductor device 101 of a modified example. Surface 132 of the external terminal portion exposed to the outside of semiconductor device 101 of the modified example shown in FIG.
An external electrode 170 made of solder is provided on S.

As the material of the circuit portion 130A, a 42 alloy (Fe alloy of 42% Ni), a copper alloy or the like is used. As the insulating layer 120, as shown in FIG.
An adhesive layer 125 provided on both sides of 23 or a commercially available die attach agent is used.

Next, a circuit member of the present invention will be described with reference to the drawings. FIG. 4 shows an example of the circuit member of the present invention. FIG. 4 (a) is a plan view, and FIG. 4 (b) is an enlarged perspective view showing the B0 portion of FIG. 4 (a) in an enlarged manner. It is. The dashed-dotted line region B1 in FIG. 4 is a region used by sealing with a resin when the semiconductor device of the circuit member is manufactured, and the region outside the dotted line is finally separated and removed. The circuit member of the present invention is used for manufacturing the semiconductor device of the present invention.
As shown in (a), an internal terminal portion 131 for electrically connecting to a terminal of a semiconductor element, an external terminal portion 132 for connection to an external circuit, an internal terminal portion 131 and an external terminal portion 132 are provided. And a plurality of these are arranged in a substantially plane, each being independent of each other, and a connecting lead 134 and an external terminal 132 different from the lead 133 are connected to each other. They are integrally connected, and are connected to the outer frame 135 that holds the whole outside of them. FIG. 4B shows a circuit member for a resin-encapsulated semiconductor device in which the terminal surface 131S of the internal terminal portion 131 and the terminal surface 132S of the external terminal portion 132 are provided on the first surface side. The second surface side of the member is a material surface 130S
The inner terminal portion 131, the lead portion 133, and the connection lead portion 134 are formed to be thinner than the plate thickness of the circuit member material, and the external terminal portion 132 is formed to be the plate thickness of the circuit member material. The terminal surface 132S of the external terminal portion 132 on the side connected to the external circuit protrudes from the surface 133S of the lead portion and the surface 134S of the connection lead portion which are not the material surface side. Is formed in a flat shape by coining. The material of the circuit member 130 is 42 alloy (N
i42% Fe alloy), a copper alloy or the like is used, and the outer shape can be processed by etching similarly to a normal lead frame.

Next, an example of a method of manufacturing the circuit member 130 shown in FIG. 4 will be described with reference to FIG. FIG. 5 is a dashed line B shown in FIG.
Only the cross section at 3-B4 is shown. First, a plate material 510 having a thickness of about 0.2 mm, which is a material of a circuit member, made of a 42 alloy (Fe alloy of 42% Ni) or the like was prepared, and both surfaces of the plate material 510 were thoroughly cleaned by performing degreasing (FIG. 5).
(A)) Then, photosensitive resists 52 are formed on both sides of the plate material 510.
Apply 0 and dry. (FIG. 5B) Next, only predetermined portions of the resist are exposed from both sides of the plate member 510 using a predetermined pattern plate, and then developed to form resist patterns 521 and 522.
(FIG. 5C) In the region where the internal terminal portion, the lead portion, and the connection lead portion are formed, one surface of the plate is not covered with the resist. still,
The resist is not particularly limited, but a casein-based resist using potassium dichromate as a photosensitive material, a negative liquid resist (PMER resist) manufactured by Tokyo Ohka Co., Ltd., or the like can be used. Next, etching is performed from both sides of the plate material 510 with a corrosion liquid using the resist pattern as a corrosion-resistant film. Since the resist on one surface side of the plate material is not covered in the formation regions of the internal terminal portion, the lead portion, and the connection lead portion, the etching proceeds only from one side. (Here, this is called half etching.) The thickness of the thin portion 530 can be adjusted by adjusting the amount of etching on the front and back surfaces of the plate member 510. The etching is usually performed by spray etching from both sides of the plate using an aqueous solution of ferric chloride as a corrosion liquid. As shown in FIG. 5 (d), the etching progresses further, and further the etching progresses, and the internal terminal portions 131 are separated from each other. The lead 133 and the connection lead 134 are formed to be thinner than the thickness of the material of the plate 510, and the external terminal 132 and the outer frame 134 are formed to have the same thickness as the material of the plate 510. (FIG. 5 (e)) Next, after the resist was stripped (FIG. 5 (f)), the terminal surface forming side 131A of the internal terminal portion was coined to form a flat shape (FIG. 5 (g)). The circuit member 130 shown in FIG. 4 is obtained. In addition, from the viewpoint of productivity, when performing the etching process and the coining process, the above-described process is performed in a state where a plurality of components are imposed.

Next, a method of manufacturing the semiconductor device 100 shown in FIG. 1 will be briefly described with reference to FIG. First, a circuit member 130 shown in FIG. 4, which is manufactured by processing the outer shape as shown in FIG. 5, is prepared. (6 (a)) Next, after performing a cleaning process or the like, a silver plating process is performed on the terminal surface 131S side of the internal terminal portion 131, and a silver plating portion 16 is formed.
0 is provided. (FIG. 6B) Note that gold plating or palladium plating may be used instead of silver plating. Next, the terminal surface 111 of the semiconductor element 110 and the material surface of the circuit member 130 are bonded and fixed (mounted) via the insulating layer 120. The insulating layer 120 has a structure in which an adhesive layer 125 is provided on both sides of an insulating film 123 as shown in FIG. 1A, but a commercially available die attach agent may be used instead. good. And the semiconductor element 1
10 terminals 111 and terminal surfaces 131S of the internal terminals 131
(Silver-plated part 160) by wire 140. (FIG. 6D) Thereafter, a part of the external terminal 132 is exposed to the outside, and the whole is sealed with a sealing resin 150. (FIG. 6E) Further, the exposed terminal surface 132S of the external terminal portion 132
After applying a surface treatment agent such as solder plating, external electrodes 170 made of solder balls are formed. (FIG. 6F) Next, each connection lead 134 of the circuit member 130 is cut by a press, and the outer frame portion 135 is removed. (FIG. 6
(G)) The external electrodes 170 made of solder balls may be produced by solder paste application by screen printing, reflow, or the like, as long as an amount of solder necessary for connection between the circuit board and the semiconductor device is obtained.

[0018]

EXAMPLES Further, examples of the circuit member of the present invention will be described.
A description will be given based on FIG. Alloy 42 (Ni 42% Fe
4) having a thickness of the external terminal portion of 0.2 mm and a thickness of the internal terminal portion of 0.05 mm was obtained by manufacturing the circuit member 130 shown in FIG. 4 by the processing method shown in FIG. Thereafter, the semiconductor device shown in FIG. 1 was manufactured by the method for manufacturing a semiconductor device shown in FIG. 6, but there was no particular problem in quality.

[0019]

According to the present invention, as described above, under the circumstances where higher integration and higher functionality of a resin-encapsulated semiconductor device are required, the occupation rate of the chip in the package size of the semiconductor device is increased. Further, it is possible to provide a conductor device capable of reducing the mounting area on a circuit board in correspondence with miniaturization of a semiconductor device, that is, improving the mounting density on a circuit board. In addition, the present invention also simultaneously
An object of the present invention is to provide a resin-encapsulated semiconductor device realizing a further increase in the number of pins, which has been difficult for a small package such as an OP.

[Brief description of the drawings]

FIG. 1 is a diagram showing an example of a resin-sealed semiconductor device of the present invention.

FIG. 2 is a perspective view of one example of a resin-sealed semiconductor device of the present invention.

FIG. 3 is a cross-sectional view of a modified example of one example of the resin-sealed semiconductor device of the present invention.

FIG. 4 is a view showing a circuit member of the present invention.

FIG. 5 is a manufacturing process diagram of the circuit member of the present invention.

FIG. 6 is a manufacturing process diagram of the resin-encapsulated semiconductor device of the present invention.

[Explanation of symbols]

REFERENCE SIGNS LIST 100, 101 resin-sealed semiconductor device 110 semiconductor element 111 terminal (pad) 120 insulating layer (insulating film) 130 circuit member 130A circuit portion 130S material surface 131 internal terminal portion 131S terminal surface 132 external terminal portion 132S terminal surface 133 lead 133S lead surface 134 connection lead 134S connection lead surface 135 frame 140 wire 150 sealing resin 160 silver plating 170 external electrode 510 plate material 510S plate material) 520 resist 521, 522 resist pattern 530 thin portion

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Hiroshi Yagi 1-1-1 Ichigaya Kagacho, Shinjuku-ku, Tokyo Dai Nippon Printing Co., Ltd.

Claims (8)

[Claims] An internal terminal for electrically connecting to a terminal of a semiconductor element, an external terminal for connection to an external circuit, and integrally connecting the internal terminal and the external terminal. A plurality of lead portions and a circuit portion for arranging the lead portions independently of each other in a substantially plane are provided, and the terminal surfaces of the internal terminal portions and the external terminals of the circuit portion are connected to the first surface side of the circuit portion. The circuit portion is provided with a second surface side, not the first surface side, along one plane, the internal terminal portion and the lead portion are formed thin, and the external terminal portion is formed thick. The terminal surface of the external terminal portion protrudes from the terminal surface of the internal terminal or the surface of the lead portion, which is not the second surface side. Adhesively fixed to the non-terminal side via an insulating layer, mounted on the circuit section, and The terminal portion and the terminal surface side of the internal terminal portion of the circuit portion are electrically connected by wires, and a part of the external terminal is exposed to the outside, and a resin-sealed semiconductor device sealed with a resin, or A resin-sealed semiconductor device in which external electrodes made of solder for mounting on a circuit board or the like are provided on a surface of an external terminal portion exposed to the outside of the resin-sealed semiconductor device. Stop type semiconductor device. 2. The resin-encapsulated semiconductor device according to claim 1, wherein at least a terminal surface region of the internal terminal portion is formed in a flat shape by coining. 3. The semiconductor device according to claim 1, wherein the terminals of the semiconductor element are arranged along a center line between a pair of sides of the terminal surface of the semiconductor element, and the internal terminal of the circuit member is connected to the center line. Along the center line,
A resin-encapsulated semiconductor device, each of which is provided. 4. The resin-encapsulated semiconductor device according to claim 1, wherein the resin-encapsulated region is substantially matched to the external dimensions of the semiconductor element. 5. An internal terminal for electrically connecting to a terminal of a semiconductor element, an external terminal for connection to an external circuit, and integrally connecting the internal terminal and the external terminal. A plurality of lead terminals, each of which is independently arranged in a substantially plane, and an external terminal portion and an outer frame portion for holding the whole outside thereof are different from the lead portions in connection leads. And a terminal surface of the internal terminal portion and a terminal surface of the external terminal are provided on the first surface side thereof. The surface side is a material surface along one plane, the internal terminal portion, the lead portion and the connection lead portion are formed thinner than the thickness of the material of the circuit member, and the external terminal portion is formed to be thinner than the thickness of the material of the circuit member. The terminal surface of the external terminal portion on the side connected to the external circuit is A circuit member protruding from a surface of a lead portion or a surface of a connection lead portion which is not a surface side of the circuit member. 6. The circuit member according to claim 5, wherein coining is performed on at least a terminal surface forming region of the internal terminal portion. 7. A half-etching process for forming the internal terminal portion and the lead portion forming region and the connection lead portion to be thinner than the thickness of the circuit member material, and setting the external terminal portion to the circuit member material thickness. 7. The circuit member according to claim 5, wherein the circuit member has been subjected to external processing. 8. An internal terminal for electrically connecting to a terminal of a semiconductor element, an external terminal for connection to an external circuit, and integrally connecting the internal terminal and the external terminal. And a plurality of these in a substantially one plane, which are respectively arranged independently of each other, and the external terminal portions and the outer frame portion that holds the whole outside of these are connected via connection leads. A method for manufacturing a circuit member for a resin-encapsulated semiconductor device integrally connected, wherein one surface side is a material surface by half-etching processing, and a formation region of an internal terminal portion and a lead portion,
And the connecting lead portion is made thinner than the thickness of the material of the circuit member, the external terminal portion is made to be the thickness of the material of the circuit member, and the external processing is performed. A coining step of denting a region including the surface region and flattening the surface of the depressed portion.