JPH11260056A - 半導体記憶装置 - Google Patents

半導体記憶装置

Info

Publication number
JPH11260056A
JPH11260056A JP10060996A JP6099698A JPH11260056A JP H11260056 A JPH11260056 A JP H11260056A JP 10060996 A JP10060996 A JP 10060996A JP 6099698 A JP6099698 A JP 6099698A JP H11260056 A JPH11260056 A JP H11260056A
Authority
JP
Japan
Prior art keywords
bit line
sense amplifier
potential
precharge
memory device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP10060996A
Other languages
English (en)
Japanese (ja)
Inventor
Toshiro Yamada
俊郎 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10060996A priority Critical patent/JPH11260056A/ja
Priority to TW87121488A priority patent/TW393759B/zh
Priority to PCT/JP1999/000236 priority patent/WO1999046776A1/ja
Publication of JPH11260056A publication Critical patent/JPH11260056A/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines

Landscapes

  • Dram (AREA)
JP10060996A 1998-03-12 1998-03-12 半導体記憶装置 Withdrawn JPH11260056A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP10060996A JPH11260056A (ja) 1998-03-12 1998-03-12 半導体記憶装置
TW87121488A TW393759B (en) 1998-03-12 1998-12-22 Semiconductor storage device
PCT/JP1999/000236 WO1999046776A1 (fr) 1998-03-12 1999-01-21 Memoire a semi-conducteurs

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10060996A JPH11260056A (ja) 1998-03-12 1998-03-12 半導体記憶装置

Publications (1)

Publication Number Publication Date
JPH11260056A true JPH11260056A (ja) 1999-09-24

Family

ID=13158563

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10060996A Withdrawn JPH11260056A (ja) 1998-03-12 1998-03-12 半導体記憶装置

Country Status (3)

Country Link
JP (1) JPH11260056A (zh)
TW (1) TW393759B (zh)
WO (1) WO1999046776A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6430099B1 (en) * 2001-05-11 2002-08-06 Broadcom Corporation Method and apparatus to conditionally precharge a partitioned read-only memory with shared wordlines for low power operation

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61142593A (ja) * 1984-12-14 1986-06-30 Toshiba Corp ダイナミツク型ランダムアクセスメモリのセンスアンプ系
JPS62180591A (ja) * 1986-02-04 1987-08-07 Fujitsu Ltd 半導体記憶装置
JP2520480B2 (ja) * 1989-07-10 1996-07-31 日本電気アイシーマイコンシステム株式会社 半導体記憶装置
JPH0430385A (ja) * 1990-05-25 1992-02-03 Matsushita Electric Ind Co Ltd 半導体記憶装置
JP2980368B2 (ja) * 1990-11-20 1999-11-22 株式会社東芝 ダイナミック型半導体記憶装置
JP3601883B2 (ja) * 1994-11-22 2004-12-15 株式会社ルネサステクノロジ 半導体装置

Also Published As

Publication number Publication date
TW393759B (en) 2000-06-11
WO1999046776A1 (fr) 1999-09-16

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Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20050607