JPH11184555A5 - - Google Patents
Info
- Publication number
- JPH11184555A5 JPH11184555A5 JP1998154541A JP15454198A JPH11184555A5 JP H11184555 A5 JPH11184555 A5 JP H11184555A5 JP 1998154541 A JP1998154541 A JP 1998154541A JP 15454198 A JP15454198 A JP 15454198A JP H11184555 A5 JPH11184555 A5 JP H11184555A5
- Authority
- JP
- Japan
- Prior art keywords
- clock signal
- base
- frequency
- storage device
- coupled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/989,986 US6070248A (en) | 1997-12-12 | 1997-12-12 | Generation of a stable reference clock frequency from a base clock frequency that may vary depending on source |
| US08/989986 | 1997-12-12 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11184555A JPH11184555A (ja) | 1999-07-09 |
| JPH11184555A5 true JPH11184555A5 (https=) | 2005-10-06 |
Family
ID=25535628
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10154541A Pending JPH11184555A (ja) | 1997-12-12 | 1998-06-03 | ベース周波数を有するベースクロック信号から電子装置のための基準周波数を有する基準クロック信号を発生するクロック信号発生器およびその方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US6070248A (https=) |
| JP (1) | JPH11184555A (https=) |
| GB (1) | GB2332577B (https=) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6311284B1 (en) * | 1999-03-15 | 2001-10-30 | Advanced Micro Devices, Inc. | Using an independent clock to coordinate access to registers by a peripheral device and a host system |
| JP4390353B2 (ja) * | 2000-04-12 | 2009-12-24 | 株式会社ルネサステクノロジ | クロック生成方法およびクロック生成回路 |
| US6470032B2 (en) * | 2001-03-20 | 2002-10-22 | Alloptic, Inc. | System and method for synchronizing telecom-related clocks in ethernet-based passive optical access network |
| JP2002328743A (ja) * | 2001-05-07 | 2002-11-15 | Oki Electric Ind Co Ltd | クロック信号発生回路 |
| TW561353B (en) * | 2002-02-05 | 2003-11-11 | Via Tech Inc | Automatic reset signal generator integrated into chipset and chipset with reset completion indication function |
| US7844690B1 (en) | 2003-01-24 | 2010-11-30 | Douglas Durham | Systems and methods for creation and use of a virtual protocol analyzer |
| US7804852B1 (en) * | 2003-01-24 | 2010-09-28 | Douglas Durham | Systems and methods for definition and use of a common time base in multi-protocol environments |
| US7471753B2 (en) * | 2005-02-01 | 2008-12-30 | Credence Systems Corporation | Serializer clock synthesizer |
| US8164368B2 (en) | 2005-04-19 | 2012-04-24 | Micron Technology, Inc. | Power savings mode for memory systems |
| US8089318B2 (en) | 2008-10-17 | 2012-01-03 | Marvell World Trade Ltd. | Methods, algorithms, circuits, and systems for determining a reference clock frequency and/or locking a loop oscillator |
| CN104426645A (zh) * | 2013-09-02 | 2015-03-18 | 华为技术有限公司 | 确定以太时钟源的方法和装置 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2246455A (en) * | 1990-07-23 | 1992-01-29 | Philips Electronic Associated | Altering the rate at which digital circuitry operates |
| US5095280A (en) * | 1990-11-26 | 1992-03-10 | Integrated Circuit Systems, Inc. | Dual dot clock signal generator |
| US5794021A (en) * | 1994-11-02 | 1998-08-11 | Advanced Micro Devices, Inc. | Variable frequency clock generation circuit using aperiodic patterns |
| EP0721157A1 (en) * | 1994-12-12 | 1996-07-10 | Advanced Micro Devices, Inc. | Microprocessor with selectable clock frequency |
| US5771373A (en) * | 1994-12-22 | 1998-06-23 | Texas Instruments Incorporated | Power management masked clock circuitry, systems and methods |
| US5903746A (en) * | 1996-11-04 | 1999-05-11 | Texas Instruments Incorporated | Apparatus and method for automatically sequencing clocks in a data processing system when entering or leaving a low power state |
| US5790609A (en) * | 1996-11-04 | 1998-08-04 | Texas Instruments Incorporated | Apparatus for cleanly switching between various clock sources in a data processing system |
-
1997
- 1997-12-12 US US08/989,986 patent/US6070248A/en not_active Expired - Fee Related
-
1998
- 1998-06-03 JP JP10154541A patent/JPH11184555A/ja active Pending
- 1998-06-11 GB GB9812646A patent/GB2332577B/en not_active Expired - Lifetime
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