JPH11161470A5 - - Google Patents

Info

Publication number
JPH11161470A5
JPH11161470A5 JP1997327536A JP32753697A JPH11161470A5 JP H11161470 A5 JPH11161470 A5 JP H11161470A5 JP 1997327536 A JP1997327536 A JP 1997327536A JP 32753697 A JP32753697 A JP 32753697A JP H11161470 A5 JPH11161470 A5 JP H11161470A5
Authority
JP
Japan
Prior art keywords
circuit
logic circuit
selector
logic
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1997327536A
Other languages
English (en)
Japanese (ja)
Other versions
JP3701781B2 (ja
JPH11161470A (ja
Filing date
Publication date
Priority claimed from JP32753697A external-priority patent/JP3701781B2/ja
Priority to JP32753697A priority Critical patent/JP3701781B2/ja
Application filed filed Critical
Priority to TW087119189A priority patent/TW461181B/zh
Priority to US09/197,465 priority patent/US6124736A/en
Priority to KR1019980051132A priority patent/KR100592051B1/ko
Publication of JPH11161470A publication Critical patent/JPH11161470A/ja
Priority to US09/610,697 priority patent/US6323690B1/en
Priority to US09/906,264 priority patent/US6400183B2/en
Priority to US10/122,385 priority patent/US6486708B2/en
Priority to US10/266,773 priority patent/US6696864B2/en
Publication of JPH11161470A5 publication Critical patent/JPH11161470A5/ja
Publication of JP3701781B2 publication Critical patent/JP3701781B2/ja
Application granted granted Critical
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP32753697A 1997-11-28 1997-11-28 論理回路とその作成方法 Expired - Fee Related JP3701781B2 (ja)

Priority Applications (8)

Application Number Priority Date Filing Date Title
JP32753697A JP3701781B2 (ja) 1997-11-28 1997-11-28 論理回路とその作成方法
TW087119189A TW461181B (en) 1997-11-28 1998-11-19 Logic circuit and its manufacturing method
US09/197,465 US6124736A (en) 1997-11-28 1998-11-23 Logic circuit and its forming method
KR1019980051132A KR100592051B1 (ko) 1997-11-28 1998-11-27 논리회로와그작성방법
US09/610,697 US6323690B1 (en) 1997-11-28 2000-07-05 Logic circuit and its forming method
US09/906,264 US6400183B2 (en) 1997-11-28 2001-07-17 Logic circuit and its forming method
US10/122,385 US6486708B2 (en) 1997-11-28 2002-04-16 Logic circuit and its forming method
US10/266,773 US6696864B2 (en) 1997-11-28 2002-10-09 Logic circuit and its forming method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32753697A JP3701781B2 (ja) 1997-11-28 1997-11-28 論理回路とその作成方法

Publications (3)

Publication Number Publication Date
JPH11161470A JPH11161470A (ja) 1999-06-18
JPH11161470A5 true JPH11161470A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 2004-11-25
JP3701781B2 JP3701781B2 (ja) 2005-10-05

Family

ID=18200202

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32753697A Expired - Fee Related JP3701781B2 (ja) 1997-11-28 1997-11-28 論理回路とその作成方法

Country Status (4)

Country Link
US (5) US6124736A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JP3701781B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR (1) KR100592051B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
TW (1) TW461181B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

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US6546539B1 (en) * 2000-12-14 2003-04-08 Lsi Logic Corporation Netlist resynthesis program using structure co-factoring
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US6829750B2 (en) * 2001-06-15 2004-12-07 Science & Technology Corporation @ Unm Pass-transistor very large scale integration
US6489830B1 (en) * 2001-09-05 2002-12-03 Hewlett-Packard Company Apparatus and method for implementing a multiplexer
US7047175B1 (en) * 2001-11-16 2006-05-16 Synopsys, Inc. System and method for enhancing the speed of dynamic timing simulation using delay assessment at compile time
US7345511B2 (en) * 2002-08-29 2008-03-18 Technion Research & Development Foundation Ltd. Logic circuit and method of logic circuit design
US7103868B2 (en) * 2002-11-12 2006-09-05 Lsi Logic Corporation Optimizing depths of circuits for Boolean functions
US6831481B1 (en) * 2003-03-14 2004-12-14 Xilinx, Inc. Power-up and enable control circuits for interconnection arrays in programmable logic devices
US7129755B2 (en) * 2004-04-09 2006-10-31 Broadcom Corporation High-fanin static multiplexer
US7350177B2 (en) * 2004-04-29 2008-03-25 Taiwan Semiconductor Manufacturing Co., Ltd. Configurable logic and memory devices
WO2006087698A2 (en) 2005-02-16 2006-08-24 Technion Research & Development Foundation Ltd. Logic circuit and method of logic circuit design
US8541879B2 (en) 2007-12-13 2013-09-24 Tela Innovations, Inc. Super-self-aligned contacts and method for making the same
US8658542B2 (en) 2006-03-09 2014-02-25 Tela Innovations, Inc. Coarse grid design methods and structures
US8839175B2 (en) 2006-03-09 2014-09-16 Tela Innovations, Inc. Scalable meta-data objects
US9230910B2 (en) 2006-03-09 2016-01-05 Tela Innovations, Inc. Oversized contacts and vias in layout defined by linearly constrained topology
US9563733B2 (en) 2009-05-06 2017-02-07 Tela Innovations, Inc. Cell circuit and layout with linear finfet structures
US9035359B2 (en) 2006-03-09 2015-05-19 Tela Innovations, Inc. Semiconductor chip including region including linear-shaped conductive structures forming gate electrodes and having electrical connection areas arranged relative to inner region between transistors of different types and associated methods
US9009641B2 (en) 2006-03-09 2015-04-14 Tela Innovations, Inc. Circuits with linear finfet structures
US7763534B2 (en) 2007-10-26 2010-07-27 Tela Innovations, Inc. Methods, structures and designs for self-aligning local interconnects used in integrated circuits
US7956421B2 (en) 2008-03-13 2011-06-07 Tela Innovations, Inc. Cross-coupled transistor layouts in restricted gate level layout architecture
US8448102B2 (en) 2006-03-09 2013-05-21 Tela Innovations, Inc. Optimizing layout of irregular structures in regular layout context
US7446352B2 (en) 2006-03-09 2008-11-04 Tela Innovations, Inc. Dynamic array architecture
US8653857B2 (en) 2006-03-09 2014-02-18 Tela Innovations, Inc. Circuitry and layouts for XOR and XNOR logic
US7741879B2 (en) * 2007-02-22 2010-06-22 Avago Technologies Enterprise IP (Singapore) Pte. Ltd. Apparatus and method for generating a constant logical value in an integrated circuit
US8667443B2 (en) 2007-03-05 2014-03-04 Tela Innovations, Inc. Integrated circuit cell library for multiple patterning
US7888705B2 (en) 2007-08-02 2011-02-15 Tela Innovations, Inc. Methods for defining dynamic array section with manufacturing assurance halo and apparatus implementing the same
US8453094B2 (en) 2008-01-31 2013-05-28 Tela Innovations, Inc. Enforcement of semiconductor structure regularity for localized transistors and interconnect
US7939443B2 (en) 2008-03-27 2011-05-10 Tela Innovations, Inc. Methods for multi-wire routing and apparatus implementing same
KR100933668B1 (ko) * 2008-04-30 2009-12-23 주식회사 하이닉스반도체 출력회로
SG192532A1 (en) 2008-07-16 2013-08-30 Tela Innovations Inc Methods for cell phasing and placement in dynamic array architecture and implementation of the same
US9122832B2 (en) 2008-08-01 2015-09-01 Tela Innovations, Inc. Methods for controlling microloading variation in semiconductor wafer layout and fabrication
US8661392B2 (en) 2009-10-13 2014-02-25 Tela Innovations, Inc. Methods for cell boundary encroachment and layouts implementing the Same
US9159627B2 (en) 2010-11-12 2015-10-13 Tela Innovations, Inc. Methods for linewidth modification and apparatus implementing the same
US8461902B2 (en) * 2011-01-27 2013-06-11 Advanced Micro Devices, Inc. Multiplexer circuit with load balanced fanout characteristics
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US9122823B2 (en) 2013-12-20 2015-09-01 International Business Machines Corporation Stacked multiple-input delay gates

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US5162666A (en) * 1991-03-15 1992-11-10 Tran Dzung J Transmission gate series multiplexer
JP3175322B2 (ja) * 1992-08-20 2001-06-11 株式会社日立製作所 論理自動生成方法
JP2972498B2 (ja) * 1993-09-02 1999-11-08 松下電器産業株式会社 論理回路の自動設計方法、そのシステム及びその装置並びに乗算器
JP3153403B2 (ja) * 1993-12-28 2001-04-09 富士通株式会社 半導体集積回路の遅延時間計算装置
JPH0818438A (ja) * 1994-06-29 1996-01-19 Nec Commun Syst Ltd ゲートアレー構成半導体装置
KR960003103A (ko) * 1994-06-30 1996-01-26 윌리엄 이. 힐러 연합 헤테로젠니우스 필드 프로그래머블 게이트 어레이 논리 모듈 및 그 형성방법
JP3400124B2 (ja) * 1994-08-08 2003-04-28 株式会社日立製作所 パストランジスタ型セレクタ回路及び論理回路
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US5751165A (en) * 1995-08-18 1998-05-12 Chip Express (Israel) Ltd. High speed customizable logic array device
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