JPH10274787A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPH10274787A
JPH10274787A JP8147697A JP8147697A JPH10274787A JP H10274787 A JPH10274787 A JP H10274787A JP 8147697 A JP8147697 A JP 8147697A JP 8147697 A JP8147697 A JP 8147697A JP H10274787 A JPH10274787 A JP H10274787A
Authority
JP
Japan
Prior art keywords
semiconductor layer
layer
protective film
forming
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8147697A
Other languages
English (en)
Japanese (ja)
Other versions
JPH10274787A5 (enExample
Inventor
Masashi Jinno
優志 神野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP8147697A priority Critical patent/JPH10274787A/ja
Priority to US09/049,313 priority patent/US6010923A/en
Publication of JPH10274787A publication Critical patent/JPH10274787A/ja
Priority to US09/428,819 priority patent/US6097038A/en
Publication of JPH10274787A5 publication Critical patent/JPH10274787A5/ja
Pending legal-status Critical Current

Links

Landscapes

  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)
JP8147697A 1997-03-31 1997-03-31 半導体装置の製造方法 Pending JPH10274787A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP8147697A JPH10274787A (ja) 1997-03-31 1997-03-31 半導体装置の製造方法
US09/049,313 US6010923A (en) 1997-03-31 1998-03-27 Manufacturing method of semiconductor device utilizing annealed semiconductor layer as channel region
US09/428,819 US6097038A (en) 1997-03-31 1999-10-28 Semiconductor device utilizing annealed semiconductor layer as channel region

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8147697A JPH10274787A (ja) 1997-03-31 1997-03-31 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPH10274787A true JPH10274787A (ja) 1998-10-13
JPH10274787A5 JPH10274787A5 (enExample) 2005-03-03

Family

ID=13747468

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8147697A Pending JPH10274787A (ja) 1997-03-31 1997-03-31 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPH10274787A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007073560A (ja) * 2005-09-02 2007-03-22 Kochi Prefecture Sangyo Shinko Center 薄膜トランジスタの製法
JP2007073559A (ja) * 2005-09-02 2007-03-22 Kochi Prefecture Sangyo Shinko Center 薄膜トランジスタの製法
JP2011040593A (ja) * 2009-08-12 2011-02-24 Seiko Epson Corp 半導体装置ならびに半導体装置の製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007073560A (ja) * 2005-09-02 2007-03-22 Kochi Prefecture Sangyo Shinko Center 薄膜トランジスタの製法
JP2007073559A (ja) * 2005-09-02 2007-03-22 Kochi Prefecture Sangyo Shinko Center 薄膜トランジスタの製法
JP2011040593A (ja) * 2009-08-12 2011-02-24 Seiko Epson Corp 半導体装置ならびに半導体装置の製造方法

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