JPH09232429A - 多層配線半導体装置およびその製造方法 - Google Patents
多層配線半導体装置およびその製造方法Info
- Publication number
- JPH09232429A JPH09232429A JP8041143A JP4114396A JPH09232429A JP H09232429 A JPH09232429 A JP H09232429A JP 8041143 A JP8041143 A JP 8041143A JP 4114396 A JP4114396 A JP 4114396A JP H09232429 A JPH09232429 A JP H09232429A
- Authority
- JP
- Japan
- Prior art keywords
- via hole
- conductive plug
- interlayer insulating
- insulating film
- wiring layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Drying Of Semiconductors (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8041143A JPH09232429A (ja) | 1996-02-28 | 1996-02-28 | 多層配線半導体装置およびその製造方法 |
KR1019970006851A KR970063677A (ko) | 1996-02-28 | 1997-02-28 | 멀티레벨 상호 접속 반도체 장치와 제조 방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8041143A JPH09232429A (ja) | 1996-02-28 | 1996-02-28 | 多層配線半導体装置およびその製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH09232429A true JPH09232429A (ja) | 1997-09-05 |
Family
ID=12600207
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8041143A Pending JPH09232429A (ja) | 1996-02-28 | 1996-02-28 | 多層配線半導体装置およびその製造方法 |
Country Status (2)
Country | Link |
---|---|
JP (1) | JPH09232429A (ko) |
KR (1) | KR970063677A (ko) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000100938A (ja) * | 1998-09-16 | 2000-04-07 | Samsung Electronics Co Ltd | 半導体装置の多層配線構造 |
JPWO2004097930A1 (ja) * | 2003-04-28 | 2006-07-13 | 富士通株式会社 | 半導体装置及びその製造方法 |
WO2011044833A1 (en) * | 2009-10-14 | 2011-04-21 | Csmc Technologies Fab1 Co., Ltd. | Semiconductor device structure and method for manufacturing the same |
JP2011204915A (ja) * | 2010-03-25 | 2011-10-13 | Sony Corp | 半導体装置、半導体装置の製造方法、半導体装置の設計方法、及び電子機器 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62130542A (ja) * | 1985-12-03 | 1987-06-12 | Oki Electric Ind Co Ltd | 多層配線の形成方法 |
JPH07335625A (ja) * | 1994-06-10 | 1995-12-22 | Sony Corp | プラズマエッチング方法 |
-
1996
- 1996-02-28 JP JP8041143A patent/JPH09232429A/ja active Pending
-
1997
- 1997-02-28 KR KR1019970006851A patent/KR970063677A/ko not_active Application Discontinuation
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62130542A (ja) * | 1985-12-03 | 1987-06-12 | Oki Electric Ind Co Ltd | 多層配線の形成方法 |
JPH07335625A (ja) * | 1994-06-10 | 1995-12-22 | Sony Corp | プラズマエッチング方法 |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000100938A (ja) * | 1998-09-16 | 2000-04-07 | Samsung Electronics Co Ltd | 半導体装置の多層配線構造 |
JPWO2004097930A1 (ja) * | 2003-04-28 | 2006-07-13 | 富士通株式会社 | 半導体装置及びその製造方法 |
US7492047B2 (en) | 2003-04-28 | 2009-02-17 | Fujitsu Limited | Semiconductor device and its manufacture method |
WO2011044833A1 (en) * | 2009-10-14 | 2011-04-21 | Csmc Technologies Fab1 Co., Ltd. | Semiconductor device structure and method for manufacturing the same |
JP2011204915A (ja) * | 2010-03-25 | 2011-10-13 | Sony Corp | 半導体装置、半導体装置の製造方法、半導体装置の設計方法、及び電子機器 |
US8946898B2 (en) | 2010-03-25 | 2015-02-03 | Sony Corporation | Semiconductor apparatus, method of manufacturing semiconductor apparatus, method of designing semiconductor apparatus, and electronic apparatus |
US9276033B2 (en) | 2010-03-25 | 2016-03-01 | Sony Corporation | Semiconductor apparatus, method of manufacturing semiconductor apparatus, method of designing semiconductor apparatus, and electronic apparatus |
Also Published As
Publication number | Publication date |
---|---|
KR970063677A (ko) | 1997-09-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 19980324 |