JPH09198341A - データ処理システム - Google Patents

データ処理システム

Info

Publication number
JPH09198341A
JPH09198341A JP9002099A JP209997A JPH09198341A JP H09198341 A JPH09198341 A JP H09198341A JP 9002099 A JP9002099 A JP 9002099A JP 209997 A JP209997 A JP 209997A JP H09198341 A JPH09198341 A JP H09198341A
Authority
JP
Japan
Prior art keywords
data
bus
module
pci
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9002099A
Other languages
English (en)
Japanese (ja)
Other versions
JPH09198341A5 (enExample
Inventor
Randall Don Briggs
ランダル・ドン・ブリッグス
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of JPH09198341A publication Critical patent/JPH09198341A/ja
Publication of JPH09198341A5 publication Critical patent/JPH09198341A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)
JP9002099A 1996-01-11 1997-01-09 データ処理システム Pending JPH09198341A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US584,413 1984-02-28
US08/584,413 US5793997A (en) 1996-01-11 1996-01-11 Interface architecture for connection to a peripheral component interconnect bus

Publications (2)

Publication Number Publication Date
JPH09198341A true JPH09198341A (ja) 1997-07-31
JPH09198341A5 JPH09198341A5 (enExample) 2004-10-14

Family

ID=24337226

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9002099A Pending JPH09198341A (ja) 1996-01-11 1997-01-09 データ処理システム

Country Status (4)

Country Link
US (1) US5793997A (enExample)
EP (1) EP0784278B1 (enExample)
JP (1) JPH09198341A (enExample)
DE (1) DE69619646T2 (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006522414A (ja) * 2003-04-03 2006-09-28 エミュレックス デザイン アンド マニュファクチュアリング コーポレーション 仮想周辺コンポーネントインターコネクト多重ファンクション装置
JP2006294022A (ja) * 2005-03-28 2006-10-26 Nvidia Corp ユニバーサルストレージバスアダプタ
KR100643815B1 (ko) * 2004-05-10 2006-11-10 인텔 코오퍼레이션 링크-기반 컴퓨팅 시스템 내에서의 ｉ/ｏ 구성 메시징

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6023736A (en) * 1997-12-19 2000-02-08 International Business Machines Corporation System for dynamically configuring I/O device adapters where a function configuration register contains ready/not ready flags corresponding to each I/O device adapter
US6101557A (en) * 1998-05-29 2000-08-08 International Business Machines Corporation Method and system for remote function control and delegation within multifunction bus supported devices
US6820157B1 (en) 1998-06-30 2004-11-16 International Business Machines Corporation Apparatus, program product and method of replacing failed hardware device through concurrent maintenance operation
US6243774B1 (en) 1998-06-30 2001-06-05 International Business Machines Corporation Apparatus program product and method of managing computer resources supporting concurrent maintenance operations
US6529978B1 (en) 2000-02-23 2003-03-04 International Business Machines Corporation Computer input/output (I/O) interface with dynamic I/O adaptor processor bindings
US9836424B2 (en) 2001-08-24 2017-12-05 Intel Corporation General input/output architecture, protocol and related methods to implement flow control
KR100750036B1 (ko) 2001-08-24 2007-08-16 인텔 코오퍼레이션 플로우 제어를 구현하는 범용 입출력 아키텍쳐, 프로토콜및 관련 방법
US6809547B2 (en) * 2001-12-24 2004-10-26 Broadcom, Corp. Multi-function interface and applications thereof
CN112667541B (zh) * 2020-12-15 2023-06-02 厦门智多晶科技有限公司 一种ip动态配置电路和fpga

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4641261A (en) * 1984-05-21 1987-02-03 Rca Corporation Universal interface circuit for microprocessor peripherals
JPH02226454A (ja) * 1989-01-13 1990-09-10 Internatl Business Mach Corp <Ibm> コンピユータ・システムおよびそのデータ転送方法
US5396602A (en) * 1993-05-28 1995-03-07 International Business Machines Corp. Arbitration logic for multiple bus computer system
US5550989A (en) * 1993-05-28 1996-08-27 International Business Machines Corporation Bridge circuit that can eliminate invalid data during information transfer between buses of different bitwidths
GB2286910B (en) * 1994-02-24 1998-11-25 Intel Corp Apparatus and method for prefetching data to load buffers in a bridge between two buses in a computer
US5664124A (en) * 1994-11-30 1997-09-02 International Business Machines Corporation Bridge between two buses of a computer system that latches signals from the bus for use on the bridge and responds according to the bus protocols

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006522414A (ja) * 2003-04-03 2006-09-28 エミュレックス デザイン アンド マニュファクチュアリング コーポレーション 仮想周辺コンポーネントインターコネクト多重ファンクション装置
JP4869065B2 (ja) * 2003-04-03 2012-02-01 エミュレックス デザイン アンド マニュファクチュアリング コーポレーション 仮想周辺コンポーネントインターコネクト多重ファンクション装置
KR100643815B1 (ko) * 2004-05-10 2006-11-10 인텔 코오퍼레이션 링크-기반 컴퓨팅 시스템 내에서의 ｉ/ｏ 구성 메시징
JP2006294022A (ja) * 2005-03-28 2006-10-26 Nvidia Corp ユニバーサルストレージバスアダプタ

Also Published As

Publication number Publication date
US5793997A (en) 1998-08-11
EP0784278A1 (en) 1997-07-16
EP0784278B1 (en) 2002-03-06
DE69619646D1 (de) 2002-04-11
DE69619646T2 (de) 2002-08-01

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