JPH09116045A - Resin-sealed semiconductor device of bga type using lead frame and its manufacture - Google Patents

Resin-sealed semiconductor device of bga type using lead frame and its manufacture

Info

Publication number
JPH09116045A
JPH09116045A JP7290583A JP29058395A JPH09116045A JP H09116045 A JPH09116045 A JP H09116045A JP 7290583 A JP7290583 A JP 7290583A JP 29058395 A JP29058395 A JP 29058395A JP H09116045 A JPH09116045 A JP H09116045A
Authority
JP
Japan
Prior art keywords
resin
lead frame
semiconductor element
semiconductor device
external
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7290583A
Other languages
Japanese (ja)
Inventor
Yoshiaki Ota
善紀 太田
Hideji Sagara
秀次 相楽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dai Nippon Printing Co Ltd
Original Assignee
Dai Nippon Printing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dai Nippon Printing Co Ltd filed Critical Dai Nippon Printing Co Ltd
Priority to JP7290583A priority Critical patent/JPH09116045A/en
Publication of JPH09116045A publication Critical patent/JPH09116045A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To prevent warp of a package and package cracks caused by moisture absorption by reason of close contact defect of sealing resin with a simple structure. SOLUTION: A semiconductor device 100 is provided with an inner lead 122, an external terminal connected thereto integrally for electrical connection with an external circuit and a semiconductor element mounting die pad 121 in a plane and a lead frame wherein an external terminal is arranged two- dimensionally is used. A semiconductor element is mounted on a die pad in one surface side of a lead frame, a terminal 111 of a semiconductor element and an inner lead tip are electrically connected by a wire 150 and an external electrode 160 integrally connected to an external terminal arranged two- dimensionally is provided in the other surface. A surface side whereon a semiconductor element of a lead frame is mounted is sealed with sealing resin and the other surface side is sealed with another insulation resin.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は,リードフレームを用い
たBGAタイプの樹脂封止型半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a BGA type resin-sealed semiconductor device using a lead frame.

【0002】[0002]

【従来の技術】近年、半導体装置は、電子機器の高性能
化と軽薄短小の傾向からLSIはASICに代表される
ように、ますます高集積化、高機能化の一途をたどって
きている。これに伴い、信号の高速処理には、パッケー
ジ内部のスイッチングノイズが無視できない状況になっ
てきて、特に、ICの同時スイッチングノイズにはパッ
ケージ内部配線の実効インダクタンスが大きく影響を与
える為、主に、電源やグランドの本数を増やしてこれに
対応してきた。この結果、半導体装置の高集積化、高機
能化は外部端子(ピン)総数の増加を招き、半導体装置
の多端子化が求められるようになってきた。多端子I
C、特にゲートアレイやスタンダードセルに代表される
ASICあるいは、マイコン、DSP(Digital
Signal Processor)等をコストパー
フォーマンス高くユーザに提供するパッケージとしてリ
ードフレームを用いたプラスチックQFP(Quad
Flat Package)が主流となり、現在では3
00ピンを超えるものまで実用化に至ってきている。
2. Description of the Related Art In recent years, with the trend toward higher performance of electronic devices and lighter, thinner and smaller electronic devices, LSIs, as typified by ASICs, have been increasingly integrated and functionalized. Along with this, the switching noise inside the package cannot be ignored for high-speed signal processing. In particular, the simultaneous switching noise of the IC has a large effect on the effective inductance of the wiring inside the package. We have responded to this by increasing the number of power supplies and grounds. As a result, higher integration and higher functionality of the semiconductor device have led to an increase in the total number of external terminals (pins), and a demand for a multi-terminal semiconductor device has been required. Multi-terminal I
C, particularly ASIC represented by gate array or standard cell, microcomputer, DSP (Digital)
Plastic QFP (Quad) using a lead frame as a package for providing a user with a high cost performance such as a Signal Processor
Flat Package) has become mainstream, and currently 3
It has been put to practical use up to more than 00 pins.

【0003】QFPは、図5(b)に示す単層リードフ
レーム520を用いたもので、図5(a)に示すよう
に、ダイパッド521上に半導体素子510を搭載し、
銀めっき等の表面処理がなされたインナーリード522
先端部と半導体素子510の端子511とをワイヤ53
0にて結線し、封止用樹脂540で封止を行い、この
後、ダムバー部524をカットし、アウターリード52
3をガルウイング状に成形したものである。このよう
に、QFPは、パッケージの4方向に外部回路と電気的
に接続するためのアウターリード523を設けた構造で
多端子化に対応できるものとして開発されてきた。ここ
で用いられる単層リードフレーム520は、通常、42
合金(42%ニッケル−鉄合金)あるいは銅合金などの
電気伝導率が高く,且つ機械的強度が大きい金属材を素
材とし、フォトエッチング法かあるいはスタンピング法
により、図5(b)に示すような形状に作製されてい
た。
The QFP uses the single-layer lead frame 520 shown in FIG. 5B. As shown in FIG. 5A, the semiconductor element 510 is mounted on the die pad 521.
Inner leads 522 with surface treatment such as silver plating
The tip portion and the terminal 511 of the semiconductor element 510 are connected to the wire 53.
No. 0 is connected, and sealing is performed with a sealing resin 540. After that, the dam bar portion 524 is cut and the outer lead 52
3 is formed into a gull wing shape. As described above, the QFP has been developed as a structure having outer leads 523 for electrically connecting to an external circuit in four directions of the package and capable of supporting multiple terminals. The single layer lead frame 520 used here is typically 42
As shown in FIG. 5B, a metal material having a high electric conductivity and a high mechanical strength, such as an alloy (42% nickel-iron alloy) or a copper alloy, is used as a raw material by a photo etching method or a stamping method. It was made into a shape.

【0004】しかし、半導体素子の信号処理の高速化、
高機能化は、更に多くの端子数を必要とするようになっ
てきた。QFPでは外部端子ピッチを狭めることによ
り、パッケージサイズを大きくすることなく多端子化に
対応してきたが、外部端子の狭ピッチ化に伴い、外部端
子自体の幅が細くなり、外部端子の強度が低下するた
め、フォーミング等の後工程におけるアウターリードの
スキュー対応やプラナリイティー(平坦性)維持が難し
くなり、実装に際しては、パッケージ搭載精度の維持が
難しくなるという実装面での問題を抱えていた。
However, speeding up of signal processing of semiconductor devices,
Higher functionality has required more terminals. In QFP, the external terminal pitch has been narrowed to accommodate multiple terminals without increasing the package size. However, as the external terminal pitch becomes narrower, the width of the external terminal itself becomes narrower and the strength of the external terminal decreases. Therefore, it is difficult to cope with skew of outer leads and to maintain planarity (flatness) in a post-process such as forming, and it is difficult to maintain package mounting accuracy in mounting.

【0005】このようなQFPの実装面での問題に対応
するため、BGA(Ball Grid Array)
と呼ばれるプラスチックパッケージが開発されてきた。
このBGAは、通常、両面基板の片面に半導体素子を搭
載し、もう一方の面に球状の半田ボールをパッケージの
外部端子として二次元的に配列し、スルーホールを通じ
て半導体素子と外部端子(半田ボール)との導通をとっ
たもので、実装性の対応を図ったパッケージである。B
GAはパッケージの4辺に外部端子を設けたQFPに比
べ、同じ外部端子数でも外部端子間隔(ピッチ)を大き
くとれるという利点があり、半導体装置の実装工程を難
しくせず、入出力端子の増加に対応できた。BGAは、
一般に図4に示すような構造である。図4(b)は図4
(a)の裏面(基板)側からみた図で、図4(c)はス
ルーホール450部を示したものである。このBGAは
BTレジン(ビスマレイミド樹脂)を代表とする耐熱性
を有する平板(樹脂板)の基材402の片面に半導体素
子401を搭載するダイパッド405と半導体素子40
1からボンディングワイヤ408により電気的に接続さ
れるボンディングパッド410を持ち、もう一方の面
に、外部回路と半導体装置との電気的、物理的接続を行
う格子状あるいは千鳥状に配列された半田ボールにより
形成した外部接続端子406をもち、外部接続端子40
6とボンディングパッド410の間を配線404とスル
ーホール450、配線404Aにより電気的に接続して
いる構造である。しかしながら、このBGAは、搭載す
る半導体素子とワイヤの結線を行う回路と、半導体装置
化した後にプリント基板に実装するための外部端子(半
田ボール)とを基板402の両面に設け、これらをスル
ーホール450を介して電気的に接続していた複雑な構
造であり、信号が通過する回路長が長くなり、その回路
デザインも複雑化している。また、耐熱及び絶縁樹脂基
材を用いて構成される従来型プラスチックBGA用の基
板を製造するプロセスは、樹脂基材の孔開けや表裏回路
の導通めっき処理及びソルダーレジスト印刷といった従
来のプリント基板と同様の工程が必要であり、全体とし
て長い工程にならざるをえない。これに加えて、高密度
化を実現するための回路プロセスにおいての制約が多く
存在し、低コストに製造することは難しい。そしてま
た、樹脂の熱膨張の影響によりスルーホール450が断
線を生じることもあり、信頼性の点で問題が多かった。
また、BTレジン等の基材402と封止用樹脂の間の熱
膨張係数の差によるパッケージの反りが大きくなった
り、基材402と封止用樹脂との接着力(密着力)が弱
く、密着不良による吸湿が原因のパッケージクラックが
発生する場合があり問題となっていた。
To cope with such a problem in mounting the QFP, a BGA (Ball Grid Array) is used.
A plastic package called a has been developed.
In this BGA, usually, a semiconductor element is mounted on one surface of a double-sided substrate, and spherical solder balls are two-dimensionally arranged on the other surface as external terminals of a package. ), And is a package that is compatible with mountability. B
The GA has the advantage that the external terminal interval (pitch) can be increased even with the same number of external terminals as compared with the QFP in which external terminals are provided on four sides of the package. Was able to respond. BGA is
Generally, the structure is as shown in FIG. FIG. 4B shows FIG.
FIG. 4C is a view seen from the back surface (substrate) side of (a), and FIG. This BGA is a die pad 405 and a semiconductor element 40 for mounting the semiconductor element 401 on one surface of a base material 402 of a flat plate (resin plate) having heat resistance represented by BT resin (bismaleimide resin).
1 to 1 have bonding pads 410 electrically connected by bonding wires 408, and on the other surface, solder balls arranged in a grid pattern or a zigzag pattern for electrically and physically connecting an external circuit and a semiconductor device. And an external connection terminal 406 formed by
6 and the bonding pad 410 are electrically connected by a wiring 404, a through hole 450, and a wiring 404A. However, in this BGA, a circuit for connecting a semiconductor element to be mounted and a wire is provided, and external terminals (solder balls) for mounting on a printed circuit board after being made into a semiconductor device are provided on both surfaces of the board 402, and these are through holes. This is a complicated structure that is electrically connected via 450, and the circuit length through which the signal passes becomes long, and the circuit design is also complicated. In addition, the process of manufacturing a substrate for a conventional plastic BGA composed of a heat-resistant and insulating resin base material is based on conventional printed circuit boards such as punching holes in a resin base material, conducting plating of front and back circuits, and solder resist printing. A similar process is required, and it is inevitably a long process as a whole. In addition, there are many restrictions on a circuit process for realizing high density, and it is difficult to manufacture at low cost. Further, the through hole 450 may be broken due to the influence of the thermal expansion of the resin, and there are many problems in terms of reliability.
In addition, the package warps due to the difference in thermal expansion coefficient between the base material 402 such as BT resin and the sealing resin, or the adhesive force (adhesion force) between the base material 402 and the sealing resin is weak. This is a problem because package cracks may occur due to moisture absorption due to poor adhesion.

【0006】[0006]

【発明が解決しようとする課題】上記のように、樹脂封
止型のBGA半導体装置においては、BTレジン等の基
材を用いて作製するために、その構造が複雑となり、信
頼性の点で問題が多い上に、使用する材質からくるパッ
ケージの反りや封止用樹脂の密着不良による吸湿が原因
のパッケージクラックの問題もあり、その対応が求めら
れていた。本発明は、これに対応するためのもので、図
4に示す従来の樹脂封止型のBGA半導体装置のように
複雑な構造でなく、比較的に簡単な構造で、且つ使用す
る材質からくるパッケージの反りや封止用樹脂の密着不
良による吸湿が原因のパッケージクラックの問題を伴う
ことがない、リードフレームを用いた樹脂封止型のBG
A半導体装置を提供しようとするものであり、同時にそ
の製造方法を提供しようとするものである。
As described above, since the resin-sealed BGA semiconductor device is manufactured by using a base material such as BT resin, its structure is complicated and reliability is low. In addition to many problems, there is also a problem of package cracks due to moisture absorption due to warpage of the package due to the material used and poor adhesion of the sealing resin, and there has been a demand for countermeasures. The present invention is to cope with this, and has a relatively simple structure and does not have a complicated structure like the conventional resin-encapsulated BGA semiconductor device shown in FIG. A resin-encapsulated BG using a lead frame that does not cause a package crack problem caused by moisture absorption due to package warpage or poor adhesion of a sealing resin.
A semiconductor device, and at the same time, a manufacturing method thereof.

【0007】[0007]

【課題を解決するための手段】本発明のリードフレーム
を用いたBGAタイプの樹脂封止型半導体装置は、少な
くとも、半導体素子の端子と電気的に接続を行うための
インナーリードと、該インナーリードと一体的に連結し
て外部回路と電気的接続を行うための外部端子と、半導
体素子を搭載するためのダイパッドとを平面的に設け、
且つ、外部端子を、二次元的に配列させたリードフレー
ムを用いた、BGAタイプの樹脂封止型半導体装置であ
って、リードフレームの一方の面側には半導体素子をダ
イパッド上に搭載し、半導体素子の端子(パッド)とイ
ンナーリード先端とをワイヤにて電気的に結線してお
り、他方の面には二次元的に配列した外部端子に一体的
に連結した外部電極を外部に露出するように設けてお
り、且つ、リードフレームの半導体素子が搭載される前
記一方の面側は封止用樹脂で、他方の面側は前記封止用
樹脂とは別の液状の樹脂を該封止用樹脂及びリードフレ
ームに密着させて硬化させた絶縁性樹脂で封止するよう
にして、全体が封止されていることを特徴とするもので
ある。そして、上記において、リードフレームの半導体
素子搭載側のダイパッド表面、インナーリード先端部の
表面、外部電極と連結する外部端子の表面には、めっき
処理がなされていることを特徴とするものである。そし
てまた、上記において、絶縁性樹脂は熱硬化型のソルダ
ーレジストからなることを特徴とするものである。尚、
絶縁性樹脂として、他に熱硬化型ポリイミド、熱硬化型
エボキシ、感光性のポリイミド樹脂もしくはエポキシ樹
脂、熱可塑性のポリイミド樹脂等を用いることが可能で
ある。
A BGA type resin-encapsulated semiconductor device using a lead frame of the present invention includes at least an inner lead for electrically connecting to a terminal of a semiconductor element, and the inner lead. An external terminal for integrally connecting with an external circuit for electrical connection with an external circuit, and a die pad for mounting a semiconductor element are provided in a plane.
A BGA type resin-sealed semiconductor device using a lead frame in which external terminals are two-dimensionally arranged, wherein a semiconductor element is mounted on a die pad on one surface side of the lead frame, The terminals (pads) of the semiconductor element and the tips of the inner leads are electrically connected by wires, and external electrodes integrally connected to external terminals arranged two-dimensionally are exposed to the outside on the other surface. And the one surface side on which the semiconductor element of the lead frame is mounted is a sealing resin, and the other surface side is a liquid resin different from the sealing resin. It is characterized in that it is entirely sealed so as to be sealed with an insulating resin which is in close contact with the resin for use and the lead frame and cured. Further, in the above, the surface of the die pad on the semiconductor element mounting side of the lead frame, the surface of the tip of the inner lead, and the surface of the external terminal connected to the external electrode are plated. Further, in the above, the insulating resin is made of a thermosetting solder resist. still,
Besides, as the insulating resin, thermosetting polyimide, thermosetting epoxy, photosensitive polyimide resin or epoxy resin, thermoplastic polyimide resin, or the like can be used.

【0008】本発明のリードフレームを用いたBGAタ
イプの樹脂封止型半導体装置の製造方法は、上記リード
フレームを用いたBGAタイプの樹脂封止型半導体装置
の製造方法であって、少なくとも、順に、(A)リード
フレームの一方の面側に、少なくとも、樹脂封止領域よ
り大きい範囲で、リードフレームを支持し、且つ、樹脂
封止する際の樹脂の封止用の枠として、支持フィルムを
貼付ける工程と、(B)支持フィルムを貼りつけた側で
ない、リードフレームのダイパッド上に半導体素子を搭
載し、半導体素子の端子(パッド)とインナーリードの
先端とをワイヤにて電気的に結線する工程と、(C)リ
ードフレームの半導体素子を搭載した側を、封止用樹脂
にて封止する工程と、(D)支持フィルムを剥離除去
し、支持フィルムを剥離除去した側の、略樹脂封止領域
に相当する領域に、封止用樹脂とは別の液状の樹脂を該
封止用樹脂及びリードフレームに密着させて塗膜した後
に、前記液状の樹脂にて、リードフレームの外部端子領
域が外部に露出する開口を設けて、絶縁性樹脂を硬化さ
せて形成する工程と、(E)絶縁性樹脂の開口を通し、
リードフレームの外部端子に一体的に連結し、外部に露
出する半田からなる外部電極を形成する工程とからなる
ことを特徴とするものである。そして、上記において、
絶縁性樹脂は熱硬化型のソルダーレジストからなること
を特徴とするものである。
A method of manufacturing a BGA type resin-encapsulated semiconductor device using the lead frame of the present invention is a method of manufacturing a BGA type resin-encapsulated semiconductor device using the lead frame, which is at least in order. , (A) A support film is provided on one surface side of the lead frame as a frame for supporting the lead frame at least in a range larger than the resin sealing region and for sealing the resin when the resin is sealed. The step of attaching, and (B) mounting the semiconductor element on the die pad of the lead frame, not on the side where the support film is attached, and electrically connecting the terminal (pad) of the semiconductor element and the tip of the inner lead with a wire. And (C) a step of sealing the side of the lead frame on which the semiconductor element is mounted with a sealing resin, and (D) removing and removing the support film to form a support film. A liquid resin different from the sealing resin is closely adhered to the sealing resin and the lead frame in a region corresponding to the substantially resin sealing region on the separated and removed side, and then the liquid resin is formed. In the step of forming an opening through which the external terminal region of the lead frame is exposed to the outside and hardening the insulating resin, (E) through the opening of the insulating resin,
And a step of integrally connecting to an external terminal of the lead frame and forming an external electrode made of solder exposed to the outside. And in the above,
The insulating resin is characterized by comprising a thermosetting solder resist.

【0009】尚、ここでは、平面的にとは、ダイパッド
とインナーリード、外部端子とが同一平面上、および略
同一平面上にあることを意味し、ダイパッドをダウンセ
ット処理した場合も含む。
Here, the term "planar" means that the die pad, the inner lead, and the external terminal are on the same plane and substantially on the same plane, and also includes the case where the die pad is down-set.

【0010】[0010]

【作用】本発明のリードフレームを用いたBGAタイプ
の樹脂封止型半導体装置は、上記のように構成すること
により、図6に示す従来のBGAタイプの樹脂封止型半
導体装置に比べ、品質的な問題や、製造コストの問題が
少ないBGAタイプの樹脂封止型半導体装置の提供を可
能とするものである。詳しくは、少なくとも、半導体素
子の端子と電気的に接続を行うためのインナーリード
と、該インナーリードと一体的に連結して外部回路と電
気的接続を行うための外部端子と、半導体素子を搭載す
るためのダイパッドとを平面的に設け、且つ、外部端子
を、二次元的に配列させたリードフレームを用い、二次
元的に配列した外部端子に一体的に連結した外部電極を
外部に露出するように設けていることより、図4に示す
従来のBGAタイプの樹脂封止型半導体装置に比べ、簡
単な構造でBGAタイプの半導体装置を実現している。
また、リードフレームの半導体素子が搭載される前記一
方の面側は封止用樹脂で、他方の面側は前記封止用樹脂
とは別の液状の樹脂を該封止用樹脂及びリードフレーム
に密着させて硬化させた絶縁性樹脂で封止するようにし
て、全体が封止されていることにより、封止用樹脂と熱
硬化型の絶縁性樹脂との密着性を、図4に示す従来のB
GAタイプの樹脂封止型半導体装置における封止用樹脂
と基材(BTレジン)との密着性よりも向上させること
を可能としており、結果としてパッケージクラックの少
ないものとしている。具体的には、絶縁性樹脂を熱硬化
型のソルダーレジストとすることにより、封止用樹脂と
密着性の良い状態で、且つ、絶縁性樹脂のリードフレー
ムの外部端子領域に相当する領域に、リソグラフィー技
術による製版による方法で外部電極用の開口を作製する
ことを可能としている。また、リードフレームの半導体
素子搭載側のダイパッド表面、インナーリード先端部の
表面、外部電極と連結する外部端子の表面には、めっき
処理がなされていることにより、導体素子の搭載、ワイ
ボンディング、外部電極の形成を確実なものとしてい
る。本発明のリードフレームを用いたBGAタイプの樹
脂封止型半導体装置の製造方法は、上記のように構成す
ることにより、本発明のリードフレームを用いたBGA
タイプの半導体装置の作製を可能としている。特に、絶
縁性樹脂は熱硬化型のソルダーレジストを用いることに
より、炭酸ガスレーザやエキシマレーザ等のガスを用い
開口を作成する必要がないものとしている。
The BGA type resin-encapsulated semiconductor device using the lead frame of the present invention is configured as described above, so that the quality is better than that of the conventional BGA type resin-encapsulated semiconductor device shown in FIG. It is possible to provide a BGA type resin-encapsulated semiconductor device with less problems in manufacturing and manufacturing cost. Specifically, at least an inner lead for electrically connecting with a terminal of a semiconductor element, an external terminal for integrally connecting with the inner lead to electrically connect with an external circuit, and mounting a semiconductor element. A lead pad in which the external pad and the external terminals are two-dimensionally arranged, and the external electrodes integrally connected to the two-dimensionally arranged external terminals are exposed to the outside. As a result, the BGA type semiconductor device is realized with a simple structure as compared with the conventional BGA type resin-sealed semiconductor device shown in FIG.
Further, the one surface side on which the semiconductor element of the lead frame is mounted is a sealing resin, and the other surface side is a liquid resin different from the sealing resin on the sealing resin and the lead frame. Since the whole is sealed by sealing with the insulating resin that is closely adhered and cured, the adhesiveness between the sealing resin and the thermosetting insulating resin is shown in FIG. B
It is possible to improve the adhesiveness between the encapsulating resin and the base material (BT resin) in the GA type resin-encapsulated semiconductor device, and as a result, the package cracks are reduced. Specifically, by using an insulating resin as a thermosetting solder resist, it is in a state of good adhesion with the sealing resin, and in an area corresponding to the external terminal area of the insulating resin lead frame, It is possible to make an opening for an external electrode by a method of plate making by a lithography technique. In addition, the surface of the die pad on the side of the semiconductor element mounting of the lead frame, the surface of the tip of the inner lead, and the surface of the external terminal connected to the external electrode are plated, so that the mounting of the conductive element, the wire bonding, the external The formation of electrodes is ensured. The method for manufacturing a BGA type resin-encapsulated semiconductor device using the lead frame of the present invention is configured as described above, so that the BGA using the lead frame of the present invention is configured.
It enables the manufacture of semiconductor devices of the type. In particular, by using a thermosetting solder resist as the insulating resin, it is not necessary to create an opening using a gas such as a carbon dioxide gas laser or an excimer laser.

【0011】[0011]

【実施例】本発明のリードフレームを用いたBGAタイ
プの樹脂封止型半導体装置の実施例を図にもとづいて説
明する。図1は実施例のリードフレームを用いたBGA
タイプの樹脂封止型半導体装置断面図であり、図2
(a)は実施例の半導体装置に用いられた外形加工後の
リードフレームを示したもので、図2(b)は図2
(a)の約1/4部分の拡大図である。尚、図2(a)
においては、分かり易くするため、図2(b)に示す固
定用テープを処略して示している。また、図2(a)に
おいては、全体を分かり易くするために図2(b)に比
べ、インナーリードの数、外部端子部の数等を少なくし
て示してある。図1、図2中、100は半導体装置、1
10は半導体素子、120はリードフレーム、121は
ダイパッド、121Aは吊りリード、122はインナー
リード、122Aインナーリード先端、122Bは連結
部、123は外部端子、123Bは連結部、124ダム
バー、126は固定用テープ、130は絶縁性樹脂、1
40は封止用樹脂、150はワイヤ、160は外部電極
である。
EXAMPLE An example of a BGA type resin-sealed semiconductor device using the lead frame of the present invention will be described with reference to the drawings. FIG. 1 is a BGA using the lead frame of the embodiment.
2 is a cross-sectional view of a resin-sealed semiconductor device of a type shown in FIG.
FIG. 2A shows a lead frame used for the semiconductor device of the embodiment after the outer shape processing, and FIG.
It is an enlarged view of about 1/4 part of (a). FIG. 2 (a)
In FIG. 2, the fixing tape shown in FIG. 2B is omitted for clarity. Further, in FIG. 2A, the number of inner leads, the number of external terminal portions, and the like are shown smaller than those in FIG. 2B in order to make the whole easier to understand. 1 and 2, 100 is a semiconductor device, 1
Reference numeral 10 is a semiconductor element, 120 is a lead frame, 121 is a die pad, 121A is a suspension lead, 122 is an inner lead, 122A inner lead tips, 122B is a connecting portion, 123 is an external terminal, 123B is a connecting portion, 124 dam bars, and 126 is fixed. Tape, 130 is insulating resin, 1
40 is a sealing resin, 150 is a wire, and 160 is an external electrode.

【0012】本実施例のリードフレームを用いたBGA
タイプの樹脂封止型半導体装置100は、図2に示す半
導体素子の端子と電気的に接続を行うためのインナーリ
ード122と、該インナーリード122と一体的に連結
して外部回路と電気的接続を行うための外部端子123
と、半導体素子を搭載するためのダイパッド121と略
平面状に設け、且つ、外部端子123を二次元的に配列
させたリードフレーム120を用いたもので、リードフ
レーム120の一方の面側には半導体素子110をダイ
パッド121上に搭載し、半導体素子110の端子(パ
ッド)111とインナーリード先端122Aとをワイヤ
150にて電気的に結線しており、他方の面には二次元
的に配列した外部端子123に一体的に連結した外部電
極160を外部に露出するように設けている。そして、
本実施例のリードフレームを用いたBGAタイプの樹脂
封止型半導体装置100は、リードフレーム120の半
導体素子110が搭載される、一方の面側は封止用樹脂
140で、他方の面側は熱硬化型の絶縁性樹脂130で
封止するようにして、全体が封止されている。絶縁性樹
脂130は、封止用樹脂140とは別の液状の樹脂を該
封止用樹140及びリードフレーム120に密着させて
硬化させたものである。
BGA using the lead frame of this embodiment
The resin-sealed semiconductor device 100 of the type is an inner lead 122 for electrically connecting to a terminal of a semiconductor element shown in FIG. 2, and an inner lead 122 integrally connected to the inner lead 122 to electrically connect to an external circuit. External terminal 123 for performing
And a lead frame 120 in which a die pad 121 for mounting a semiconductor element is provided in a substantially planar shape, and external terminals 123 are two-dimensionally arranged, and one surface side of the lead frame 120 is provided. The semiconductor element 110 is mounted on the die pad 121, and the terminal (pad) 111 of the semiconductor element 110 and the inner lead tip 122A are electrically connected by the wire 150, and the other surface is arranged two-dimensionally. The external electrode 160 integrally connected to the external terminal 123 is provided so as to be exposed to the outside. And
A BGA type resin-sealed semiconductor device 100 using the lead frame of the present embodiment is mounted with the semiconductor element 110 of the lead frame 120. One surface side is the sealing resin 140 and the other surface side is The whole is sealed so as to be sealed with the thermosetting insulating resin 130. The insulating resin 130 is a liquid resin different from the sealing resin 140 that is adhered to the sealing resin 140 and the lead frame 120 and cured.

【0013】リードフレーム120としては、図2
(a)に示すようにエッチングにて外形加工された、
0.1mm厚の銅合金を用いた。リードフレームの材質
は、銅合金の他42合金(42%ニッケル−鉄合金)で
も良い。外形加工後のリードフレームにおいては、図2
(a)に示すように、外部端子123は、リードフレー
ム120の外周部に設けられた樹脂封止の際のダムとな
るダムバー124に一体的に連結部123Bを介して連
結した状態であるが、ダムバー124部を含め不要の部
分は、後述する製造工程の途中で、切断除去される。ま
た、インナーリード先端122Aは、先端を連結した状
態で外形加工されるが、図2(c)(イ)に示すよう
に、所定の位置に固定用のテープ126を貼り固定した
後、図2(c)(ロ)に示すように、不要な連結部12
2Bを切断除去して使用される。尚、インナーリード先
端122Aは、図2(c)(イ)に示すように、先端部
のみを連結部122Bで連結して外形加工される他に、
ダイパッドに連結するようにして外形加工される場合も
ある。リードフレーム120のダイパッド121の半導
体素子搭載側面、インナーリード122の先端のワイヤ
ボンディング面、外部端子123の外部電極160側面
には、それぞれ、半導体素子110、ワイヤ150、外
部電極160との接続のためのめっきを施しておくが、
めっき工程は、図2(c)(イ)に示す固定用のテープ
126をテーピングする前に行う。リードフレーム10
0の厚さは、一般的にはリードフレーム素材の厚さが薄
いものほど微細加工、即ち、インナーリード先端122
Aの狭いピッチ化が可能であるが、薄くなるに従いリー
ドフレーム全体の強度の確保が難しくなる為、インナー
リード先端部のみを薄肉状にしてエッチングにより外形
加工してリードフレームを作成して、インナーリードの
狭ピッチ化とアウターリードの強度確保を共に達成して
も良い。
The lead frame 120 is shown in FIG.
The outer shape was processed by etching as shown in (a),
A 0.1 mm thick copper alloy was used. The material of the lead frame may be 42 alloy (42% nickel-iron alloy) other than copper alloy. In the lead frame after the outer shape processing, as shown in FIG.
As shown in (a), the external terminal 123 is in a state of being integrally connected to the dam bar 124 provided on the outer peripheral portion of the lead frame 120 and serving as a dam at the time of resin sealing via the connecting portion 123B. The unnecessary portion including the dam bar 124 is cut and removed during the manufacturing process described later. Further, the inner lead tip 122A is subjected to outer shape processing in a state where the tips are connected. However, as shown in FIGS. 2C and 2A, after fixing tape 126 is fixed and fixed at a predetermined position, as shown in FIG. As shown in (c) and (b), the unnecessary connecting portion 12
Used by cutting off 2B. As shown in FIG. 2 (c) (a), the inner lead tip 122A is externally machined by connecting only the tip with the connecting portion 122B.
In some cases, the outer shape is processed so as to be connected to the die pad. The semiconductor chip 110, the wire 150, and the external electrode 160 are connected to the semiconductor chip mounting side surface of the die pad 121 of the lead frame 120, the wire bonding surface of the tip of the inner lead 122, and the external electrode 160 side surface of the external terminal 123, respectively. Plating is done,
The plating step is performed before taping the fixing tape 126 shown in FIGS. Lead frame 10
Generally, the thickness of 0 is finer as the lead frame material is thinner, that is, the inner lead tip 122.
Although it is possible to narrow the pitch of A, it becomes difficult to secure the strength of the entire lead frame as the thickness becomes thinner. Both narrowing of the lead pitch and securing of the strength of the outer lead may be achieved.

【0014】絶縁性樹脂130としては、封止用樹脂1
40と間隙(空隙)を持たず密着するため、液状のもの
を硬化させる。本実施例においては、熱硬化型のソルダ
ーレジスト(太陽インキ製造株式会社製、型番号PSR
−4000)を用いた。
As the insulating resin 130, the sealing resin 1 is used.
Since it adheres to 40 without any gap, a liquid material is cured. In this example, a thermosetting solder resist (manufactured by Taiyo Ink Mfg. Co., model number PSR) was used.
-4000) was used.

【0015】外部電極160は、二次元的に配列された
外部端子123に一体的に連結するように、半田ボール
により作製され、外部に露出するように形成されてい
る。
The external electrode 160 is made of solder balls so as to be integrally connected to the external terminals 123 arranged two-dimensionally, and is formed so as to be exposed to the outside.

【0016】次いで、本発明のリードフレームを用いた
BGAタイプの樹脂封止型半導体装置の製造方法の実施
例を図3に基づいて説明する。先ず、めっき処理等が施
された図2(a)に示すリードフレーム120に対し、
固定用テープ126を所定の位置に貼付け、図2(c)
(ロ)に示すように、不要な連結部122Bを切断除去
した(図3(a))後、一面に接着剤を付けたフィルム
180を、接着剤を介して全面に貼り付けた後、フィル
ム180にリードフレームが支持された状態で不要部分
を切断除去した。(図3(b)) フィルム180としてはポリイミドベースのニッカン株
式会社製のCISVタイプの接着剤付きフィルムを用い
たが、必ずしもこれに限定はされない。例えば、エポキ
シ樹脂、アクリル樹脂等でも良い。しかし、工程におけ
る熱処理に耐え、且つ、品質に影響をあたえないように
容易に剥離できることが必要である。次いで、半導体素
子110をリードフレーム120のフィルム180が貼
付けられていない側のダイパッド121上にダイボンデ
ィングにて搭載した後、ワイヤ150にて半導体素子1
10の端子(パッド)111とインナーリード先端12
2Aとを電気的に結線した。(図3(c)) 次いで、リードフレーム120の半導体素子110搭載
側から、半導体素子110、ワイヤ150、リードフレ
ーム120等の所定領域を封止用樹脂140にて封入し
た。(図3(d)) 次いで、フィルム180を剥離した。(図3(e)) 剥離は熱を180°Cかけて容易に剥離できた。この
後、リードフレーム120のフィルム180を剥離した
側の、封止用樹脂領域に相当する領域に、液状の感光性
のソルダーレジスト(太陽インキ製造株式会社製、型番
号PSR−4000)を塗布し、乾燥して厚さ略0.0
3mmの膜を形成した後、所定のパターン版を介して所
定領域のみを露光し、水酸化ナトリウム溶液で現像処理
をして、外部端子123に対応する領域に外部端子12
3が外部に露出するように開口131を形成した。(図
3(f)) 次いで、ソルダーレジストをベイキング(乾燥)した
後、開口320に半田からなる外部電極160を形成し
た。(図3(g)) 尚、半田ボールからなる外部電極(端子)160の形成
は、リードフレーム120の外部端子123が露出した
絶縁性樹脂130の開口131に半田ボールを溶融して
作製する。
Next, an embodiment of a method for manufacturing a BGA type resin-sealed semiconductor device using the lead frame of the present invention will be described with reference to FIG. First, with respect to the lead frame 120 shown in FIG.
The fixing tape 126 is attached at a predetermined position, as shown in FIG.
As shown in (b), after the unnecessary connecting portion 122B is cut and removed (FIG. 3A), the film 180 having an adhesive on one surface is attached to the entire surface through the adhesive, and then the film The unnecessary portion was cut and removed while the lead frame was supported by 180. (FIG. 3 (b)) As the film 180, a CISV type adhesive film with a polyimide base manufactured by Nikkan Corporation was used, but the film 180 is not necessarily limited to this. For example, epoxy resin, acrylic resin or the like may be used. However, it is necessary to withstand the heat treatment in the process and be able to easily peel off so as not to affect the quality. Next, the semiconductor element 110 is mounted on the die pad 121 on the side of the lead frame 120 on which the film 180 is not attached by die bonding, and then the semiconductor element 1 is connected by the wire 150.
10 terminals (pads) 111 and inner lead tips 12
2A was electrically connected. (FIG. 3C) Next, a predetermined area of the semiconductor element 110, the wire 150, the lead frame 120, etc. was sealed with the sealing resin 140 from the side of the lead frame 120 on which the semiconductor element 110 was mounted. (FIG. 3D) Next, the film 180 was peeled off. (FIG. 3 (e)) Peeling could be easily done by applying heat at 180 ° C. Then, a liquid photosensitive solder resist (manufactured by Taiyo Ink Mfg. Co., model number PSR-4000) is applied to a region corresponding to the resin region for sealing on the side of the lead frame 120 from which the film 180 is peeled off. , Dried to a thickness of about 0.0
After forming a film of 3 mm, only a predetermined area is exposed through a predetermined pattern plate and developed with a sodium hydroxide solution to form an external terminal 12 in an area corresponding to the external terminal 123.
The opening 131 was formed so that 3 was exposed to the outside. (FIG. 3F) Next, after baking (drying) the solder resist, the external electrodes 160 made of solder were formed in the openings 320. (FIG. 3 (g)) The external electrodes (terminals) 160 made of solder balls are formed by melting the solder balls into the openings 131 of the insulating resin 130 where the external terminals 123 of the lead frame 120 are exposed.

【0017】[0017]

【効果】本発明のリードフレームを用いたBGAタイプ
の樹脂封止型半導体装置は、上記のように、図4に示す
従来のBTレジンからなる基材を用いた複雑な構造のも
のに比べ、リードフレームをコア材として回路を形成す
ることにより、構造を簡単なものとしており、製作上か
らくる信頼性の低下の問題を無くし、且つ、図4に示す
従来のものにおける、基材と樹脂との熱膨張率の違いに
よる反りの発生や、封止用樹脂の密着性不良からくる吸
湿が原因のパッケージクラックの発生がないものとして
いる。また、本発明のリードフレームを用いたBGAタ
イプの樹脂封止型半導体装置の製造方法は、上記のよう
に、本発明のリードフレームを用いたBGAタイプの樹
脂封止型半導体装置の作製を可能とするものであり、特
に、絶縁性樹脂として熱硬化型のソルダーレジストを用
いていることにより、その作製を簡単なものとしてい
る。
As described above, the BGA type resin-encapsulated semiconductor device using the lead frame of the present invention has a complex structure using the base material made of the conventional BT resin shown in FIG. By forming the circuit using the lead frame as the core material, the structure is simplified, the problem of deterioration in reliability due to manufacturing is eliminated, and the base material and resin in the conventional one shown in FIG. It is assumed that there is no occurrence of warpage due to the difference in the coefficient of thermal expansion and no package cracking due to moisture absorption due to poor adhesion of the sealing resin. Further, as described above, the method for manufacturing a BGA type resin-sealed semiconductor device using the lead frame of the present invention can manufacture the BGA type resin-sealed semiconductor device using the lead frame of the present invention. In particular, since a thermosetting solder resist is used as the insulating resin, its manufacture is simplified.

【図面の簡単な説明】[Brief description of the drawings]

【図1】実施例のリードフレームを用いたBGAタイプ
の樹脂封止型半導体装置の断面図
FIG. 1 is a cross-sectional view of a BGA type resin-sealed semiconductor device using a lead frame according to an embodiment.

【図2】実施例のリードフレームリードフレームを用い
たBGAタイプの樹脂封止型半導体装置に使用されたリ
ードフレームの概略図
FIG. 2 is a schematic view of a lead frame used in a BGA type resin-sealed semiconductor device using the lead frame lead frame of the embodiment.

【図3】実施例のリードフレームを用いたBGAタイプ
の樹脂封止型半導体装置の製造方法の工程図
FIG. 3 is a process diagram of a method for manufacturing a BGA type resin-encapsulated semiconductor device using the lead frame of the example.

【図4】従来のBGAを説明するための図FIG. 4 is a diagram for explaining a conventional BGA.

【図5】従来の樹脂封止型半導体装置と単層リードフレ
ームを説明するための図
FIG. 5 is a diagram for explaining a conventional resin-sealed semiconductor device and a single-layer lead frame.

【符号の説明】[Explanation of symbols]

100 半導体装置 110 半導体素子 120 リードフレーム 121 ダイパッド 121A 吊りリード 122 インナーリード 122A インナーリード先端 122B、123B 連結部 123 外部端子 124 ダムバー 126 固定用テープ 130 絶縁性樹脂 131 開口 140 封止用樹脂 150 ワイヤ 160 外部電極 180 フィルム 401 半導体素子 402 基材 403 モールドレジン 404、404A 配線 405 ダイパッド 406 外部接続端子 408 ボンデイングワイヤ 410 ボンディングパッド 418 めっき部 450 スルーホール 451 熱伝導ビア 500 半導体装置 510 半導体素子 511 電極部(パッド) 520 (単層)リードフレーム 521 ダイパッド 522 インナーリード 522A インナーリード先端部 523 アウターリード 524 ダムバー 525 フレーム(枠)部 530 ワイヤ 540 封止樹脂 100 semiconductor device 110 semiconductor element 120 lead frame 121 die pad 121A suspension lead 122 inner lead 122A inner lead tip 122B, 123B connecting part 123 external terminal 124 dambar 126 fixing tape 130 insulating resin 131 opening 140 sealing resin 150 wire 160 external Electrode 180 Film 401 Semiconductor element 402 Base material 403 Mold resin 404, 404A Wiring 405 Die pad 406 External connection terminal 408 Bonding wire 410 Bonding pad 418 Plating part 450 Through hole 451 Thermal conductive via 500 Semiconductor device 510 Semiconductor device 511 Electrode part (pad) 520 (single layer) lead frame 521 die pad 522 inner lead 522A inner lead End 523 outer lead 524 a dam bar 525 frames (frame) unit 530 wire 540 sealing resin

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 少なくとも、半導体素子の端子と電気的
に接続を行うためのインナーリードと、該インナーリー
ドと一体的に連結して外部回路と電気的接続を行うため
の外部端子と、半導体素子を搭載するためのダイパッド
とを平面的に設け、且つ、外部端子を、二次元的に配列
させたリードフレームを用いた、BGAタイプの樹脂封
止型半導体装置であって、リードフレームの一方の面側
には半導体素子をダイパッド上に搭載し、半導体素子の
端子(パッド)とインナーリード先端とをワイヤにて電
気的に結線しており、他方の面には二次元的に配列した
外部端子に一体的に連結した外部電極を外部に露出する
ように設けており、且つ、リードフレームの半導体素子
が搭載される前記一方の面側は封止用樹脂で、他方の面
側は前記封止用樹脂とは別の液状の樹脂を該封止用樹脂
及びリードフレームに密着させて硬化させた絶縁性樹脂
で封止するようにして、全体が封止されていることを特
徴とするリードフレームを用いたBGAタイプの樹脂封
止型半導体装置。
1. At least an inner lead for electrically connecting to a terminal of a semiconductor element, an external terminal for integrally connecting with the inner lead to electrically connect to an external circuit, and a semiconductor element. A BGA type resin-encapsulated semiconductor device using a lead frame in which a die pad for mounting a semiconductor device is provided in a plane, and external terminals are two-dimensionally arranged. The semiconductor element is mounted on the die pad on the surface side, and the terminal (pad) of the semiconductor element and the tip of the inner lead are electrically connected by a wire, and the other surface is a two-dimensionally arranged external terminal. The external electrode integrally connected to the lead frame is exposed to the outside, and the one surface side of the lead frame on which the semiconductor element is mounted is the sealing resin, and the other surface side is the sealing resin. Resin A lead frame is characterized in that a liquid resin different from the above is closely sealed to the sealing resin and the lead frame and is sealed with an insulating resin that has been hardened. BGA type resin-encapsulated semiconductor device.
【請求項2】 請求項1において、リードフレームの半
導体素子搭載側のダイパッド表面、インナーリード先端
部の表面、外部電極と連結する外部端子の表面には、め
っき処理がなされていることを特徴とするリードフレー
ムを用いたBGAタイプの樹脂封止型半導体装置。
2. The plating according to claim 1, wherein the surface of the die pad on the semiconductor element mounting side of the lead frame, the surface of the tip of the inner lead, and the surface of the external terminal connected to the external electrode are plated. BGA type resin-encapsulated semiconductor device using a lead frame.
【請求項3】 請求項1ないし2において、絶縁性樹脂
は熱硬化型のソルダーレジストからなることを特徴とす
るリードフレームを用いたBGAタイプの樹脂封止型半
導体装置。
3. A BGA type resin-encapsulated semiconductor device using a lead frame according to claim 1, wherein the insulating resin is a thermosetting solder resist.
【請求項4】 請求項1ないし3記載のリードフレーム
を用いたBGAタイプの樹脂封止型半導体装置の製造方
法であって、少なくとも、順に、(A)リードフレーム
の一方の面側に、少なくとも、樹脂封止領域より大きい
範囲で、リードフレームを支持し、且つ、樹脂封止する
際の樹脂の封止用の枠として、支持フィルムを貼付ける
工程と、(B)支持フィルムを貼りつけた側でない、リ
ードフレームのダイパッド上に半導体素子を搭載し、半
導体素子の端子(パッド)とインナーリードの先端とを
ワイヤにて電気的に結線する工程と、(C)リードフレ
ームの半導体素子を搭載した側を、封止用樹脂にて封止
する工程と、(D)支持フィルムを剥離除去し、支持フ
ィルムを剥離除去した側の、略樹脂封止領域に相当する
領域に、封止用樹脂とは別の液状の樹脂を該封止用樹脂
及びリードフレームに密着させて塗膜した後に、前記液
状の樹脂にて、リードフレームの外部端子領域が外部に
露出する開口を設けて、絶縁性樹脂を硬化させて形成す
る工程と、(E)絶縁性樹脂の開口を通し、リードフレ
ームの外部端子に一体的に連結し、外部に露出する半田
からなる外部電極を形成する工程とからなることを特徴
とするリードフレームを用いたBGAタイプの樹脂封止
型半導体装置の製造方法。
4. A method of manufacturing a BGA type resin-encapsulated semiconductor device using the lead frame according to claim 1, wherein (A) at least one surface of the lead frame has at least one surface side. , A step of attaching a support film as a frame for supporting the lead frame and encapsulating the resin in the resin encapsulation in a range larger than the resin encapsulation area, and (B) attaching the support film Side, the step of mounting the semiconductor element on the die pad of the lead frame and electrically connecting the terminal (pad) of the semiconductor element and the tip of the inner lead with a wire, and (C) mounting the semiconductor element of the lead frame The step of sealing the formed side with a sealing resin, and (D) the supporting film is peeled off and removed, and the sealing resin is placed on a region corresponding to the substantially resin sealing region on the side where the supporting film is peeled off. A liquid resin different from the above is adhered to the sealing resin and the lead frame to form a coating film, and then the liquid resin is provided with an opening through which the external terminal region of the lead frame is exposed to the outside. And a step of forming the resin by curing, and a step (E) of forming an external electrode made of solder that is exposed to the outside and integrally connected to an external terminal of the lead frame through the opening of the insulating resin. A method for manufacturing a BGA type resin-encapsulated semiconductor device using a lead frame.
【請求項5】 請求項4において、絶縁性樹脂は熱硬化
型のソルダーレジストからなることを特徴とするリード
フレームを用いたBGAタイプの樹脂封止型半導体装置
の製造方法。
5. The method for manufacturing a BGA type resin-encapsulated semiconductor device using a lead frame according to claim 4, wherein the insulating resin is a thermosetting solder resist.
JP7290583A 1995-10-13 1995-10-13 Resin-sealed semiconductor device of bga type using lead frame and its manufacture Pending JPH09116045A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7290583A JPH09116045A (en) 1995-10-13 1995-10-13 Resin-sealed semiconductor device of bga type using lead frame and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7290583A JPH09116045A (en) 1995-10-13 1995-10-13 Resin-sealed semiconductor device of bga type using lead frame and its manufacture

Publications (1)

Publication Number Publication Date
JPH09116045A true JPH09116045A (en) 1997-05-02

Family

ID=17757904

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7290583A Pending JPH09116045A (en) 1995-10-13 1995-10-13 Resin-sealed semiconductor device of bga type using lead frame and its manufacture

Country Status (1)

Country Link
JP (1) JPH09116045A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09213839A (en) * 1996-01-30 1997-08-15 Nec Kyushu Ltd Plastic package type semiconductor integrated circuit and manufacture thereof
JPH11297750A (en) * 1998-04-08 1999-10-29 Matsushita Electron Corp Semiconductor device, manufacture thereof, and mounting of the semiconductor device
JP2003078108A (en) * 2001-08-31 2003-03-14 Hitachi Chem Co Ltd Semiconductor package board, semiconductor package using the same and its laminate, and method of manufacturing them
JP2010538483A (en) * 2007-09-04 2010-12-09 シーメンス アクチエンゲゼルシヤフト Electronic component manufacturing method and contact connection method using a substrate plate, in particular a DCB ceramic substrate plate
JP2011233901A (en) * 2010-04-27 2011-11-17 Aptos Technology Corp Qfn(quad flat non leaded semiconductor package) semiconductor package, method for manufacturing the same, and metal plate used for manufacturing the same
WO2012124239A1 (en) * 2011-03-17 2012-09-20 住友電気工業株式会社 Semiconductor device and method for manufacturing semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04277636A (en) * 1991-03-05 1992-10-02 Shinko Electric Ind Co Ltd Preparation of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04277636A (en) * 1991-03-05 1992-10-02 Shinko Electric Ind Co Ltd Preparation of semiconductor device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09213839A (en) * 1996-01-30 1997-08-15 Nec Kyushu Ltd Plastic package type semiconductor integrated circuit and manufacture thereof
US6028356A (en) * 1996-01-30 2000-02-22 Nec Corporation Plastic-packaged semiconductor integrated circuit
JPH11297750A (en) * 1998-04-08 1999-10-29 Matsushita Electron Corp Semiconductor device, manufacture thereof, and mounting of the semiconductor device
JP2003078108A (en) * 2001-08-31 2003-03-14 Hitachi Chem Co Ltd Semiconductor package board, semiconductor package using the same and its laminate, and method of manufacturing them
JP2010538483A (en) * 2007-09-04 2010-12-09 シーメンス アクチエンゲゼルシヤフト Electronic component manufacturing method and contact connection method using a substrate plate, in particular a DCB ceramic substrate plate
JP2011233901A (en) * 2010-04-27 2011-11-17 Aptos Technology Corp Qfn(quad flat non leaded semiconductor package) semiconductor package, method for manufacturing the same, and metal plate used for manufacturing the same
WO2012124239A1 (en) * 2011-03-17 2012-09-20 住友電気工業株式会社 Semiconductor device and method for manufacturing semiconductor device
US8659129B2 (en) 2011-03-17 2014-02-25 Sumitomo Electric Industries, Ltd. Semiconductor device and method of manufacturing same

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