JPH08504541A - 電気的相互接続構造 - Google Patents

電気的相互接続構造

Info

Publication number
JPH08504541A
JPH08504541A JP6514230A JP51423094A JPH08504541A JP H08504541 A JPH08504541 A JP H08504541A JP 6514230 A JP6514230 A JP 6514230A JP 51423094 A JP51423094 A JP 51423094A JP H08504541 A JPH08504541 A JP H08504541A
Authority
JP
Japan
Prior art keywords
layer
film
substructure
substrate
signal layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6514230A
Other languages
English (en)
Japanese (ja)
Inventor
ドロシー，ロバート・グレン
フエイス，デイーン・ウイレツト
ローバツチヤー，ダニエル・ブルース
Original Assignee
イー・アイ・デユポン・ドウ・ヌムール・アンド・カンパニー
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by イー・アイ・デユポン・ドウ・ヌムール・アンド・カンパニー filed Critical イー・アイ・デユポン・ドウ・ヌムール・アンド・カンパニー
Publication of JPH08504541A publication Critical patent/JPH08504541A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5385—Assembly of a plurality of insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49888—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials the conductive materials containing superconducting material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Containers, Films, And Cooling For Superconductive Devices (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP6514230A 1992-12-15 1993-12-07 電気的相互接続構造 Pending JPH08504541A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US99227592A 1992-12-15 1992-12-15
US07/992,275 1992-12-15
US8046393A 1993-06-21 1993-06-21
US08/080,463 1993-06-21
PCT/US1993/011632 WO1994014201A1 (en) 1992-12-15 1993-12-07 Electrical interconnect structures

Publications (1)

Publication Number Publication Date
JPH08504541A true JPH08504541A (ja) 1996-05-14

Family

ID=26763551

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6514230A Pending JPH08504541A (ja) 1992-12-15 1993-12-07 電気的相互接続構造

Country Status (8)

Country Link
US (1) US5567330A (enExample)
EP (1) EP0674808B1 (enExample)
JP (1) JPH08504541A (enExample)
KR (1) KR950704819A (enExample)
CA (1) CA2150913A1 (enExample)
DE (1) DE69309306T2 (enExample)
TW (1) TW245839B (enExample)
WO (1) WO1994014201A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190045362A (ko) * 2016-09-13 2019-05-02 구글 엘엘씨 적층된 양자 디바이스들에서의 손실 감소

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5759625A (en) * 1994-06-03 1998-06-02 E. I. Du Pont De Nemours And Company Fluoropolymer protectant layer for high temperature superconductor film and photo-definition thereof
JP2871516B2 (ja) * 1995-03-22 1999-03-17 株式会社移動体通信先端技術研究所 酸化物超伝導薄膜装置
US5662816A (en) * 1995-12-04 1997-09-02 Lucent Technologies Inc. Signal isolating microwave splitters/combiners
US5932799A (en) * 1997-07-21 1999-08-03 Ysi Incorporated Microfluidic analyzer module
US6293012B1 (en) 1997-07-21 2001-09-25 Ysi Incorporated Method of making a fluid flow module
US6073482A (en) * 1997-07-21 2000-06-13 Ysi Incorporated Fluid flow module
SE9904263L (sv) * 1999-11-23 2001-05-24 Ericsson Telefon Ab L M Supraledande substratstruktur och ett förfarande för att producera en sådan struktur
US20050062131A1 (en) * 2003-09-24 2005-03-24 Murduck James Matthew A1/A1Ox/A1 resistor process for integrated circuits
KR102266022B1 (ko) * 2014-03-07 2021-06-16 스미토모 덴키 고교 가부시키가이샤 산화물 초전도 박막 선재와 그의 제조 방법
JP7003719B2 (ja) * 2018-02-16 2022-02-04 日本電信電話株式会社 磁性材料および磁性素子

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59144190A (ja) * 1983-02-08 1984-08-18 Agency Of Ind Science & Technol 超伝導回路用実装基板
US4474828A (en) * 1983-03-30 1984-10-02 Sperry Corporation Method of controlling the supercurrent of a Josephson junction device
KR900001273B1 (ko) * 1983-12-23 1990-03-05 후지쑤 가부시끼가이샤 반도체 집적회로 장치
JPS61239649A (ja) * 1985-04-13 1986-10-24 Fujitsu Ltd 高速集積回路パツケ−ジ
CA1329952C (en) * 1987-04-27 1994-05-31 Yoshihiko Imanaka Multi-layer superconducting circuit substrate and process for manufacturing same
EP0301962B1 (en) * 1987-07-27 1994-04-20 Sumitomo Electric Industries Limited A superconducting thin film and a method for preparing the same
US4980339A (en) * 1987-07-29 1990-12-25 Matsushita Electric Industrial Co., Ltd. Superconductor structure
US4837609A (en) * 1987-09-09 1989-06-06 American Telephone And Telegraph Company, At&T Bell Laboratories Semiconductor devices having superconducting interconnects
JPH01157007A (ja) * 1987-12-11 1989-06-20 Sony Corp 超電導線材
JPH01158757A (ja) * 1987-12-16 1989-06-21 Hitachi Ltd 回路実装構造
JP2598973B2 (ja) * 1988-07-27 1997-04-09 三洋電機株式会社 積層型超電導素子
EP0358879A3 (en) * 1988-09-13 1991-02-27 Hewlett-Packard Company Method of making high density interconnects
US5087605A (en) * 1989-06-01 1992-02-11 Bell Communications Research, Inc. Layered lattice-matched superconducting device and method of making
JPH0710005B2 (ja) * 1989-08-31 1995-02-01 アメリカン テレフォン アンド テレグラフ カムパニー 超伝導体相互接続装置
US5159347A (en) * 1989-11-14 1992-10-27 E-Systems, Inc. Micromagnetic circuit
WO1992020108A1 (en) * 1991-05-08 1992-11-12 Superconductor Technologies, Inc. Multichip interconnect module including superconductive materials
DE69210938T2 (de) * 1991-10-18 1997-01-16 Shinko Elec Ind Supraleitende Quanteninterferenz-Einrichtung

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190045362A (ko) * 2016-09-13 2019-05-02 구글 엘엘씨 적층된 양자 디바이스들에서의 손실 감소
CN109891591A (zh) * 2016-09-13 2019-06-14 谷歌有限责任公司 减少堆叠量子器件中的损耗
JP2019532505A (ja) * 2016-09-13 2019-11-07 グーグル エルエルシー 積層量子デバイス内の損失の低減
US10978425B2 (en) 2016-09-13 2021-04-13 Google Llc Reducing loss in stacked quantum devices
US11569205B2 (en) 2016-09-13 2023-01-31 Google Llc Reducing loss in stacked quantum devices
CN109891591B (zh) * 2016-09-13 2024-01-09 谷歌有限责任公司 减少堆叠量子器件中的损耗
US11955465B2 (en) 2016-09-13 2024-04-09 Google Llc Reducing loss in stacked quantum devices

Also Published As

Publication number Publication date
EP0674808A1 (en) 1995-10-04
DE69309306D1 (de) 1997-04-30
EP0674808B1 (en) 1997-03-26
CA2150913A1 (en) 1994-06-23
WO1994014201A1 (en) 1994-06-23
KR950704819A (ko) 1995-11-20
US5567330A (en) 1996-10-22
DE69309306T2 (de) 1997-09-04
TW245839B (enExample) 1995-04-21

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