JPH08339690A - 半導体メモリ装置のレベルコンバータ - Google Patents

半導体メモリ装置のレベルコンバータ

Info

Publication number
JPH08339690A
JPH08339690A JP8129720A JP12972096A JPH08339690A JP H08339690 A JPH08339690 A JP H08339690A JP 8129720 A JP8129720 A JP 8129720A JP 12972096 A JP12972096 A JP 12972096A JP H08339690 A JPH08339690 A JP H08339690A
Authority
JP
Japan
Prior art keywords
conductivity type
transistor
pair
power supply
supply voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8129720A
Other languages
English (en)
Japanese (ja)
Inventor
Chul-Min Jung
哲▲みん▼ 丁
Seung-Kweon Yang
承權 梁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JPH08339690A publication Critical patent/JPH08339690A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/065—Differential amplifiers of latching type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/106—Data output latches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356017—Bistable circuits using additional transistors in the input circuit
    • H03K3/356026—Bistable circuits using additional transistors in the input circuit with synchronous operation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • H03K3/356121—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit with synchronous operation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Logic Circuits (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)
JP8129720A 1995-05-25 1996-05-24 半導体メモリ装置のレベルコンバータ Pending JPH08339690A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1995P13275 1995-05-25
KR1019950013275A KR0146532B1 (ko) 1995-05-25 1995-05-25 반도체 메모리 장치의 다이나믹 레벨 컨버터

Publications (1)

Publication Number Publication Date
JPH08339690A true JPH08339690A (ja) 1996-12-24

Family

ID=19415411

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8129720A Pending JPH08339690A (ja) 1995-05-25 1996-05-24 半導体メモリ装置のレベルコンバータ

Country Status (6)

Country Link
US (1) US5699304A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPH08339690A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR (1) KR0146532B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
FR (1) FR2734661B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
GB (1) GB2301213B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
TW (1) TW295664B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1296427B1 (it) * 1997-11-14 1999-06-25 Sgs Thomson Microelectronics Circuito di ingresso bus-hold in grado di ricevere segnali di ingresso con livelli di tensione superiori alla propria tensione di
US6816554B1 (en) 1999-07-12 2004-11-09 Intel Corporation Communication bus for low voltage swing data signals
US6456121B2 (en) * 1999-07-12 2002-09-24 Intel Corporation Sense amplifier for integrated circuits using PMOS transistors
US7369450B2 (en) * 2006-05-26 2008-05-06 Freescale Semiconductor, Inc. Nonvolatile memory having latching sense amplifier and method of operation
US10395700B1 (en) * 2018-03-20 2019-08-27 Globalfoundries Inc. Integrated level translator

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62205597A (ja) * 1986-03-05 1987-09-10 Toshiba Corp 半導体感知増幅回路
US4716320A (en) * 1986-06-20 1987-12-29 Texas Instruments Incorporated CMOS sense amplifier with isolated sensing nodes
NL8602295A (nl) * 1986-09-11 1988-04-05 Philips Nv Halfgeleidergeheugenschakeling met snelle uitleesversterker tristatebusdrijver.
US4831287A (en) * 1988-04-11 1989-05-16 Motorola, Inc. Latching sense amplifier
US5041746A (en) * 1989-12-20 1991-08-20 Texas Instruments Incorporated Sense amplifier providing a rapid output transition
US5526314A (en) * 1994-12-09 1996-06-11 International Business Machines Corporation Two mode sense amplifier with latch
JPH08190799A (ja) * 1995-01-09 1996-07-23 Mitsubishi Denki Semiconductor Software Kk センスアンプ回路

Also Published As

Publication number Publication date
US5699304A (en) 1997-12-16
GB2301213B (en) 1997-07-23
KR0146532B1 (ko) 1998-11-02
GB9610874D0 (en) 1996-07-31
FR2734661A1 (fr) 1996-11-29
TW295664B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1997-01-11
GB2301213A (en) 1996-11-27
FR2734661B1 (fr) 1998-11-13
KR960042746A (ko) 1996-12-21

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