JPH08264659A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE: To reduce the dead region by connecting output terminals respectively to the drains of MOS transistors and placing the annular drains and sources to surround the output terminals in this order. CONSTITUTION: Output terminals 2 are respectively connected to the drains 11 of driver transistors 1 composed of MOS transistors and drains 11 and sources 12 are placed to surround the output terminals 2 in this order. Gates 5 are formed through a gate insulation film on the surface of the drains 11 and sources 12 to surround the terminals 2. By disposing the terminals 2 zigzag, the dead region can be greatly eliminated and hence a drive IC chip can be made small in size.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device (hereinafter referred to as an IC) in which a plurality of output driver transistors are integrated with respective drive circuits.

[0002]

2. Description of the Related Art At present, there is a demand for lowering the cost of ICs, and one means for dealing with this is to reduce the chip size. However, for example, when a plurality of output driver transistors are integrated in a single driving IC chip together with a driving circuit including a shift register, a latch, etc., the wiring to the adjacent output terminals is facilitated so as not to short-circuit each other. The center points of are required to be separated from each other by, for example, 150 μm or more. Therefore, as shown in FIG. 2, the output terminals 2 are arranged in a zigzag pattern on one side of the output driver transistor 1 so that the driver transistors 1 can be closely arranged. In this case, the output driver transistor 1 is a MOS transistor in which a comb-shaped drain 11 and a source 12 are arranged in combination as shown by omitting the gate in the figure, and the drain 11 and the output terminal 2 are connected by a wiring 3. There is. The output terminal 2 may be a pad to which an Al wire is bonded or a solder pad to which a lead wire is soldered.

[0003]

In the IC shown in FIG. 2, the region 4 indicated by the dotted diagonal line is an invalid region, and the chip size is increased accordingly. The object of the present invention is to reduce the chip size by reducing the invalid area caused by the arrangement of the output driver transistor and the output terminal.
To provide C.

[0004]

In order to achieve the above object, one of the present inventions is to integrate a plurality of MOS type transistors as output driver transistors, and
In an IC in which an output terminal is connected to the drain of an S-type transistor, a ring-shaped drain and a source are sequentially arranged so as to surround the output terminal.
It is effective that a ring-shaped gate is provided on the surface of the portion sandwiched between the drain and the source of the semiconductor element body via the gate insulating film. According to another aspect of the present invention, in an IC in which a plurality of bipolar transistors as output driver transistors are integrated, and an output terminal is connected to the emitter of each bipolar transistor, an annular emitter and base surrounding the output terminal are provided. Are sequentially arranged. In either case, the contour of the output terminal is preferably square.

[0005]

Since it is used as the active region of the driver transistor, an ineffective region does not occur even if the required distance is provided between the output terminals. Since the IC chip has a square shape, the use of a square output terminal further reduces the generation of ineffective areas. Either a MOS transistor or a bipolar transistor may be used as the driver transistor.

[0006]

FIG. 1 shows the layout of driver transistors and output terminals in a driving IC according to an embodiment of the present invention.
The same parts as those in FIG. 2 are designated by the same reference numerals. In this IC, the drain 11 and the source 12 of a MOS transistor, which is a driver transistor, are arranged so as to surround the output terminal 2. The gate 5 provided on the surface between the drain 11 and the source 12 via the gate insulating film also surrounds the periphery of the output terminal 2. The distance between the center points of the output terminals 2 is 150 μm
Output terminal 2 and driver transistor 1
Since they are arranged in a zigzag shape, the ineffective region 4 still exists in this case, but its area is the same as the total extension of the drain 11 and the source 12 facing each other.
1/5 or more of the case, and the chip size was reduced.
In this embodiment, the number of the wirings 3 connected to the output terminal 2 and the drain 11 is one, but a plurality of wirings, for example, four wirings may be used.

The same effect can be obtained even when a bipolar transistor is used as the driver transistor and the emitter region and the base region are sequentially arranged so as to surround the periphery of the output terminal.

[0008]

According to the present invention, by forming the output driver transistor around the output terminal, the output terminals are arranged in a zigzag pattern so as to keep a distance between the output terminals to prevent a short circuit. The ineffective area can be largely eliminated, and the driving IC chip can be miniaturized. As a result, the number of chips taken per wafer is increased, and the IC chip price can be reduced.

[Brief description of drawings]

FIG. 1 is a plan view of a driver transistor section in a driving IC chip according to an embodiment of the present invention.

FIG. 2 is a plan view showing a driver transistor portion in a conventional driving IC.

[Explanation of symbols]

 1 Driver Transistor 11 Drain 12 Source 3 Wiring 5 Gate

Claims (4)

[Claims] 1. A MOS as an output driver transistor
In a semiconductor integrated circuit device in which a plurality of MOS transistors are integrated and an output terminal is connected to the drain of each MOS transistor, an annular drain and a source are sequentially arranged so as to surround the output terminal. Semiconductor integrated circuit device. 2. The semiconductor integrated circuit device according to claim 1, wherein an annular gate is provided on the surface of the portion of the semiconductor body sandwiched by the drain and the source with a gate insulating film interposed therebetween. 3. A semiconductor integrated circuit device in which a plurality of bipolar transistors as output driver transistors are integrated and output terminals are connected to the emitters of the bipolar transistors, respectively. A semiconductor integrated circuit device characterized in that bases are sequentially arranged. 4. The semiconductor integrated circuit device according to claim 1, wherein the contour of the output terminal is rectangular.