JPH08162359A - Chip type ceramic electronic part - Google Patents

Chip type ceramic electronic part

Info

Publication number
JPH08162359A
JPH08162359A JP6304969A JP30496994A JPH08162359A JP H08162359 A JPH08162359 A JP H08162359A JP 6304969 A JP6304969 A JP 6304969A JP 30496994 A JP30496994 A JP 30496994A JP H08162359 A JPH08162359 A JP H08162359A
Authority
JP
Japan
Prior art keywords
electrode layer
electrode
sintered body
electronic component
conductive paste
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6304969A
Other languages
Japanese (ja)
Inventor
Hiromasa Takahashi
弘真 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP6304969A priority Critical patent/JPH08162359A/en
Publication of JPH08162359A publication Critical patent/JPH08162359A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To alleviate thermal shock caused by soldering when a mounting operation is conducted and also to alleviate mechanical stress caused by bending a circuit substrate by a method wherein an external electrode is composed of the first porous electrode layer and the second dense electrode layer which covers the whole surface of the above-mentioned first electrode layer. CONSTITUTION: Conductive paste, to be used for formation of the first electrode layer consisting of an alloy composed of a metal component of silver (95wt.%) and paradium (5wt.%), is spread on the end part of a ceramic sintered body 13, and they are fired at 730 deg.C. Then, conductive paste, to be used for formation of the second electrode layer consisting of metal component of silver, is spread on the whole surface of the first electrode layer 15, and a laminated ceramic capacitor, consisting of the first polous electrode layer 15 having the void ratio of 25% and the second dense electrode layer 16 formed on the first electrode layer 15, is obtained. When a heat-resisting test is conducted by dipping the material in the solder bath of 235 deg.C for five seconds, cracks are not generated, and electric characteristics are not impaired even when a part of the porous first electrode layer 15 is collapsed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はチップ型セラミック電子
部品に関し、特にその外部電極の構造に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip type ceramic electronic component, and more particularly to the structure of its external electrodes.

【0002】[0002]

【従来の技術】例えば、チップ型セラミック電子部品で
ある積層セラミックコンデンサは、図2に示すように、
複数の内部電極7がセラミック層8を介して重なり合う
ように配置されて、かつ交互に両端部に引出されている
構造を有するセラミック焼結体1の両端部に、Agペー
スト等の導電ペーストを塗布し、焼成して、内部電極と
導通する外部電極2が形成されている。
2. Description of the Related Art For example, as shown in FIG. 2, a monolithic ceramic capacitor, which is a chip-type ceramic electronic component, is
A conductive paste such as an Ag paste is applied to both ends of the ceramic sintered body 1 having a structure in which a plurality of internal electrodes 7 are arranged so as to overlap with each other with a ceramic layer 8 interposed therebetween and are alternately drawn out to both ends. Then, the outer electrode 2 is formed by firing and conducting with the inner electrode.

【0003】[0003]

【発明が解決しようとする課題】ところで、上記のよう
に、従来のチップ型セラミック電子部品(積層セラミッ
クコンデンサ)の外部電極2は導電ペーストの塗布、焼
成により形成されているため、緻密な電極層となってい
る。このため、実装時のはんだの熱が外部電極2に伝わ
り易い反面、熱伝導性の悪いセラミック焼結体1に対し
ては大きな熱的衝撃を与える。これが原因で、図4に示
すように、はんだ融着部分であるところのセラミック焼
結体1の角部の外部電極2に近接する部分にクラック9
が入ることがある。また、従来のチップ型セラミック電
子部品(積層セラミックコンデンサ)は、その外部電極
2が緻密な電極層からなっており、外部電極自体に剛性
がある。このため、図3に示すように、回路基板3の電
極ランド4に電子部品の外部電極2をはんだ5で取付け
て実装し、その状態で図の矢印方向に応力が加わって回
路基板3がたわんだりすると、回路基板3の曲げによる
機械的な応力がはんだ5と外部電極2を介して電子部品
のセラミック焼結体1に直接作用する。その結果、図4
に示したはんだ付けの熱衝撃により入ったクラック9と
同様のクラックが入ることがある。
As described above, since the external electrodes 2 of the conventional chip-type ceramic electronic component (multilayer ceramic capacitor) are formed by applying and firing a conductive paste, a dense electrode layer is provided. Has become. Therefore, while the heat of the solder during mounting is easily transmitted to the external electrode 2, a large thermal shock is applied to the ceramic sintered body 1 having poor thermal conductivity. Due to this, as shown in FIG. 4, cracks 9 are formed at the corners of the ceramic sintered body 1, which are the solder-bonded portions, in the vicinity of the external electrodes 2.
May enter. Further, in the conventional chip-type ceramic electronic component (multilayer ceramic capacitor), the external electrode 2 is composed of a dense electrode layer, and the external electrode itself has rigidity. Therefore, as shown in FIG. 3, the external electrodes 2 of the electronic component are mounted and mounted on the electrode lands 4 of the circuit board 3 with the solder 5, and in that state, stress is applied in the direction of the arrow in the figure to cause the circuit board 3 to bend. If so, mechanical stress due to bending of the circuit board 3 directly acts on the ceramic sintered body 1 of the electronic component via the solder 5 and the external electrode 2. As a result,
The same cracks as the cracks 9 caused by the thermal shock of soldering may occur.

【0004】そこで、本発明は、実装時のはんだ付けの
熱的衝撃や回路基板の曲げによる機械的な応力を緩和
し、セラミック焼結体へのクラックの発生を防止できる
チップ型セラミック電子部品を提供することを目的とす
る。
Therefore, the present invention provides a chip-type ceramic electronic component capable of relieving thermal shock of soldering during mounting and mechanical stress due to bending of a circuit board and preventing cracks from being generated in a ceramic sintered body. The purpose is to provide.

【0005】[0005]

【課題を解決するための手段】上記のような課題を解決
するために、本発明は、セラミック焼結体の端部に内部
電極と導通する外部電極を有するチップ型セラミック電
子部品において、前記外部電極はポーラスな第1電極層
と、この第1電極層の表面の全面を覆う緻密な第2電極
層とからなることを特徴とするチップ型セラミック電子
部品である。
In order to solve the above-mentioned problems, the present invention provides a chip-type ceramic electronic component having an external electrode electrically connected to an internal electrode at an end of a ceramic sintered body. The electrode is a chip-type ceramic electronic component characterized by comprising a porous first electrode layer and a dense second electrode layer covering the entire surface of the first electrode layer.

【0006】[0006]

【作用】本発明によれば、外部電極を構成する第1電極
層がポーラス層で形成されているため、その熱容量を大
きくでき、熱や熱応力の伝播を緩和する。よって、外部
電極のはんだ付け時の熱衝撃が緩和できる。また、機械
的応力が加わると、第1電極層の一部がつぶれて、機械
的応力を緩和する。よって、回路基板にセラミック電子
部品の外部電極をはんだ付けした後、前記回路基板がた
わむことがあっても、セラミック焼結体に加わる機械的
な応力が緩和できる。さらに、前記第1電極層の表面の
全面を覆うように、緻密な第2電極層を設けることによ
り、第1電極層の一部がつぶれても、チップ型セラミッ
ク電子部品の電気的特性を損なうことがなく、かつセラ
ミック焼結体の内部への湿気の浸入を防ぐことができ
る。
According to the present invention, since the first electrode layer forming the external electrode is formed of the porous layer, its heat capacity can be increased and the propagation of heat and thermal stress can be relaxed. Therefore, the thermal shock at the time of soldering the external electrodes can be mitigated. Moreover, when mechanical stress is applied, a part of the first electrode layer is crushed, and the mechanical stress is relaxed. Therefore, even if the circuit board may be bent after the external electrodes of the ceramic electronic component are soldered to the circuit board, the mechanical stress applied to the ceramic sintered body can be relaxed. Further, by providing the dense second electrode layer so as to cover the entire surface of the first electrode layer, even if a part of the first electrode layer is crushed, the electrical characteristics of the chip-type ceramic electronic component are impaired. In addition, moisture can be prevented from entering the inside of the ceramic sintered body.

【0007】[0007]

【実施例】図1は本発明の一実施例のチップ型セラミッ
ク電子部品である積層セラミックコンデンサの外部電極
を含む部分断面図を示している。図1に示すように、セ
ラミック焼結体13の内部に複数の内部電極11が、セ
ラミック層12を介して重なり合うように配置され、セ
ラミック焼結体13の端部に交互に引出されており、そ
のセラミック焼結体13の端部に内部電極と導通する外
部電極14が形成されている。この外部電極14は、図
1に示されているような比較的大きな空隙17が多数存
在しているポーラスな第1電極層15と、この第1電極
層の表面の全面を覆う緻密な第2電極層16とから構成
されている。
FIG. 1 is a partial sectional view including an external electrode of a monolithic ceramic capacitor which is a chip-type ceramic electronic component according to an embodiment of the present invention. As shown in FIG. 1, a plurality of internal electrodes 11 are arranged inside the ceramic sintered body 13 so as to overlap with each other via a ceramic layer 12, and are alternately drawn out to the end of the ceramic sintered body 13. An external electrode 14 that is electrically connected to the internal electrode is formed at an end of the ceramic sintered body 13. The external electrode 14 includes a porous first electrode layer 15 having a large number of relatively large voids 17 as shown in FIG. 1 and a dense second electrode layer 15 covering the entire surface of the first electrode layer. It is composed of an electrode layer 16.

【0008】この本発明のチップ型セラミック電子部品
(積層セラミックコンデンサ)の外部電極14を、例え
ば、導電ペーストを塗布、焼成により形成する場合に
は、セラミック焼結体13の端部にポーラスな第1電極
層15と、この第1電極層15の表面の全体を覆う緻密
な第2電極層16を形成するために、第1電極層形成用
の導電ペーストは、第2電極層形成用の導電ペーストに
比べて、高温で焼結しにくく、ポーラスな電極層が形成
できるものを用い、第2電極層形成用の導電ペーストは
高温で焼結しやすく、緻密な電極層が形成できるものを
用いればよい。
When the external electrode 14 of the chip-type ceramic electronic component (multilayer ceramic capacitor) of the present invention is formed by, for example, applying and firing a conductive paste, a porous first electrode is formed at the end of the ceramic sintered body 13. In order to form the first electrode layer 15 and the dense second electrode layer 16 that covers the entire surface of the first electrode layer 15, the conductive paste for forming the first electrode layer is the conductive paste for forming the second electrode layer. Compared to the paste, use one that does not easily sinter at high temperature and can form a porous electrode layer, and use conductive paste for forming the second electrode layer that easily sinters at high temperature and can form a dense electrode layer. Good.

【0009】例えば、金属成分、ガラス成分、樹脂成分
及び溶剤成分などからなる導電ペーストについて言え
ば、具体的には第1電極層形成用の導電ペーストの金属
成分を合金成分としたり、金属成分の中に焼結を抑制す
る添加物を添加したりすればよく、より具体的には金属
成分として銀を用いる場合には、銀より高融点の金属成
分との合金を用いればよく、銀/パラジュウム合金や銀
/白金合金などであってもよい。また、焼結を抑制する
添加物としては、例えば、酸化アルミナ、酸化シリカな
どの酸化物を用いればよい。なお、外部電極14を導電
ペーストの塗布、焼成により形成する場合、第2電極層
16の焼成により第1電極層15のポーラス性を損なわ
ないようにする必要がある。つまり、第1電極層15を
形成する焼成温度は第2の外部電極層16を形成する焼
成温度と同じか、それ以上の温度とすることが好まし
い。第1と第2電極層15、16の焼成を同じ温度で行
う場合には、両電極層を1回の焼成で形成するようにし
てもよい。また、導電ペーストの金属成分は銀を主体と
したもののみならず、銅やニッケルなどの他の金属成分
を主体としたものであってもよい。
For example, regarding a conductive paste composed of a metal component, a glass component, a resin component, a solvent component, and the like, specifically, the metal component of the conductive paste for forming the first electrode layer is used as an alloy component or the metal component It suffices to add an additive that suppresses sintering. More specifically, when silver is used as the metal component, an alloy with a metal component having a higher melting point than silver can be used. It may be an alloy or a silver / platinum alloy. As the additive that suppresses sintering, for example, oxides such as alumina oxide and silica oxide may be used. When the external electrode 14 is formed by applying a conductive paste and baking, it is necessary to prevent the porous property of the first electrode layer 15 from being damaged by baking the second electrode layer 16. That is, the firing temperature for forming the first electrode layer 15 is preferably the same as or higher than the firing temperature for forming the second external electrode layer 16. When firing the first and second electrode layers 15 and 16 at the same temperature, both electrode layers may be formed by firing once. Further, the metal component of the conductive paste is not limited to one mainly composed of silver, but may be one mainly composed of another metal component such as copper or nickel.

【0010】なお、この第1電極層15の空隙率は15
%〜35%が好ましい。その理由は、電極層の空隙面積
率が15%未満になると、ポーラスな電極層の機械的な
応力や熱衝撃の緩衝効果が少なくなり、セラミック焼結
体へのクラックが入りやすくなる。また、空隙率が35
%を越えると内部電極11との導通不良が発生しやすく
なる。なお、より好ましくは空隙率20%〜30%が望
ましい。また、第2電極層16は耐湿試験をしたり、外
部電極14の表面に湿式電解メッキを施しても、湿気や
メッキ液がセラミック焼結体の内部に浸入しにくく、信
頼性の高い電子部品を得ることができる程度に緻密に形
成されている。
The porosity of the first electrode layer 15 is 15
% To 35% is preferable. The reason is that, when the void area ratio of the electrode layer is less than 15%, the buffer effect of mechanical stress and thermal shock of the porous electrode layer is reduced, and the ceramic sintered body is easily cracked. In addition, the porosity is 35
If it exceeds%, defective conduction with the internal electrode 11 tends to occur. It is more preferable that the porosity is 20% to 30%. Further, even if the second electrode layer 16 is subjected to a moisture resistance test or the surface of the external electrode 14 is subjected to wet electrolytic plating, it is difficult for moisture or a plating solution to enter the inside of the ceramic sintered body, and a highly reliable electronic component is provided. Is formed to such an extent that it can be obtained.

【0011】以下に本発明のチップ型セラミック電子部
品を、その外部電極形成方法についてより具体的に説明
する。
The method of forming the external electrodes of the chip-type ceramic electronic component of the present invention will be described in more detail below.

【0012】まず、図1に示すセラミック焼結体13の
端部に、第1電極層形成用の導電ペーストを塗布する。
この第1電極層形成用の導電ペーストの金属成分は銀9
5重量%、パラジウム5重量%からなる合金を使用す
る。そして、塗布された導電ペーストを730℃で焼成
する。次に、その金属成分が銀のみからなる第2電極層
形成用の導電ペーストを、第1電極層の表面の全面を覆
うように塗布し、730℃で焼成する。
First, a conductive paste for forming the first electrode layer is applied to the end of the ceramic sintered body 13 shown in FIG.
The metal component of the conductive paste for forming the first electrode layer is silver 9
An alloy consisting of 5% by weight and 5% by weight of palladium is used. Then, the applied conductive paste is fired at 730 ° C. Next, a conductive paste for forming the second electrode layer, the metal component of which is only silver, is applied so as to cover the entire surface of the first electrode layer, and baked at 730 ° C.

【0013】上記のようにして外部電極が形成されたチ
ップ型セラミック電子部品を、外部電極14が含まれる
ように切断し、第1及び第2電極層15、16の断面層
を走査型電子顕微鏡で写真をとり、空隙率を測定した結
果、第1電極層15の空隙率は25%であり、ポーラス
な電極層が形成され、そして、第2電極層は緻密な電極
層(空隙率8%)が形成されていることが確認された。
The chip-type ceramic electronic component having the external electrodes formed as described above is cut so as to include the external electrodes 14, and the cross-sectional layers of the first and second electrode layers 15 and 16 are scanned with a scanning electron microscope. As a result of measuring the porosity, the porosity of the first electrode layer 15 is 25%, a porous electrode layer is formed, and the second electrode layer is a dense electrode layer (porosity 8% ) Was confirmed to have been formed.

【0014】次に、この実施例のように第1電極層15
に空隙率25%のポーラスな電極層を形成し、その上に
緻密な第2電極層16を形成したチップ型セラミック電
子部品(積層セラミックコンデンサ)と従来例で示した
外部電極層2が緻密な電極層一層のみを形成したものと
をそれぞれ100個用意し、外形寸法がL寸100m
m、W寸40mm、T寸1.6mmのガラスエポキシ基
板の中央に形成された電極ランド間にそれぞれ接着材で
固定して、235℃のはんだ槽の中に、5秒間浸漬して
取付け実装する耐熱試験を行った。その後、はんだ融着
部分であるところのセラミック焼結体13、1の角部の
外部電極14、2に近接する部分の外観、及びその部分
を研摩してその断面を拡大鏡で目視観察することによっ
て、セラミック焼結体へのクラックの発生の有無を調べ
た。その試験結果は以下の表1の通りである。
Next, as in this embodiment, the first electrode layer 15 is formed.
A chip-type ceramic electronic component (multilayer ceramic capacitor) in which a porous electrode layer having a porosity of 25% is formed, and a dense second electrode layer 16 is formed on the porous electrode layer, and the external electrode layer 2 shown in the conventional example are dense. Prepare 100 pieces each with only one electrode layer formed, and the external dimension is L dimension 100m
m, W dimension 40 mm, and T dimension 1.6 mm, fixed by an adhesive between the electrode lands formed in the center of the glass epoxy substrate, dipped in a solder bath at 235 ° C. for 5 seconds, and mounted. A heat resistance test was conducted. After that, the external appearance of a portion of the ceramic sintered body 13, 1 which is a solder-bonded portion, which is close to the external electrodes 14, 2 and the portion that is polished, and the cross section thereof is visually observed with a magnifying glass. The presence or absence of cracks in the ceramic sintered body was examined by. The test results are shown in Table 1 below.

【0015】[0015]

【表1】 [Table 1]

【0016】上記、表1の試験結果より、この実施例に
かかる電子部品全てにクラックは存在せず、電気的特性
を損なうこともなかった。一方、従来例のものでは、1
00個のうち27個に、クラックが存在した。よって、
この実施例により得られた電子部品は、その耐熱性が優
れていることが分かる。
From the test results shown in Table 1 above, no cracks were present in all the electronic components according to this example, and the electrical characteristics were not impaired. On the other hand, in the conventional example, 1
There were cracks in 27 out of 00 cracks. Therefore,
It can be seen that the electronic component obtained in this example has excellent heat resistance.

【0017】さらに、先の耐熱試験と同様、各100個
のチップ型セラミック電子部品(積層セラミックコンデ
ンサ)をそれぞれ基板にはんだ付けした後、図3に示す
ように、矢印方向に応力を加えて、基板を2mmたわませ
るたわみ試験を行った。その後、はんだ融着部分である
ところのセラミック焼結体13、1の角部の外部電極1
4、2に近接する部分の外観、及びその部分を研摩した
断面を拡大鏡で目視観察することによって、セラミック
焼結体へのクラックの発生の有無を調べた。その試験結
果は以下の表2の通りである。
Further, similarly to the above heat resistance test, 100 chip-type ceramic electronic components (multilayer ceramic capacitors) were soldered to the respective substrates, and then stress was applied in the direction of the arrow as shown in FIG. A flexure test was conducted in which the board was flexed by 2 mm. After that, the external electrodes 1 at the corners of the ceramic sintered bodies 13, 1 which are the solder-bonded portions
The presence or absence of cracks in the ceramic sintered body was examined by visually observing the appearance of a portion close to Nos. 4 and 2 and a cross section obtained by polishing the portion with a magnifying glass. The test results are shown in Table 2 below.

【0018】[0018]

【表2】 [Table 2]

【0019】上記、表2の試験結果より、この実施例の
ものでは、電子部品100個全てにクラックは存在せ
ず、しかも、外部電極層14のポーラスな第1電極層1
5の一部につぶれがあるものが45個確認できたものの
電気的特性を損なうこともなかった。一方、従来例のも
のでは、電子部品100個のうち50個に、クラックが
存在した。よって、この実施例により得られた電子部品
は、耐熱性とともに機械的強度にも優れていることが分
かる。
From the test results shown in Table 2 above, in this embodiment, all 100 electronic components are free from cracks, and the porous first electrode layer 1 of the external electrode layer 14 is present.
Although 45 crushed parts could be confirmed in part of 5, the electrical characteristics were not impaired. On the other hand, in the conventional example, cracks were present in 50 of 100 electronic components. Therefore, it is understood that the electronic component obtained in this example is excellent in heat resistance and mechanical strength.

【0020】なお、外部電極は導電ペーストの塗布、焼
成により形成する場合に限るものではなく、例えば、蒸
着やスパッタリングなどで形成してもよい。
The external electrode is not limited to the one formed by applying and firing the conductive paste, but may be formed by vapor deposition or sputtering.

【0021】また、この発明のチップ型セラミック電子
部品は、積層セラミックコンデンサに限らず、チップ型
抵抗やチップ型インダクタなど、外部電極を有するあら
ゆるセラミック電子部品に適用できることは言うまでも
ない。
Needless to say, the chip-type ceramic electronic component of the present invention can be applied not only to the monolithic ceramic capacitor but also to any ceramic electronic component having external electrodes such as a chip-type resistor and a chip-type inductor.

【0022】[0022]

【発明の効果】以上のように、本発明によれば、外部電
極を2層に構成し、下層である第1電極層15がポーラ
ス層で形成されているため、チップ型セラミック電子部
品のはんだ付け時のセラミック焼結体13への熱衝撃や
基板のたわみによってセラミック焼結体13に加わる機
械的な応力が緩和され、セラミック焼結体へのクラック
の発生を防止できる。また、前記第1電極層の表面の全
面を覆う緻密な第2電極層を設けることにより、第1電
極層の一部がつぶれても、チップ型セラミック電子部品
の電気的特性を損なうことがなく、かつセラミック焼結
体の内部への湿気の浸入を防ぎ、絶縁抵抗等の劣化を防
止できる。従って、面実装部品として、信頼性の高いチ
ップ型セラミック電子部品を提供することができる。
As described above, according to the present invention, the external electrodes are formed in two layers, and the lower first electrode layer 15 is formed of a porous layer. The mechanical stress applied to the ceramic sintered body 13 due to the thermal shock to the ceramic sintered body 13 and the bending of the substrate at the time of attachment can be relaxed, and the generation of cracks in the ceramic sintered body can be prevented. Further, by providing the dense second electrode layer that covers the entire surface of the first electrode layer, even if a part of the first electrode layer is crushed, the electrical characteristics of the chip-type ceramic electronic component are not impaired. In addition, it is possible to prevent moisture from entering the inside of the ceramic sintered body and prevent deterioration of insulation resistance and the like. Therefore, it is possible to provide a highly reliable chip-type ceramic electronic component as a surface mount component.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例にかかる積層セラミックコン
デンサの部分断面図である
FIG. 1 is a partial cross-sectional view of a monolithic ceramic capacitor according to an embodiment of the present invention.

【図2】従来の積層セラミックコンデンサの断面図であ
る。
FIG. 2 is a sectional view of a conventional monolithic ceramic capacitor.

【図3】チップ型セラミック電子部品が実装された基板
に機械的応力を加えて、基板をたわませる説明図であ
る。
FIG. 3 is an explanatory view for bending the substrate by applying mechanical stress to the substrate on which the chip-type ceramic electronic component is mounted.

【図4】セラミック焼結体にクラックが入った状態を示
す説明図である。
FIG. 4 is an explanatory view showing a state in which a ceramic sintered body has cracks.

【符号の説明】[Explanation of symbols]

13・・・セラミック焼結体 14・・・外部電極 15・・・第1電極層 16・・・第2電極層 17・・・空隙 13 ... Ceramic sintered body 14 ... External electrode 15 ... First electrode layer 16 ... Second electrode layer 17 ... Void

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 セラミック焼結体の端部に内部電極と導
通する外部電極を有するチップ型セラミック電子部品に
おいて、前記外部電極はポーラスな第1電極層と、この
第1電極層の表面の全面を覆う緻密な第2電極層とから
なることを特徴とするチップ型セラミック電子部品。
1. A chip-type ceramic electronic component having an external electrode electrically connected to an internal electrode at an end of a ceramic sintered body, wherein the external electrode is a porous first electrode layer and the entire surface of the first electrode layer. A chip-type ceramic electronic component characterized by comprising a dense second electrode layer covering the.
JP6304969A 1994-12-08 1994-12-08 Chip type ceramic electronic part Pending JPH08162359A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6304969A JPH08162359A (en) 1994-12-08 1994-12-08 Chip type ceramic electronic part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6304969A JPH08162359A (en) 1994-12-08 1994-12-08 Chip type ceramic electronic part

Publications (1)

Publication Number Publication Date
JPH08162359A true JPH08162359A (en) 1996-06-21

Family

ID=17939495

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6304969A Pending JPH08162359A (en) 1994-12-08 1994-12-08 Chip type ceramic electronic part

Country Status (1)

Country Link
JP (1) JPH08162359A (en)

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WO2000013190A1 (en) * 1998-08-28 2000-03-09 Matsushita Electric Industrial Co., Ltd. Conductive paste, conductive structure using the same, electronic part, module, circuit board, method for electrical connection, method for manufacturing circuit board, and method for manufacturing ceramic electronic part
US6219220B1 (en) 1998-04-07 2001-04-17 Murata Manufacturing Co., Ltd. Ceramic electronic component having terminal electrode that includes a second porous layer
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JP2011139021A (en) * 2009-12-30 2011-07-14 Samsung Electro-Mechanics Co Ltd Multilayer ceramic capacitor
JP2012028689A (en) * 2010-07-27 2012-02-09 Tdk Corp Terminal electrode and ceramic electronic component equipped with it
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JPWO2016133090A1 (en) * 2015-02-16 2017-12-07 京セラ株式会社 Chip-type electronic components and modules
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6219220B1 (en) 1998-04-07 2001-04-17 Murata Manufacturing Co., Ltd. Ceramic electronic component having terminal electrode that includes a second porous layer
WO2000013190A1 (en) * 1998-08-28 2000-03-09 Matsushita Electric Industrial Co., Ltd. Conductive paste, conductive structure using the same, electronic part, module, circuit board, method for electrical connection, method for manufacturing circuit board, and method for manufacturing ceramic electronic part
US6479763B1 (en) 1998-08-28 2002-11-12 Matsushita Electric Industrial Co., Ltd. Conductive paste, conductive structure using the same, electronic part, module, circuit board, method for electrical connection, method for manufacturing circuit board, and method for manufacturing ceramic electronic part
KR100585549B1 (en) * 1999-03-29 2006-06-01 다이요 유덴 가부시키가이샤 Multi layer electronic part
JP2002271032A (en) * 2001-03-13 2002-09-20 Ibiden Co Ltd Printed wiring board and manufacturing method therefor
JP2002271031A (en) * 2001-03-13 2002-09-20 Ibiden Co Ltd Printed wiring board and manufacturing method therefor
JP2002271029A (en) * 2001-03-13 2002-09-20 Ibiden Co Ltd Printed wiring board and manufacturing method therefor
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JP2002271034A (en) * 2001-03-13 2002-09-20 Ibiden Co Ltd Printed wiring board and manufacturing method therefor
US8248752B2 (en) 2009-12-30 2012-08-21 Samsung Electro-Mechanics Co., Ltd. Multilayer ceramic capacitor
JP2011139021A (en) * 2009-12-30 2011-07-14 Samsung Electro-Mechanics Co Ltd Multilayer ceramic capacitor
JP2012028689A (en) * 2010-07-27 2012-02-09 Tdk Corp Terminal electrode and ceramic electronic component equipped with it
JP2015023120A (en) * 2013-07-18 2015-02-02 Tdk株式会社 Laminated capacitor
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