JP3000825B2 - Ceramic electronic components - Google Patents

Ceramic electronic components

Info

Publication number
JP3000825B2
JP3000825B2 JP5174253A JP17425393A JP3000825B2 JP 3000825 B2 JP3000825 B2 JP 3000825B2 JP 5174253 A JP5174253 A JP 5174253A JP 17425393 A JP17425393 A JP 17425393A JP 3000825 B2 JP3000825 B2 JP 3000825B2
Authority
JP
Japan
Prior art keywords
layer
external electrode
borosilicate glass
multilayer ceramic
ceramic capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP5174253A
Other languages
Japanese (ja)
Other versions
JPH0729769A (en
Inventor
幸雄 眞田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP5174253A priority Critical patent/JP3000825B2/en
Publication of JPH0729769A publication Critical patent/JPH0729769A/en
Application granted granted Critical
Publication of JP3000825B2 publication Critical patent/JP3000825B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明はセラミック電子部品に関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic electronic component.

【0002】[0002]

【従来の技術】セラミック電子部品について、その一例
である積層セラミックコンデンサについて説明する。図
2は積層セラミックコンデンサ1の断面図である。この
積層セラミックコンデンサの構造を説明すると、まず、
誘電体セラミック2となるセラミックスラリ−を準備
し、このセラミックスラリ−を用いて、ドクタ−ブレ−
ド法等により誘電体セラミックグリ−ンシ−トを作成
し、そのシ−トの片面に内部電極3となる導電性ペ−ス
トをスクリ−ン印刷法等で塗布する。導電性ペ−ストが
形成されたセラミックグリ−ンシ−トを、導電性ペ−ス
トの引き出されている側が互い違いになるように複数枚
積層、熱圧着し、適当な形状に切断し、焼成する。この
時、誘電体セラミック2の間に内部電極3が形成された
積層焼結体が得られる。その両端に内部電極3と電気的
に接続されるよう外部電極4を設けて、積層セラミック
コンデンサ1とする。図3は積層セラミックコンデンサ
1の一般的な使用方法で、プリント基板5に積層セラミ
ックコンデンサ1を半田6で固定している。
2. Description of the Related Art A multilayer ceramic capacitor as an example of a ceramic electronic component will be described. FIG. 2 is a sectional view of the multilayer ceramic capacitor 1. To explain the structure of this multilayer ceramic capacitor, first,
A ceramic slurry to be the dielectric ceramic 2 is prepared, and a doctor blade is used by using the ceramic slurry.
A dielectric ceramic green sheet is formed by a printing method or the like, and a conductive paste serving as the internal electrode 3 is applied to one surface of the sheet by a screen printing method or the like. A plurality of ceramic green sheets on which the conductive paste is formed are laminated, thermocompressed, cut into an appropriate shape, and fired so that the side from which the conductive paste is drawn out is alternated. . At this time, a laminated sintered body in which the internal electrodes 3 are formed between the dielectric ceramics 2 is obtained. External electrodes 4 are provided at both ends of the multilayer ceramic capacitor 1 so as to be electrically connected to the internal electrodes 3. FIG. 3 shows a general method of using the multilayer ceramic capacitor 1, in which the multilayer ceramic capacitor 1 is fixed to a printed circuit board 5 with solder 6.

【0003】[0003]

【発明が解決しようとする課題】積層セラミックコンデ
ンサ1は図3に示すように、プリント基板5に固定して
使用されるため、プリント基板5が湾曲すると積層セラ
ミックコンデンサ1に影響して、ときとして外部電極4
付近でクラック7aが発生することがある。また、熱衝
撃試験を行うと、端面から内部方向にクラック7bが発
生することがある。プリント基板5が湾曲したときに、
発生する曲げ応力に対して良好な外部電極4の材料とし
て、ホウケイ酸鉛系ガラスを含んだ金属ペ−ストがある
が、熱衝撃試験ではクラックが生じ易い。また、熱衝撃
性に良好な外部電極4の材料としてホウケイ酸亜鉛系ガ
ラスを含んだ金属ペ−ストがあるが、プリント基板5が
湾曲したときに、発生する曲げ応力でクラックが発生し
易い。前記のように、熱衝撃試験に良ければ、曲げ応力
でクラックが発生し、曲げ応力に対して良好であれば、
熱衝撃試験でクラックが発生し、両方の特性を満足する
外部電極材料がない。
As shown in FIG. 3, since the multilayer ceramic capacitor 1 is used by being fixed to the printed circuit board 5, when the printed circuit board 5 is bent, the multilayer ceramic capacitor 1 affects the multilayer ceramic capacitor 1, and sometimes it is affected. External electrode 4
A crack 7a may be generated in the vicinity. In addition, when the thermal shock test is performed, cracks 7b may be generated from the end face toward the inside. When the printed circuit board 5 is curved,
A metal paste containing lead borosilicate glass is a good material for the external electrode 4 with respect to the generated bending stress, but cracks tend to occur in a thermal shock test. As a material of the external electrode 4 having good thermal shock resistance, there is a metal paste containing zinc borosilicate glass. However, when the printed board 5 is bent, cracks are easily generated due to bending stress generated. As described above, if it is good for the thermal shock test, cracks occur due to bending stress, and if it is good for bending stress,
Cracks occur in the thermal shock test, and no external electrode material satisfies both characteristics.

【0004】本発明の目的は、熱衝撃試験、プリント基
板の湾曲等に対する曲げ応力性のある外部電極材料によ
り形成されたセラミック電子部品を提供することにあ
る。
An object of the present invention is to provide a ceramic electronic component formed of an external electrode material having a bending stress property against a thermal shock test, a bending of a printed board, and the like.

【0005】[0005]

【課題を解決するための手段】すなわち、本発明はセラ
ミック電子部品の外部電極において、前記外部電極は1
層目が熱衝撃性に強いホウケイ酸亜鉛系ガラスを含有す
金属焼き付け層、その上層の2層目が曲げ応力性に強
いホウケイ酸鉛系ガラスを含有する金属焼き付け層、
の表面の3層目がめっき層から構成されている。
That is, the present invention relates to an external electrode of a ceramic electronic component, wherein the external electrode has one or more electrodes.
Layer contains zinc borosilicate glass which is strong against thermal shock
Metal baking layer that strength in the second layer is the bending stress of the upper layer
Metal baking layer containing lead borosilicate glass have, their
The third layer on the surface of is composed of a plating layer .

【0006】[0006]

【0007】[0007]

【0008】[0008]

【作用】以上の構成により、熱衝撃試験やプリント基板
を湾曲させて電子部品に曲げ応力を与える試験において
クラックが発生しない。
[Function] With the above configuration, thermal shock test and printed circuit board
In bending test of electronic components to apply bending stress to electronic components
No cracks occur.

【0009】[0009]

【実施例】図1は、本発明の積層セラミックコンデンサ
の断面図である。ここに積層セラミックコンデンサの構
造を説明すると、この積層セラミックコンデンサ1は、
複数層の誘電体セラミック2の間に内部電極3が端面に
交互に導出されるように介挿して積層体とし、その両端
には内部電極3と電気的に接続する外部電極4が形成さ
れている。本発明においては、外部電極4は、熱衝撃性
に強いホウケイ酸亜鉛系ガラスを含有する金属焼き付け
層4aと曲げ応力性に強いホウケイ酸鉛系ガラスを含有
する金属焼き付け層4bとからなる。
FIG. 1 is a sectional view of a multilayer ceramic capacitor according to the present invention. Here, the structure of the multilayer ceramic capacitor will be described.
Internal electrodes 3 are interposed between a plurality of layers of dielectric ceramics 2 so as to be alternately led out to the end faces to form a laminate, and external electrodes 4 electrically connected to the internal electrodes 3 are formed at both ends. I have. In the present invention, the external electrode 4 has a thermal shock resistance.
Baking containing zinc borosilicate glass resistant to heat
Contains layer 4a and lead borosilicate glass that is strong in bending stress
Metal baking layer 4b.

【0010】(実施例1)積層体の端面にホウケイ酸亜
鉛系ガラスをペ−スト固形分中4wt%含有する銀ペ−
ストを塗布、乾燥した。その上層にホウケイ酸鉛系ガラ
スをペ−スト固形分中4wt%含有する銀ペ−ストを1
層目の両端と一致しないように、つまり1層目の銀ペー
ストを完全に覆うように大きめに塗布、乾燥した。この
後700℃で5分間保持し焼き付けて外部電極を形成し
た。さらに、その表面に電解めっきによりNi層、Sn
層を形成した。
(Example 1) Silver paste containing 4 wt% of zinc borosilicate glass in the paste solid content on the end face of the laminate.
The strike was applied and dried. In the upper layer, a silver paste containing 4 wt% of lead borosilicate glass in the paste solid content was added.
The coating was large and dried so as not to coincide with both ends of the layer, that is, to completely cover the silver paste of the first layer. Thereafter, the resultant was held at 700 ° C. for 5 minutes and baked to form an external electrode. Furthermore, a Ni layer, Sn
A layer was formed.

【0011】(実施例2)積層体の端面にホウケイ酸亜
鉛系ガラスをペ−スト固形分中4wt%含有する銀ペ−
ストを塗布し、700℃で5分間保持し焼き付けた。そ
の上層にホウケイ酸鉛系ガラスをペ−スト固形分中4w
t%含有する銀ペ−ストを1層目の両端が一致しないよ
うに、つまり1層目の銀ペーストを完全に覆うように大
きめに塗布し、700℃で5分間保持し焼き付けた。さ
らに、その表面に電解めっきによりNi層、Sn層を形
成した。
(Example 2) A silver paste containing zinc borosilicate glass at 4% by weight of paste solid content on the end face of the laminate.
A strike was applied, held at 700 ° C. for 5 minutes, and baked. In the upper layer, lead borosilicate glass is applied in a paste solid content of 4 watts.
The silver paste containing t% was applied in a large size so that both ends of the first layer did not coincide with each other, that is, completely covered the silver paste of the first layer, and baked at 700 ° C. for 5 minutes. Further, a Ni layer and a Sn layer were formed on the surface by electrolytic plating.

【0012】(比較例1)積層体の端面にホウケイ酸亜
鉛系ガラスをペ−スト固形分中4wt%含有する銀ペ−
ストを塗布した。この後700℃で5分間保持し焼き付
けて外部電極を形成した。その表面に電解めっきにより
Ni層、Sn層を形成した。
Comparative Example 1 A silver paste containing zinc borosilicate glass at 4 wt% in paste solids on the end face of the laminate.
A strike was applied. Thereafter, the resultant was held at 700 ° C. for 5 minutes and baked to form an external electrode. A Ni layer and a Sn layer were formed on the surface by electrolytic plating.

【0013】(比較例2)積層体の端面にホウケイ酸鉛
系ガラスをペ−スト固形分中4wt%含有する銀ペ−ス
トを塗布した。この後700℃で5分間保持し焼き付け
て外部電極を形成した。その表面に電解めっきによりN
i層、Sn層を形成した。
Comparative Example 2 A silver paste containing lead borosilicate glass in a paste solid content of 4% by weight was applied to the end face of the laminate. Thereafter, the resultant was held at 700 ° C. for 5 minutes and baked to form an external electrode. The surface is electrolytically plated with N
An i layer and a Sn layer were formed.

【0014】(比較例3)積層体の端面に、実施例2で
用いた両銀ペーストを、形成順を逆にして、つまり1層
目にホウケイ酸鉛系ガラスをペ−スト固形分中4wt%
含有する銀ペ−スト、2層目にホウケイ酸亜鉛系ガラス
をペ−スト固形分中4wt%含有する銀ペ−ストを、そ
の他の条件を同じにして形成した。
(Comparative Example 3) The silver paste used in Example 2 was applied to the end face of the laminate in the reverse order of formation, that is, lead borosilicate glass was used as the first layer in a paste solid content of 4 wt%. %
A silver paste containing zinc borosilicate glass as a second layer in the second layer and containing 4 wt% of the paste solid content was formed under the same conditions as the other conditions.

【0015】(比較例4)積層体の端面に、実施例2と
同様にして、大きさが同じでぴったりと重ね合わせた2
層の銀焼き付け層を形成し、さらにその表面に電解めっ
きによりNi層、Sn層を形成した。
(Comparative Example 4) In the same manner as in Example 2, the same size as that of Example 2
A silver baking layer was formed, and a Ni layer and a Sn layer were formed on the surface by electrolytic plating.

【0016】こうして作られた積層セラミックコンデン
サを用いて、熱衝撃試験、基板湾曲による曲げ応力試験
を行った。熱衝撃試験方法は本発明で得られた試料を1
00個用いて、325℃(ΔT=300℃)の溶融はん
だ中に2秒間浸漬し行った。良品は積層セラミックコン
デンサにクラックが無いこととした。また、曲げ応力性
試験においては、本発明で得られた試料を30個用い
て、厚み1.6mmのガラスエポキシ製のプリント基板
に半田で固定し、積層セラミックコンデンサのない側に
基板を湾曲させてコンデンサにクラックが生じたたわみ
量を測定した。表1は熱衝撃試験、基板湾曲による曲げ
応力試験の各結果を示している。曲げ応力試験結果の数
値は試料30個の平均値である。
Using the multilayer ceramic capacitor thus manufactured, a thermal shock test and a bending stress test by bending the substrate were performed. The thermal shock test method is based on the sample obtained in the present invention as 1
Each of the samples was immersed in molten solder at 325 ° C. (ΔT = 300 ° C.) for 2 seconds. A good product has no cracks in the multilayer ceramic capacitor. In the bending stress test, 30 samples obtained in the present invention were used and fixed to a 1.6 mm thick glass epoxy printed board with solder, and the board was bent to the side without the multilayer ceramic capacitor. The amount of deflection at which a crack occurred in the capacitor was measured. Table 1 shows the results of the thermal shock test and the bending stress test based on the substrate curvature. The numerical value of the bending stress test result is an average value of 30 samples.

【0017】[0017]

【表1】 [Table 1]

【0018】実施例は積層セラミックコンデンサを用い
て説明したが、そのほかの外部に電極をもつセラミック
電子部品にも適用できる。また、外部電極は銀ペ−スト
を使用したが、ホウケイ酸亜鉛ガラスやホウケイ酸鉛ガ
ラスと反応して組成変化が起きない導電ペ−ストに適用
してもよい。さらに、実施例で示したように外部電極の
表面にSn、Niなどの金属層をめっきなどで覆って多
層にしても構わない。
Although the embodiment has been described using a multilayer ceramic capacitor, the present invention can be applied to other ceramic electronic parts having external electrodes. Further, although silver paste is used for the external electrode, it may be applied to a conductive paste which does not change its composition by reacting with zinc borosilicate glass or lead borosilicate glass. Further, as shown in the embodiment, a metal layer such as Sn or Ni may be covered on the surface of the external electrode by plating or the like to form a multilayer.

【0019】[0019]

【発明の効果】本発明のセラミック電子部品の外部電極
とすることにより、熱衝撃試験や基板湾曲に対する曲げ
応力試験においてクラックが起こらない。従って、セラ
ミック電子部品全体の良品率の向上が計れる。
By using the external electrodes of the ceramic electronic component of the present invention, cracks do not occur in a thermal shock test or a bending stress test for substrate bending. Therefore, the non-defective rate of the entire ceramic electronic component can be improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本実施例における積層セラミックコンデンサの
断面図である。
FIG. 1 is a cross-sectional view of a multilayer ceramic capacitor in the present embodiment.

【図2】従来の積層セラミックコンデンサの断面図であ
る。
FIG. 2 is a sectional view of a conventional multilayer ceramic capacitor.

【図3】従来の積層セラミックコンデンサをプリント基
板に固定した状態を示す側面図である。
FIG. 3 is a side view showing a state in which a conventional multilayer ceramic capacitor is fixed to a printed circuit board.

【符号の説明】[Explanation of symbols]

1 積層セラミックコンデンサ 2 誘電体セラミック 3 内部電極 4a ホウケイ酸亜鉛系ガラスを含む金属焼き付
け層からなる外部電極 4b ホウケイ酸鉛系ガラスを含む金属焼き付け
層からなる外部電極
DESCRIPTION OF SYMBOLS 1 Multilayer ceramic capacitor 2 Dielectric ceramic 3 Internal electrode 4a External electrode consisting of a metal baking layer containing zinc borosilicate glass 4b External electrode consisting of a metal baking layer containing lead borosilicate glass

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】セラミック電子部品の外部電極において、
前記外部電極は1層目が熱衝撃性に強いホウケイ酸亜鉛
系ガラスを含有する金属焼き付け層、その上層の2層目
曲げ応力性に強いホウケイ酸鉛系ガラスを含有する
属焼き付け層、その表面の3層目がめっき層から構成さ
れていることを特徴とするセラミック電子部品。
1. An external electrode of a ceramic electronic component,
The first layer of the external electrode is zinc borosilicate which is strong in thermal shock resistance
A metal baking layer containing a base glass, a second baking layer above the baking layer, a metal baking layer containing a lead borosilicate glass having high bending stress, and a third layer on the surface thereof being a plating layer. A ceramic electronic component.
JP5174253A 1993-07-14 1993-07-14 Ceramic electronic components Expired - Fee Related JP3000825B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5174253A JP3000825B2 (en) 1993-07-14 1993-07-14 Ceramic electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5174253A JP3000825B2 (en) 1993-07-14 1993-07-14 Ceramic electronic components

Publications (2)

Publication Number Publication Date
JPH0729769A JPH0729769A (en) 1995-01-31
JP3000825B2 true JP3000825B2 (en) 2000-01-17

Family

ID=15975400

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5174253A Expired - Fee Related JP3000825B2 (en) 1993-07-14 1993-07-14 Ceramic electronic components

Country Status (1)

Country Link
JP (1) JP3000825B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1087433A4 (en) 1999-03-30 2001-08-16 Jsr Corp Process for the formation of silicon oxide films
JP3760770B2 (en) * 2001-01-05 2006-03-29 株式会社村田製作所 Multilayer ceramic electronic component and manufacturing method thereof

Also Published As

Publication number Publication date
JPH0729769A (en) 1995-01-31

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