JP2005159121A - Laminated ceramic electronic component - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a highly reliable laminated ceramic capacitor for preventing solder explosion, and for suppressing any crack at the time of surface mounting on a wiring board. <P>SOLUTION: Thick film conductor layers 5a and 6a electrically connected to internal electrode layers 3 and 4 are formed on the side face of a laminate 1 constituted by laminating a plurality of rectangular dielectric layers 2 with internal electrode layers 3 and 4 interposed, and metallic plating layers 5b to 6b are formed on thick film conductor layers 5a and 6a so that a laminated ceramic electronic component 10 can be configured. The surfaces of the thick conductor layers 5a and 6a are formed with a plurality of recesses X, and the metallic plating layers 5b to 6c are selectively formed on the surfaces of the thick film conductor layers 5a and 6a on which any recess X is not formed so that a plurality of through-holes Y can be formed in the metallic plating layers 5b to 6c. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a multilayer ceramic electronic component.

  A typical multilayer ceramic electronic component will be described using a multilayer ceramic capacitor.

  2A is a longitudinal sectional view showing a conventional multilayer ceramic capacitor, and FIG. 2B is a sectional view showing a state in which the conventional multilayer ceramic capacitor is mounted on a wiring board. FIG. 3 is an enlarged longitudinal sectional view showing the periphery of an external electrode of a conventional multilayer ceramic capacitor.

  In FIG. 2A, a multilayer ceramic capacitor 20 includes a plurality of rectangular dielectric layers 22 and internal electrode layers 23, 24 on the side surfaces of a multilayer body 21 alternately laminated with internal electrode layers 23, External electrodes 25, 26 electrically connected to 24 are formed. The external electrodes 25 and 26 are thick film conductor layers 25a and 26a formed by baking a conductive paste containing a metal component and a glass component, and Ni plating formed on the thick film conductor layers 25a and 26a by a wet plating method. The layers 25b and 26b, and the Sn plating layers 25c and 26c formed on the surfaces of the Ni plating layers 25b and 26b by a wet plating method.

Such a multilayer ceramic capacitor 20 is surface-mounted by solder 13 on a wiring pattern 12 on a wiring board 11 as shown in FIG. At this time, the Sn plating layers 25c and 26c are melted into the solder 13, but the Ni plating layers 25b and 26b are not melted into the solder 13. Therefore, the solder 13 melts the Sn plating layers 25c and 26c, and approximately the Ni plating layer 25b. , 26b.
JP 2000-331866 A (page 4-9, FIG. 2) JP 2002-246262 (page 3-5, FIG. 1)

  However, according to the above embodiment, as shown in FIG. 3, in the Ni and Sn plating process, the plating solution penetrates into the thick film conductor layers 25a and 26a, and the voids in the thick film conductor layers 25a and 26a. If moisture in the plating solution or plating hydrate (which means that chloride ions or sulfate ions in the plating solution are dissolved in water; the same applies hereinafter) remains in the plating solution. There is a problem in that the solder 13 is blown away (hereinafter referred to as solder explosion) by vaporizing and expanding by heat such as soldering and the moisture gas being ejected from the opening of the gap in the thick film conductor layers 25a and 26a. In particular, when the distance m between the external electrodes 25 and 26 of adjacent multilayer ceramic capacitors 20 is as small as 200 μm or less, as shown in FIG.

  In order to solve the above problems, in the Ni and Sn plating process, the metal component and the glass component of the thick film conductor layers 25a and 26a are prevented from entering and remaining in the thick film conductor layers 25a and 26a. A method of increasing the area occupancy is conceivable. At this time, however, there is a problem that a crack is generated in the multilayer ceramic capacitor when the wiring board 11 expands and contracts in a state of being surface-mounted on the wiring board 11. It was.

  The present invention has been devised in view of the above-mentioned problems, and its purpose is to prevent the occurrence of solder explosion and to suppress cracks during surface mounting on a wiring board, and to provide a highly reliable multilayer ceramic electronic. To provide parts.

  According to the present invention, a thick film conductor layer electrically connected to the internal electrode layer is formed on a side surface of a laminate formed by laminating a plurality of rectangular dielectric layers with an internal electrode layer interposed therebetween. In addition, in the multilayer ceramic electronic component formed by forming a metal plating layer on the thick film conductor layer, the surface of the thick film conductor layer has a large number of recesses, and the metal plating layer is formed on the recesses. A large number of through holes are provided in the metal plating layer selectively formed on the surface of the thick film conductor layer which does not exist.

  Moreover, the average opening diameter of the said recessed part is 5 micrometers-10 micrometers, and the sum total of the opening area of these recessed parts occupies 8%-40% of the whole surface area of the said thick film conductor layer, It is characterized by the above-mentioned.

  According to the present invention, the metal plating layer has a large number of recesses on the surface of the thick film conductor layer, and the metal plating layer is selectively formed on the surface of the thick film conductor layer without the recesses. Since the through-holes are provided, even if moisture in the plating solution or plating hydrate remains in the recesses in the thick film conductor layer, such moisture or plating hydration can be achieved by heating after the plating layer is formed. Since the object can be easily removed, solder explosion can be prevented. Further, since the concave portion exists in the thick film conductor layer, it is possible to prevent the multilayer ceramic capacitor from being cracked when the wiring substrate expands and contracts in a state of being surface-mounted on the wiring substrate.

  According to the present invention, the average opening diameter of the recesses is 5 μm to 10 μm, and the total opening area of these recesses occupies 8% to 40% of the entire surface area of the thick film conductor layer. It is possible to effectively prevent solder explosion without affecting the shape and electrical characteristics of the electrodes, and more effectively suppress cracks during surface mounting on the wiring board, thereby improving reliability. it can.

  The multilayer ceramic electronic component of the present invention will be described below with reference to the drawings.

  A typical multilayer ceramic electronic component will be described using a multilayer ceramic capacitor.

  FIG. 1 is a view showing a multilayer ceramic capacitor of the present invention, in which (a) is an external perspective view, (b) is a longitudinal sectional view, and (c) is an enlarged view of the periphery of an external electrode of (b). is there.

  In the figure, 10 is a multilayer ceramic capacitor, 1 is a multilayer body, 2 is a dielectric layer, 3 and 4 are internal electrode layers, and 5 and 6 are external electrodes.

The dielectric layer 2 is made of a non-reducing dielectric material mainly composed of barium titanate (BaTiO ₃ ) or the like, and has a thickness of 1 to 5 μm for increasing the capacity. The dielectric layer 2 has a shape of 0.6 mm × 0.3 mm or the like, and is laminated in the upward direction in the figure to form the laminate 1. The shape, thickness, and number of layers of the dielectric layer 2 can be arbitrarily changed depending on the capacitance value.

  The internal electrode layers 3 and 4 are made of a material mainly composed of Cu and Ni and have a thickness of 0.5 to 2 μm. The two internal electrode layers 3 and 4 adjacent to each other in the stacking direction of the dielectric layer 2 extend to different end face sides of the stacked body 1 and are connected to different external electrodes 5 and 6, respectively.

  The external electrodes 5 and 6 are formed on the thick film conductor layers 5a and 6a formed by baking a conductive paste containing a metal component such as Cu and Cu-Ni and a glass component, and the thick film conductor layers 5a and 6a. Ni plating layers 5b and 6b, and Sn plating layers 5c and 6c formed on the Ni plating layers 5b and 6b.

  Here, the thick film conductor layers 5a and 6a have a large number of recesses X at the interfaces with the Ni plating layers 5b and 6b, and the Ni plating layers 5b and 6b and the Sn plating layers 5c and 6c exist in the presence of the recesses X. A large number of through holes Y are provided in the Ni plating layers 5b and 6b and the Sn plating layers 5c and 6c. For this reason, as shown in FIG. 1 (c), when the moisture in the plating solution and the plating hydrate (indicated by H in the figure) remain in the recesses X in the thick film conductor layers 5a and 6a, After forming the Ni plating layers 5a and 6a and the Sn plating layers 5b and 6b, these moisture and plating hydrates can be easily removed by a method such as heating, so that solder explosion can be prevented. Further, since the concave portions X exist in the thick film conductor layers 5a and 6a, when the wiring board 11 expands and contracts in a state of being surface-mounted on the wiring board 11, a crack is generated in the multilayer ceramic capacitor 10. Can also be prevented.

  In the thick film conductor layers 5a and 6a, in particular, the average opening diameter r of the recesses X is 5 μm to 10 μm, and the total opening area of these recesses X is the Ni plating layers 5b and 6b side of the thick film conductor layers 5 and 6 It is preferable to occupy 8% to 40% of the entire surface area. In this case, since the average opening diameter r of the recess X is 5 μm or more, when forming the Ni plating layers 5b and 6b on the thick film conductor layers 5a and 6a, the Ni plating layers 5b and 6b completely form the recess X. The Ni plating layers 5b and 6b are selectively formed on the surfaces of the thick film conductor layers 5a and 6a where the concave portion X does not exist without growing so as to close the Ni plating layers 5b and 6b and the Sn plating layers 5c and 6c. A large number of through-holes Y can be provided in the solder, and solder explosion can be prevented. On the other hand, since the average opening diameter r of the concave portion X is 10 μm or less, even when the thickness ta of the thick film conductor layers 5a and 6a is reduced, the shape and electrical characteristics of the external electrodes 5 and 6 may be affected. Absent.

  Furthermore, since the total opening area of the recesses X is 8% or more of the total surface area on the Ni plating layers 5b and 6b of the thick film conductor layers 5a and 6a, cracks during surface mounting are more effective on the wiring board 11. Can be suppressed. On the other hand, since the total opening area of the recesses X is 40% or less of the entire surface area on the Ni plating layers 5b and 6c of the thick film conductor layers 5a and 6a, it is possible to suppress a decrease in reliability such as a humidity load test.

  The thickness of the Ni plating layers 5b and 6b may be arbitrarily adjusted in relation to the viscosity so as not to block the opening of the concave portion X of the thick film conductor layers 5a and 6a, and may be, for example, 10 μm or less.

  Here, when the dimension in the length direction of the multilayer ceramic capacitor 10 is L and the thickness of the Ni plating layers 5b and 6b is tb, the range is 0.01 ≦ ta / L ≦ 0.05, 1 μm ≦ tb ≦ 4 μm. It is desirable to be. That is, as the thickness ta of the thick film conductor layers 25a and 26a increases, the concave portions X that are intricately complicated from the surfaces of the thick film conductor layers 25a and 26a increase, but the range of ta / L ≦ 0.05. Therefore, there are few intricately indented recesses X, and this also makes it easy to remove moisture and hydrated plating by a method such as heating after forming the Ni plating layers 5a and 6a and the Sn plating layers 5b and 6b. Easy to remove. Further, when the thickness tb of the Ni plating layers 25b and 26b is increased, the Ni plating layers 25b and 26b are formed so as to straddle the concave portion X as shown in FIG. 3. However, since the thickness tb ≦ 4 μm, the thickness without the concave portion X exists. It is selectively formed on the film conductor layers 5a and 6a. Furthermore, since it is in the range of ta / L ≧ 0.01, the uniform thick film conductor layers 5a and 6a are formed by a simple and inexpensive method of baking after applying a conductive paste containing a metal component and a glass component. Can do. On the other hand, since it exists in the range of tb> = 1 micrometer, the Ni plating layers 5b and 6b can be uniformly formed also in the edge part of the laminated body 1, and mountability becomes favorable.

  Hereinafter, a method for manufacturing the multilayer ceramic capacitor 10 of the present invention will be described. Each symbol is not distinguished before and after firing.

  First, a conductive paste is applied by screen printing to a predetermined region of the ceramic green sheet 2 to be a dielectric layer and then dried to form conductor patterns 3 and 4 to be internal electrode layers.

  Then, after stacking a predetermined number of laminated layers such that the conductor patterns 3 and 4 face each other, such ceramic green sheets are cut to form a laminated body 1 and fired by adding a predetermined atmosphere, temperature and time. Thereby, the internal electrode layers 3 and 4 are exposed at the pair of end faces of the multilayer body 1.

  Next, external electrodes 5 and 6 are formed on both end faces of the laminate 1. Specifically, first, thick film conductor layers 5 a and 6 a are formed on the surface of the multilayer body 1.

  The thick film conductor layers 5a and 6a are formed by using a conductive paste in which a metal component such as Cu or Cu-Ni, a borosilicate glass powder, an acrylic organic binder resin, and an organic solvent such as terpineol is mixed. After coating by a dipping method, a screen printing method or the like, it is dried at 100 ° C. to 150 ° C. to obtain a conductor film to be the thick film conductor layers 5a and 6a.

  At this time, in order to make the total opening area of the recesses X be 8% or more of the entire surface area of the Ni plating layers 5b and 6b of the thick film conductor layers 5a and 6a, for example, average grains of Cu powder and Ni powder A diameter of 3 μm or more may be used. Further, the ratio of the solid content in the conductive paste is, for example, 60 wt% to 90 wt%.

  And the thick film | membrane conductor layers 5a and 6a are formed by baking the conductor films 5a and 6a at 700 to 900 degreeC in nitrogen atmosphere.

  Many concave portions X exist on the surfaces of the thick film conductor layers 5a and 6a formed as described above.

  Ni plating layers 5b and 6b are formed on the surfaces of the thick film conductor layers 5a and 6a by a wet plating method such as an electrolytic plating method. At this time, the Ni plating layers 5b and 6b are selectively formed on the surfaces of the thick film conductor layers 5a and 6a where the concave portion X does not exist by adjusting the plating conditions.

  Then, the Sn plating layers 5c and 6c are formed on the surfaces of the Ni plating layers 5b and 6b by a wet plating method such as electrolytic plating. At this time, by selectively forming the Sn plating layers 5c and 6c on the surfaces of the Ni plating layers 5b and 6b, a large number of through holes Y are provided in the Ni plating layers 5b and 6b and the Sn plating layers 5c and 6c.

  In this way, a multilayer ceramic capacitor 10 as shown in FIG. 1 is obtained.

  Here, after forming the Sn plating layers 5c and 6c, the multilayer ceramic capacitor 10 is immersed in cleaning water such as pure water, and ultrasonic plating and boiling are performed to remove the remaining plating hydrate. You may make it do. That is, when only moisture remains in the thick film conductor layers 5a and 6a, it can be removed in a heating state of 100 ° C. or less.

  It should be noted that the present invention is not limited to the above-described embodiment, and various modifications and improvements can be made without departing from the scope of the present invention.

  For example, in the above embodiment, the Ni plating layers 5b and 6b and the Sn plating layers 5c and 6c are formed on the surfaces of the thick film conductor layers 5a and 6a, but any other plating layer can be used, or three or more layers can be used. The plating layer may be formed.

  The inventor formed a laminated body 1 after firing in which the dielectric layer 2 containing barium titanate as a main component was laminated and the internal electrode layers 3 and 4 were exposed on a pair of end faces. Next, after forming conductor films 5a and 6a to be thick film conductor layers on the end face of the laminate 1 by dipping, the conductor films 5a and 6a are baked at 850 ° C. and connected to the internal electrode layers 3 and 4, respectively. Thick film conductor layers 5a and 6a were formed. Next, Ni plating films 5b and 6b and Sn plating films 5c and 6c are sequentially formed on the surfaces of the thick film conductor layers 5a and 6a by electrolytic plating, and the 0603 type (L = 0.6 mm) as shown in FIG. 1) was produced. Further, the obtained multilayer ceramic capacitor 10 was heated to 80 ° C.

  At this time, as shown in Table 1, by controlling the average particle diameter of the metal component in the conductive paste, the solid content ratio, and the thickness ta of the thick film conductor layers 5a and 6a, the average opening diameter r of the recess X The ratio of the total opening area of the recesses X in the entire surface area of the Ni plating layers 5b and 6b on the thick film conductor layers 5a and 6a was adjusted. Further, by controlling the thickness tb of the Ni plating layers 5b and 6b, a comparative example in which the through hole Y was not formed in the Ni plating layers 5b and 6b and the Sn plating layers 5c and 6c was also produced.

  The obtained multilayer ceramic capacitor 10 was evaluated for the rate of occurrence of solder explosion, deflection strength, capacitance, and wet load test.

  The presence or absence of the through hole Y, the average opening diameter r of the recess X, the Ni plating layer 5b of the thick film conductor layers 5a and 6a, and the ratio of the total opening area of the recess X in the entire surface area on the 6b side are It was determined from the SEM image of the cross section.

  The rate of occurrence of solder explosion was determined by applying solder 13 to the wiring pattern 12 on the glass epoxy substrate (wiring substrate) 11 so that the distance m between the external electrodes 5 and 6 of the adjacent multilayer ceramic capacitor 10 was 200 μm. The ratio of the solder 13 blown off was determined by observing with a metal microscope after heating to ° C.

  In the bending strength test, the multilayer ceramic capacitor 10 was surface-mounted by soldering 13 on a wiring pattern 12 on a glass epoxy substrate (wiring substrate) 11 having a thickness of 1.6 mm. Then, after bending the glass epoxy substrate 11 so that the glass epoxy substrate moves 2.0 mm upward at the center of the external electrodes 5 and 6, the sample is observed with a metal microscope and no crack is generated. As a ○ mark and a case where a crack occurred as a defective product.

  The capacitance was determined by an impedance analyzer, and a case where the capacitance was 95% or more of the nominal capacitance was marked as “good”, and a case where it was less than 95% was marked as “defective”.

  The humidity load test is held for 1000 hours under the conditions of a temperature of 85 ° C. and a relative humidity of 85%. A sample having an insulation resistance value exceeding 40 mΩ is regarded as a non-defective product and a sample having a resistance of 40 mΩ or less is regarded as a defective product. The proportion of non-defective products was measured.

  As a judgment method, a case where a solder explosion occurred was marked as x as a defective product. Also, among the samples where solder explosion did not occur, cracks in the flexural strength test did not occur, the capacitance was 95% or more of the nominal capacity, and the insulation resistance value after the moisture load test exceeded 40 mΩ Was marked with a circle.

The results are shown in Table 1.

  As shown in the table, in this example (sample numbers 2 to 12) in which the through holes Y were provided in the Ni plating layers 5a and 6a and the Sn plating layer, no solder explosion occurred. In particular, the average opening diameter of the recesses X is 5 μm to 10 μm, and the total opening area of these recesses Y occupies 8% to 40% of the total surface area of the Ni plating layers 5b and 6b of the thick film conductor layers 5a and 6a. In the case (sample numbers 2 to 4 and 7 to 11), cracks in the deflection strength test did not occur, the capacitance was 95% or more of the nominal capacity, and the insulation resistance value after the moisture load test was larger than 40 mΩ. became.

  In contrast, in the comparative example (sample number 1) in which the through holes Y were not provided in the Ni plating layers 5a and 6a and the Sn plating layer, 2% solder explosion occurred.

  From these results, in the multilayer ceramic capacitor 10 of the present invention, the thick film conductor layers 5a and 6a have a large number of recesses X at the interfaces with the metal plating layers 5b and 6b, and the metal plating layers 5b to 6c are provided. It has been found that solder explosion can be prevented because the metal plating layers 5b to 6c are provided with a large number of through holes Y selectively formed on the surfaces of the thick film conductor layers 5a and 6a having no recess X.

BRIEF DESCRIPTION OF THE DRAWINGS It is a figure which shows the multilayer ceramic capacitor of this invention, (a) is an external appearance perspective view, (b) is a longitudinal cross-sectional view, (c) is a figure which expands and shows the external electrode periphery of (b). (A) is a longitudinal cross-sectional view which shows the conventional multilayer ceramic capacitor, (b) is sectional drawing which shows the state which mounted the conventional multilayer ceramic capacitor in the wiring board. It is a longitudinal cross-sectional view which expands and shows the external electrode periphery of the conventional multilayer ceramic capacitor.

Explanation of symbols

10 .... Multilayer ceramic capacitors (multilayer ceramic electronic components)
DESCRIPTION OF SYMBOLS 1 ... Laminated body 2 ... Dielectric layer 3, 4 ... Internal electrode layer 5, 6 ... External electrode 5a, 6a * Thick film conductor layer 5b, 6b * Ni plating layer 5c 6c · Sn plating layer X ··· concave portion Y · · · through hole

Claims (2)

A thick film conductor layer electrically connected to the internal electrode layer is formed on the side surface of the laminate formed by laminating a plurality of rectangular dielectric layers with the internal electrode layer interposed therebetween, In a multilayer ceramic electronic component formed by forming a metal plating layer on a thick film conductor layer,
A plurality of recesses are formed on the surface of the thick film conductor layer, and the metal plating layer is selectively formed on the surface of the thick film conductor layer without the recesses, and a plurality of through holes are formed in the metal plating layer. A multilayer ceramic electronic component characterized by comprising: The average opening diameter of the said recessed part is 5 micrometers-10 micrometers, and the sum total of the opening area of these recessed parts occupies 8%-40% of the whole surface area of the said thick film conductor layer, The lamination | stacking of Claim 1 characterized by the above-mentioned. Ceramic electronic components.

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