JPH04257211A - Chip type electronic component - Google Patents
Chip type electronic componentInfo
- Publication number
- JPH04257211A JPH04257211A JP3039387A JP3938791A JPH04257211A JP H04257211 A JPH04257211 A JP H04257211A JP 3039387 A JP3039387 A JP 3039387A JP 3938791 A JP3938791 A JP 3938791A JP H04257211 A JPH04257211 A JP H04257211A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- electronic component
- buffer
- layer
- thermal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000007747 plating Methods 0.000 claims abstract description 21
- 238000000605 extraction Methods 0.000 claims abstract description 20
- 239000000463 material Substances 0.000 claims description 20
- 239000000919 ceramic Substances 0.000 abstract description 25
- 230000035939 shock Effects 0.000 abstract description 8
- 238000005336 cracking Methods 0.000 abstract 1
- 230000007423 decrease Effects 0.000 abstract 1
- 238000005476 soldering Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 6
- 239000011347 resin Substances 0.000 description 5
- 229920005989 resin Polymers 0.000 description 5
- 239000010949 copper Substances 0.000 description 4
- 230000006378 damage Effects 0.000 description 4
- 229910052709 silver Inorganic materials 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- 238000005452 bending Methods 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 230000000149 penetrating effect Effects 0.000 description 3
- 229910052718 tin Inorganic materials 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000010953 base metal Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000001902 propagating effect Effects 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/228—Terminals
- H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
Abstract
Description
【0001】0001
【産業上の利用分野】この発明は、チップ型セラミック
電子部品の特に外部電極に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to chip-type ceramic electronic components, particularly external electrodes.
【0002】0002
【従来の技術】図3はチップ型セラミック電子部品の例
として積層LCフィルタブロックを示しており、セラミ
ック積層体1の両側面に内部電極と導通する複数の外部
電極2を設けて形成され、回路基板3上に載置した状態
で外部電極2をパターンにリフロー半田やフロー半田に
よって接続し、実装されることになる。2. Description of the Related Art FIG. 3 shows a laminated LC filter block as an example of a chip-type ceramic electronic component, which is formed by providing a plurality of external electrodes 2 on both sides of a ceramic laminate 1 that are electrically connected to internal electrodes. While placed on the substrate 3, the external electrodes 2 are connected to the pattern by reflow soldering or flow soldering to be mounted.
【0003】従来、上記のような積層LCチップフィル
タブロック等に採用されている外部電極2は図4に示す
ように、セラミック積層体1の外部に銀や銅等のペース
トを焼付けて内部電極4と導通する引出し電極5を設け
、この引出し電極5の外面にメッキ層6を形成した構造
になっており、このメッキ層6は実装時の半田による引
出し電極5の拡散を防止するためのNiを用いた内側層
7とパターンへの半田付を良好に行うためのSn又はS
n/Pb等を用いた外側層8とからなり、外部電極2は
実質的に三層に形成されている。Conventionally, as shown in FIG. 4, the external electrode 2 employed in the above-mentioned laminated LC chip filter block, etc. is made by baking a paste of silver, copper, etc. on the outside of the ceramic laminate 1 to form the internal electrode 4. It has a structure in which a lead electrode 5 is provided and a plating layer 6 is formed on the outer surface of the lead electrode 5, and this plating layer 6 is coated with Ni to prevent diffusion of the lead electrode 5 by solder during mounting. Sn or S for good soldering to the inner layer 7 and pattern used.
and an outer layer 8 made of n/Pb or the like, and the external electrode 2 is substantially formed in three layers.
【0004】0004
【発明が解決しようとする課題】ところで、上記のよう
な従来の外部電極2は全てが金属材料で形成されている
ため、それ自体に剛性があり、図5のように、回路基板
3に対して半田付けで実装した状態で回路基板3のたわ
み試験を行なうと、回路基板3の曲げによる機械的なス
トレスが外部電極2を介してセラミック積層体1に直接
作用し、図6の如くセラミック積層体1の外部電極2に
近接する部分にクラック9が発生するという問題がある
。[Problems to be Solved by the Invention] By the way, since the conventional external electrode 2 as described above is entirely made of metal material, it has rigidity itself, and as shown in FIG. When the circuit board 3 is subjected to a deflection test with the circuit board 3 mounted by soldering, the mechanical stress due to the bending of the circuit board 3 acts directly on the ceramic laminate 1 through the external electrode 2, causing the ceramic laminate 1 to bend as shown in FIG. There is a problem in that a crack 9 occurs in a portion of the body 1 close to the external electrode 2.
【0005】また、外部電極2は全て金属材料で形成さ
れているため熱伝導性が良く、実装時の半田の熱が外部
電極2及びこれに導通する内部電極4に伝わり、熱伝導
性の悪いセラミック積層体1に対して熱的衝撃を与え、
これが原因でクラックが入るという問題がある。Furthermore, since the external electrodes 2 are all made of metal materials, they have good thermal conductivity, and the heat of the solder during mounting is transferred to the external electrodes 2 and the internal electrodes 4 that are electrically connected to them, resulting in poor thermal conductivity. Applying a thermal shock to the ceramic laminate 1,
This causes the problem of cracks.
【0006】そこで、この発明は、回路基板の曲げによ
る機械的なストレス及び実装時の熱的衝撃を緩衝し、セ
ラミック部分にクラックが発生することのないチップ型
電子部品を提供することを目的とする。[0006] Therefore, an object of the present invention is to provide a chip-type electronic component that can buffer the mechanical stress caused by bending the circuit board and the thermal shock during mounting, and that does not cause cracks in the ceramic part. do.
【0007】[0007]
【課題を解決するための手段】上記のような課題を解決
するため、この発明はチップ型電子部品本体の外部に内
部電極と導通する引出し電極を設け、この引出し電極の
表面に導電ペーストを用いた緩衝材層を該引出し電極の
全面を覆うように形成し、前記緩衝材層の外面にメッキ
層を設けた構成の外部電極を採用したものである。[Means for Solving the Problems] In order to solve the above-mentioned problems, the present invention provides an extraction electrode that is electrically connected to an internal electrode on the outside of a chip-type electronic component body, and uses a conductive paste on the surface of this extraction electrode. The external electrode has a structure in which a buffer material layer is formed to cover the entire surface of the extraction electrode, and a plating layer is provided on the outer surface of the buffer material layer.
【0008】[0008]
【作用】引出し電極とメッキ層の間に導電ペーストを用
いた緩衝材層を設けたので、回路基板に実装した状態で
回路基板のたわみによる変形ストレスが電子部品本体に
伝播するのを緩衝材層で緩和し、電子部品本体にクラッ
クが入るのを防止する。[Function] A buffer layer made of conductive paste is provided between the lead electrode and the plating layer, so the buffer layer prevents deformation stress caused by deflection of the circuit board from propagating to the electronic component body when mounted on the circuit board. to prevent cracks from forming in the electronic component body.
【0009】また、緩衝材層は、半田付け時の熱伝播を
少なくすると共に、メッキ液の内部への浸入を防止し、
熱衝撃による内部電極と電子部品本体の界面の熱衝撃破
壊が抑えられる。[0009] In addition, the buffer material layer reduces heat propagation during soldering and prevents the plating solution from penetrating into the interior.
Thermal shock damage at the interface between the internal electrode and the electronic component body due to thermal shock can be suppressed.
【0010】0010
【実施例】以下、この発明の実施例を添付図面の図1と
図2に基づいて説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Examples of the present invention will be described below with reference to FIGS. 1 and 2 of the accompanying drawings.
【0011】図面はチップ型電子部品として積層LCフ
ィルタを例示しており、一面側に内部電極11を設けた
複数枚のセラミック誘電体12を積層してセラミック積
層体13を形成し、この積層体13の両側面に内部電極
11と導通する外部電極14が設けられている。The drawing illustrates a multilayer LC filter as a chip-type electronic component, in which a plurality of ceramic dielectrics 12 each having an internal electrode 11 on one side are stacked to form a ceramic laminate 13. External electrodes 14 that are electrically connected to the internal electrodes 11 are provided on both sides of the external electrodes 13 .
【0012】上記外部電極14は、セラミック積層体1
3の外部に銀や銅等のペーストを焼付けて内部電極11
と導通させた引出し電極15と、この引出し電極15の
表面に導電ペーストを用いてこの引出し電極15の全面
を覆うように設けた緩衝材層16と、この緩衝材層16
の外面に設けたメッキ層17とからなり、メッキ層17
はNiを用いた内側層18と、Sn又はSn/Pb等を
用いた外側層19で形成され、従って外部電極14は実
質的に四層になっている。The external electrode 14 is made of ceramic laminate 1.
Internal electrode 11 is baked on the outside of 3 with a paste of silver, copper, etc.
an extraction electrode 15 electrically connected to the extraction electrode 15; a buffer material layer 16 provided on the surface of the extraction electrode 15 using conductive paste so as to cover the entire surface of the extraction electrode 15;
The plating layer 17 is formed on the outer surface of the plating layer 17.
is formed of an inner layer 18 made of Ni and an outer layer 19 made of Sn or Sn/Pb, etc. Therefore, the external electrode 14 has substantially four layers.
【0013】前記緩衝材層16の形成に用いる導電ペー
ストの材料は、金属成分と樹脂成分及び溶剤成分等から
なり、金属成分としてはAg、Ni、Cu、Ag/Cu
等である。The material of the conductive paste used to form the buffer material layer 16 includes a metal component, a resin component, a solvent component, etc., and the metal components include Ag, Ni, Cu, and Ag/Cu.
etc.
【0014】また、樹脂成分としてはエポキシ、フェノ
ール等であるが、耐熱性、耐メッキ性、密着性を有する
ものであればよい。[0014] The resin component may be epoxy, phenol, etc., but any resin may be used as long as it has heat resistance, plating resistance, and adhesion.
【0015】上記、緩衝材層16を形成する方法は、デ
ィップ方式、筆塗方法、ローラ方式等適宜に選択すれば
よいと共に、形成した緩衝材層16は材料に適した方法
で硬化させるが、例えば内部電極11及び引出し電極1
5が卑金属で形成されている場合は、それらの酸化防止
を考慮した手法で行なえばよい。The above-mentioned method for forming the buffer material layer 16 may be selected as appropriate, such as a dipping method, a brush coating method, a roller method, etc., and the formed buffer material layer 16 is cured by a method suitable for the material. For example, the internal electrode 11 and the extraction electrode 1
If 5 is made of a base metal, a method that takes into account the oxidation prevention of the base metal may be used.
【0016】また、後工程で表面に設けるメッキ層17
のメッキ付着性を安定化させるためには、樹脂厚の管理
や硬化条件の変動を十分に抑えなければならない。[0016] Also, a plating layer 17 to be provided on the surface in a later process.
In order to stabilize the plating adhesion of the resin, it is necessary to control the resin thickness and sufficiently suppress fluctuations in the curing conditions.
【0017】更に、緩衝材層16は引出し電極15の全
面を覆って露出しないように形成することによって、メ
ッキ層17による特性の低下発生を防止することができ
る。Further, by forming the buffer material layer 16 so as to cover the entire surface of the extraction electrode 15 so that it is not exposed, deterioration of the characteristics due to the plating layer 17 can be prevented.
【0018】前記したメッキ層17の形成は、湿式、乾
式を問わないが量産性を考えるとバレル等を用いた湿式
が好ましく、図示のように二層構造にすると半田に対す
る耐熱性及び付着性が向上する。The formation of the plating layer 17 described above can be carried out either wet or dry, but from the viewpoint of mass production, a wet method using a barrel or the like is preferable, and a two-layer structure as shown in the figure improves heat resistance and adhesion to solder. improves.
【0019】この発明の外部電極は上記のような構成で
あり、積層LCフィルタの回路基板への実装は外部電極
14のメッキ層17をパターンに半田付けして行なわれ
、この実装状態で回路基板のたわみ試験を行なうと、緩
衝材層16が機械的な緩衝材として働き、たわみ時の変
形ストレスのセラミック積層体13への伝播を緩和し、
該積層体13の破壊を防止する。The external electrode of the present invention has the above-described structure, and the laminated LC filter is mounted on the circuit board by soldering the plating layer 17 of the external electrode 14 to the pattern, and in this mounted state, the circuit board is mounted. When a deflection test is performed, the buffer material layer 16 acts as a mechanical buffer and alleviates the propagation of deformation stress to the ceramic laminate 13 during deflection.
This prevents the laminate 13 from being destroyed.
【0020】また、緩衝材層6は引出し電極15の全面
を覆っているため、メッキ層17の形成時にメッキ液が
セラミック積層体13内に浸入するのを防止することが
でき、メッキ時の内部電極11とセラミック誘電体12
の密着不良などが抑制でき、これにより信頼性や熱衝撃
でのセラミック誘電体13のクラック発生を防ぐことが
できる。Furthermore, since the buffer material layer 6 covers the entire surface of the extraction electrode 15, it is possible to prevent the plating solution from penetrating into the ceramic laminate 13 during the formation of the plating layer 17. Electrode 11 and ceramic dielectric 12
Poor adhesion can be suppressed, thereby improving reliability and preventing cracks in the ceramic dielectric 13 due to thermal shock.
【0021】更に、緩衝材層16はその断熱性により外
部電極14の熱伝導率を低下させるため、半田浸漬時の
内部電極11に対する熱伝播が少なくなり、内部電極1
1とセラミック誘電体12の界面の熱衝撃によるセラミ
ックの破壊を抑えることができる。Furthermore, since the buffer material layer 16 reduces the thermal conductivity of the external electrode 14 due to its heat insulating properties, heat propagation to the internal electrode 11 during solder immersion is reduced, and the internal electrode 1
It is possible to suppress destruction of the ceramic due to thermal shock at the interface between the ceramic dielectric 1 and the ceramic dielectric 12.
【0022】なお、図示実施例では、両側に複数の外部
電極14を設けた積層LCフィルタブロックを示したが
、外部電極14はこのような電子部品だけでなく、例え
ば両側の全面に外部電極を設けた単体やブロックの積層
チップコンデンサ等にも採用することができる。In the illustrated embodiment, a laminated LC filter block is shown in which a plurality of external electrodes 14 are provided on both sides, but the external electrodes 14 can be used not only for such electronic components but also for example, for It can also be used in single unit or block multilayer chip capacitors.
【0023】[0023]
【発明の効果】以上のように、この発明によると、内部
電極と導通する引出し電極の表面に導電ペーストを用い
た緩衝材層を該引出し電極の全面を覆うように形成し、
この緩衝材層の外面にメッキ層を設けたので、外部電極
は中間の緩衝材層が機械的な緩衝層として働き、回路基
板への実装時におけるたわみの変形ストレスのチップ型
電子部品本体への伝播を緩和し、チップ型電子部品本体
の破壊発生を防止することができる。As described above, according to the present invention, a buffer material layer using conductive paste is formed on the surface of the extraction electrode that is electrically connected to the internal electrode so as to cover the entire surface of the extraction electrode,
Since a plating layer is provided on the outer surface of this buffer material layer, the intermediate buffer material layer of the external electrode acts as a mechanical buffer layer, and prevents deformation stress caused by bending from being applied to the chip-type electronic component body during mounting on a circuit board. It is possible to alleviate the propagation and prevent the occurrence of destruction of the chip-type electronic component body.
【0024】また、緩衝材層によって外部電極の熱伝導
率が低下するため、半田付時に引出し電極及び内部電極
への熱伝播が少なくなり、内部電極とセラミック界面の
熱緩衝破壊を抑えることができる。[0024] Furthermore, since the thermal conductivity of the external electrode is reduced by the buffer material layer, heat propagation to the lead electrode and internal electrode during soldering is reduced, and thermal shock damage at the interface between the internal electrode and the ceramic can be suppressed. .
【0025】更に、緩衝材層は引出し電極の全面を覆っ
ているので、メッキ層の形成時に引出し電極内側へのメ
ッキ液の浸入が抑制でき、内部電極とセラミックの密着
不良の発生がなく、熱衝撃によるセラミックへのクラッ
ク発生が防止でき、チップ型電子部品の信頼性を向上さ
せる。Furthermore, since the buffer material layer covers the entire surface of the extraction electrode, it is possible to suppress the plating solution from penetrating into the inside of the extraction electrode when forming the plating layer, and there is no occurrence of poor adhesion between the internal electrode and the ceramic, and heat is prevented. It can prevent cracks in ceramics due to impact and improve the reliability of chip-type electronic components.
【図1】この発明に係る外部電極を示す縦断正面図。FIG. 1 is a longitudinal sectional front view showing an external electrode according to the present invention.
【図2】この発明に係る外部電極の一部切欠側面図。FIG. 2 is a partially cutaway side view of an external electrode according to the present invention.
【図3】チップ型電子部品の実装状態を示す斜視図。FIG. 3 is a perspective view showing a state in which chip-type electronic components are mounted.
【図4】従来の外部電極を示す縦断正面図。FIG. 4 is a longitudinal sectional front view showing a conventional external electrode.
【図5】チップ型電子部品のたわみ試験の状態を示す説
明図。FIG. 5 is an explanatory diagram showing the state of a deflection test of a chip-type electronic component.
【図6】セラミックにクラックが入った状態を示す説明
図。FIG. 6 is an explanatory diagram showing a state where a crack has appeared in ceramic.
11 内部電極 12 セラミック誘電体 13 セラミック積層体 14 外部電極 15 引出し電極 16 緩衝材層 17 メッキ層 18 内側層 19 外側層 11 Internal electrode 12 Ceramic dielectric 13 Ceramic laminate 14 External electrode 15 Extraction electrode 16 Cushioning material layer 17 Plating layer 18 Inner layer 19 Outer layer
Claims (1)
極と導通する引出し電極を設け、この引出し電極の表面
に導電ペーストを用いた緩衝材層を該引出し電極の全面
を覆うように形成し、前記緩衝材層の外面にメッキ層を
設けたことを特徴とするチップ型電子部品。1. An extraction electrode that is electrically connected to the internal electrode is provided on the outside of the chip-type electronic component body, and a buffer layer using conductive paste is formed on the surface of the extraction electrode so as to cover the entire surface of the extraction electrode, A chip-type electronic component characterized in that a plating layer is provided on the outer surface of the buffer material layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3039387A JPH04257211A (en) | 1991-02-08 | 1991-02-08 | Chip type electronic component |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3039387A JPH04257211A (en) | 1991-02-08 | 1991-02-08 | Chip type electronic component |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04257211A true JPH04257211A (en) | 1992-09-11 |
Family
ID=12551597
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3039387A Pending JPH04257211A (en) | 1991-02-08 | 1991-02-08 | Chip type electronic component |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04257211A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5712758A (en) * | 1995-04-18 | 1998-01-27 | Rohm Co., Ltd. | Multilayer ceramic chip capacitor and a process for its manufacture |
JP2000243662A (en) * | 1999-02-19 | 2000-09-08 | Tdk Corp | Electronic device and manufacture thereof |
JPWO2008001542A1 (en) * | 2006-06-28 | 2009-11-26 | 株式会社村田製作所 | Ceramic electronic component and manufacturing method thereof |
US8687345B2 (en) | 2010-06-04 | 2014-04-01 | Murata Manufacturing Co., Ltd. | Chip-type electronic component |
JP2015506103A (en) * | 2011-12-16 | 2015-02-26 | エプコス アーゲーEpcos Ag | Electrical component and method of manufacturing the same |
JP2018085443A (en) * | 2016-11-24 | 2018-05-31 | Tdk株式会社 | Electronic component |
US11081263B2 (en) | 2017-12-25 | 2021-08-03 | Pelnox, Ltd. | Chip-shaped electronic component |
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JPS60170102A (en) * | 1984-02-14 | 1985-09-03 | 日東電工株式会社 | Chip part |
JPS62242324A (en) * | 1986-04-14 | 1987-10-22 | 松下電器産業株式会社 | Chip capacitor |
-
1991
- 1991-02-08 JP JP3039387A patent/JPH04257211A/en active Pending
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60170102A (en) * | 1984-02-14 | 1985-09-03 | 日東電工株式会社 | Chip part |
JPS62242324A (en) * | 1986-04-14 | 1987-10-22 | 松下電器産業株式会社 | Chip capacitor |
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US5712758A (en) * | 1995-04-18 | 1998-01-27 | Rohm Co., Ltd. | Multilayer ceramic chip capacitor and a process for its manufacture |
JP2000243662A (en) * | 1999-02-19 | 2000-09-08 | Tdk Corp | Electronic device and manufacture thereof |
JP4501143B2 (en) * | 1999-02-19 | 2010-07-14 | Tdk株式会社 | Electronic device and manufacturing method thereof |
JPWO2008001542A1 (en) * | 2006-06-28 | 2009-11-26 | 株式会社村田製作所 | Ceramic electronic component and manufacturing method thereof |
JP4998467B2 (en) * | 2006-06-28 | 2012-08-15 | 株式会社村田製作所 | Ceramic electronic component and manufacturing method thereof |
US8687345B2 (en) | 2010-06-04 | 2014-04-01 | Murata Manufacturing Co., Ltd. | Chip-type electronic component |
JP2015506103A (en) * | 2011-12-16 | 2015-02-26 | エプコス アーゲーEpcos Ag | Electrical component and method of manufacturing the same |
US9805846B2 (en) | 2011-12-16 | 2017-10-31 | Epcos Ag | Electrical component and method for producing an electrical component |
JP2018085443A (en) * | 2016-11-24 | 2018-05-31 | Tdk株式会社 | Electronic component |
US11081263B2 (en) | 2017-12-25 | 2021-08-03 | Pelnox, Ltd. | Chip-shaped electronic component |
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