JPH0747915Y2 - 電子部品実装構造体 - Google Patents

電子部品実装構造体

Info

Publication number
JPH0747915Y2
JPH0747915Y2 JP1989152688U JP15268889U JPH0747915Y2 JP H0747915 Y2 JPH0747915 Y2 JP H0747915Y2 JP 1989152688 U JP1989152688 U JP 1989152688U JP 15268889 U JP15268889 U JP 15268889U JP H0747915 Y2 JPH0747915 Y2 JP H0747915Y2
Authority
JP
Japan
Prior art keywords
electronic component
protrusion
chip
substrate
housing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1989152688U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0390494U (en18
Inventor
浩雅 藤井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nidec America Corp
Original Assignee
Nidec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nidec Corp filed Critical Nidec Corp
Priority to JP1989152688U priority Critical patent/JPH0747915Y2/ja
Publication of JPH0390494U publication Critical patent/JPH0390494U/ja
Application granted granted Critical
Publication of JPH0747915Y2 publication Critical patent/JPH0747915Y2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched

Landscapes

  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Mounting Of Printed Circuit Boards And The Like (AREA)
JP1989152688U 1989-12-28 1989-12-28 電子部品実装構造体 Expired - Fee Related JPH0747915Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989152688U JPH0747915Y2 (ja) 1989-12-28 1989-12-28 電子部品実装構造体

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989152688U JPH0747915Y2 (ja) 1989-12-28 1989-12-28 電子部品実装構造体

Publications (2)

Publication Number Publication Date
JPH0390494U JPH0390494U (en18) 1991-09-13
JPH0747915Y2 true JPH0747915Y2 (ja) 1995-11-01

Family

ID=31698940

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989152688U Expired - Fee Related JPH0747915Y2 (ja) 1989-12-28 1989-12-28 電子部品実装構造体

Country Status (1)

Country Link
JP (1) JPH0747915Y2 (en18)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3985453B2 (ja) * 2001-01-12 2007-10-03 松下電工株式会社 電力変換装置

Also Published As

Publication number Publication date
JPH0390494U (en18) 1991-09-13

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees