JPH0730114A - Manufacture of mos transistor - Google Patents

Abstract

PURPOSE:To improve just electric current drive characteristics without changing other characteristics. CONSTITUTION:After growing a gate oxide film 16 on a semiconductor substrate 11, an infrared-ray lamp annealing by infrared-ray 17 irradiation is performed for the gate oxide film 16 in a nitrogen atmosphere. With this, film quality of the gate oxide film 16 is improved and interface condition between the gate oxide film 16 and the semiconductor substrate 11 is improved as well. Further, by the infrared-ray lamp annealing, high temperature annealing is performed in a short time, so the impurities forming a well 15 actually do not re-diffuse.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a MOS transistor having a gate oxide film between a semiconductor substrate and a gate electrode.

[0002]

2. Description of the Related Art The current driving characteristics of a MOS transistor are determined by the film quality of the gate oxide film and the interface state between the gate oxide film and the semiconductor substrate. Therefore, in order to improve this current driving characteristic, conventionally, after a semiconductor substrate is thermally oxidized in a high temperature furnace containing an atmosphere of oxygen or water vapor to form a gate oxide film on the surface thereof, the same atmosphere containing a nitrogen atmosphere is used. By performing high temperature annealing in the furnace at about the same temperature as during thermal oxidation, the film quality of the gate oxide film and the state of the interface with the semiconductor substrate were improved.

[0003]

By the way, the impurity distribution in the channel portion of a MOS transistor, for example, a well, is generally formed by ion implantation or the like before forming a gate oxide film. Therefore, in order not to change the characteristics of the MOS transistor from the desired state, the gate oxidation and the subsequent high temperature annealing must be performed at a temperature and for a time that does not substantially change the impurity distribution in the channel portion.

However, in order to improve the film quality of the gate oxide film and the state of the interface with the semiconductor substrate by the high temperature annealing in the furnace as described above, long time annealing is required. Therefore, in the conventional MOS transistor manufacturing method, only the current driving characteristics could not be improved without changing the characteristics other than the current driving characteristics.

[0005]

A method of manufacturing a MOS transistor according to the present invention has a step of performing a short-time anneal on a gate oxide film 16 in a nitrogen atmosphere.

[0006]

In the method of manufacturing a MOS transistor according to the present invention, the gate oxide film 1 is annealed in a nitrogen atmosphere.
6 is applied to the gate oxide film 16, the positive charges in the gate oxide film 16 are removed to improve the film quality of the gate oxide film 16, and the interface state density is reduced. The interfacial state of can also be improved. Moreover,
Since the annealing is a short time annealing, the high temperature annealing does not substantially change the impurity distribution 15 in the already formed channel portion.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention applied to the manufacture of an nMOS transistor will be described below with reference to FIGS. Also in this embodiment, as shown in FIG. 1A, an element isolation oxide film 12 is formed on the surface of an n-type semiconductor substrate 11 such as a silicon substrate by a conventionally known selective oxidation method. Then, in order to prevent the semiconductor substrate 11 from being contaminated or damaged at the time of ion implantation in the next step, the film thickness is set to 1
A sacrificial oxide film 13 having a thickness of 0 to 20 nm is formed on the surface of the element active region.

Next, as shown in FIG. 1B, the semiconductor substrate 1 is penetrated through the sacrificial oxide film 13 and the element isolation oxide film 12.
1 is ion-implanted with B ⁺ 14 to form a p-type well 15 as an impurity distribution in the channel portion of the nMOS transistor. Then, the sacrificial oxide film 13 is formed with hydrofluoric acid or the like.
Are removed and washed to expose a clean surface of the device active area. And, by the steam atmosphere in the high temperature furnace,
As shown in FIG. 1C, a gate oxide film 16 having a film thickness of 10 to 20 nm is grown on the surface of the element active region.

Next, as shown in FIG. 1D, infrared rays 17
Infrared lamp annealing is performed on the gate oxide film 16 in a nitrogen atmosphere. The annealing conditions are:
For example, a temperature of 1050 ° C. and a time of 60 to 120 seconds are preferable. By this annealing, the gate oxide film 16
The film quality is improved, and the interface state between the gate oxide film 16 and the semiconductor substrate 11 is also improved.

Next, as shown in FIG. 1E, a gate electrode 21 made of polycrystalline silicon or the like is formed by a conventionally known process. Then, by ion implantation of the n-type impurity 22 using the gate electrode 21 and the element isolation oxide film 12 as a mask,
The impurity distribution of the source 23 and the drain 24 is formed in self alignment with the gate electrode 21. With the above, nMOS
The transistor 25 is completed.

2 and 3 show the nMOS manufactured in this embodiment.
Transistor 25 and 850 ° C, 30 in nitrogen atmosphere
Gate voltage dependence of the mutual conductance G _m and the drain current I _ds − in an nMOS transistor manufactured in a conventional example in which only the in-furnace annealing in the furnace is performed on the gate oxide film.
The drain voltage V _ds characteristics are shown respectively. Note that V _g
Is the gate voltage, V _th is the threshold voltage, and _Tox is the thickness of the gate oxide film.

As is apparent from FIGS. 2 and 3, the transconductance G _m has a peak value of about 10% and 3.3 V.
Drive current I _ds at about 4%, nM manufactured in this example
The OS transistor 25 is the nMO manufactured in the conventional example.
Each is improved compared to the S transistor. Therefore, nM
If the OS transistor 25 is used, the processing speed of the MOS integrated circuit can be improved.

Moreover, in the infrared lamp annealing used in this embodiment, the high temperature annealing can be performed in a short time, so that the impurities forming the well 15 are not substantially re-diffused. Therefore, the nMOS transistor 25
Despite improving the current drive characteristics of the other characteristics, other characteristics do not change.
It is not necessary to widen the separation band between the OS region and the pMOS region.

Although infrared lamp annealing is used as the short-time annealing in the above embodiments, short-time annealing other than infrared lamp annealing can also be used. Further, although the above-mentioned embodiment applies the present invention to the manufacture of the nMOS transistor, the present invention can also be applied to the manufacture of the pMOS transistor.

[0015]

According to the method of manufacturing a MOS type transistor of the present invention, the quality of the gate oxide film is improved without substantially changing the impurity distribution in the already formed channel portion, and the gate oxide film and the semiconductor are improved. Since the interface state with the substrate can also be improved, only the current driving characteristics can be improved without changing the characteristics other than the current driving characteristics.

[Brief description of drawings]

FIG. 1 is a side sectional view showing an embodiment of the present invention in the order of steps.

FIG. 2 is a graph showing the gate voltage dependence of mutual conductance in an nMOS transistor manufactured in one example and an nMOS transistor manufactured in one conventional example.

FIG. 3 is a graph showing drain current-drain voltage characteristics of an nMOS transistor manufactured in one example and an nMOS transistor manufactured in one conventional example.

[Explanation of symbols]

 11 semiconductor substrate 15 well 16 gate oxide film 17 infrared 25 nMOS transistor

Continuation of front page (51) Int.Cl. ⁶ Identification number Office reference number FI technical display location H01L 21/316 P 7352-4M

Claims (1)

[Claims] 1. A method of manufacturing a MOS transistor, comprising a step of subjecting a gate oxide film to a short-time annealing in a nitrogen atmosphere.