JPH06333982A - 半導体集積回路装置の製造方法 - Google Patents

半導体集積回路装置の製造方法

Info

Publication number
JPH06333982A
JPH06333982A JP5116266A JP11626693A JPH06333982A JP H06333982 A JPH06333982 A JP H06333982A JP 5116266 A JP5116266 A JP 5116266A JP 11626693 A JP11626693 A JP 11626693A JP H06333982 A JPH06333982 A JP H06333982A
Authority
JP
Japan
Prior art keywords
metal
ball
semiconductor chip
wiring board
land
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP5116266A
Other languages
English (en)
Japanese (ja)
Inventor
Motohiro Suwa
元大 諏訪
Hiroyuki Takahashi
裕之 高橋
Masahiko Nishiuma
雅彦 西馬
Chiyoshi Kamata
千代士 鎌田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Hitachi Solutions Technology Ltd
Original Assignee
Hitachi ULSI Engineering Corp
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi ULSI Engineering Corp, Hitachi Ltd filed Critical Hitachi ULSI Engineering Corp
Priority to JP5116266A priority Critical patent/JPH06333982A/ja
Priority to TW083102844A priority patent/TW259894B/zh
Priority to KR1019940009859A priority patent/KR100379823B1/ko
Publication of JPH06333982A publication Critical patent/JPH06333982A/ja
Priority to US08/367,490 priority patent/US5616520A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/40Fillings or auxiliary members in containers, e.g. centering rings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/012Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01221Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition
    • H10W72/01225Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition in solid form, e.g. by using a powder or by stud bumping
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07251Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221Structures or relative sizes
    • H10W72/222Multilayered bumps, e.g. a coating on top and side surfaces of a bump core

Landscapes

  • Wire Bonding (AREA)
JP5116266A 1992-03-30 1993-05-19 半導体集積回路装置の製造方法 Withdrawn JPH06333982A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP5116266A JPH06333982A (ja) 1993-05-19 1993-05-19 半導体集積回路装置の製造方法
TW083102844A TW259894B (enExample) 1993-05-19 1994-03-31
KR1019940009859A KR100379823B1 (ko) 1993-05-19 1994-05-06 반도체집적회로장치의제조방법
US08/367,490 US5616520A (en) 1992-03-30 1994-12-30 Semiconductor integrated circuit device and fabrication method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5116266A JPH06333982A (ja) 1993-05-19 1993-05-19 半導体集積回路装置の製造方法

Publications (1)

Publication Number Publication Date
JPH06333982A true JPH06333982A (ja) 1994-12-02

Family

ID=14682838

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5116266A Withdrawn JPH06333982A (ja) 1992-03-30 1993-05-19 半導体集積回路装置の製造方法

Country Status (3)

Country Link
JP (1) JPH06333982A (enExample)
KR (1) KR100379823B1 (enExample)
TW (1) TW259894B (enExample)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998058409A1 (fr) * 1997-06-16 1998-12-23 Kabushiki Kaisha Tokai-Rika-Denki-Seisakusho Procede de montage de puce de semi-conducteur, procede de fabrication d'une structure de puce sur puce et procede de fabrication d'une structure de puce sur carte
WO2001026147A1 (en) * 1999-10-04 2001-04-12 Seiko Epson Corporation Semiconductor device, method of manufacture thereof, circuit board, and electronic device
JP2002270630A (ja) * 2001-03-13 2002-09-20 Ngk Spark Plug Co Ltd 平坦化装置及びヘッド
JP2008219052A (ja) * 2008-06-13 2008-09-18 Fujitsu Ltd 半導体装置の製造方法
JP2010517312A (ja) * 2007-01-31 2010-05-20 エセック エージー フリップチップを基質上に実装する装置
JP2013030789A (ja) * 2012-09-10 2013-02-07 Seiko Epson Corp 実装構造体及び実装構造体の製造方法
JP2013183059A (ja) * 2012-03-02 2013-09-12 New Japan Radio Co Ltd 半導体装置の製造方法
JP2016034130A (ja) * 2014-07-30 2016-03-10 太陽誘電株式会社 弾性波デバイス及びその製造方法

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998058409A1 (fr) * 1997-06-16 1998-12-23 Kabushiki Kaisha Tokai-Rika-Denki-Seisakusho Procede de montage de puce de semi-conducteur, procede de fabrication d'une structure de puce sur puce et procede de fabrication d'une structure de puce sur carte
WO2001026147A1 (en) * 1999-10-04 2001-04-12 Seiko Epson Corporation Semiconductor device, method of manufacture thereof, circuit board, and electronic device
US6744122B1 (en) 1999-10-04 2004-06-01 Seiko Epson Corporation Semiconductor device, method of manufacture thereof, circuit board, and electronic device
JP2002270630A (ja) * 2001-03-13 2002-09-20 Ngk Spark Plug Co Ltd 平坦化装置及びヘッド
JP2010517312A (ja) * 2007-01-31 2010-05-20 エセック エージー フリップチップを基質上に実装する装置
JP2008219052A (ja) * 2008-06-13 2008-09-18 Fujitsu Ltd 半導体装置の製造方法
JP2013183059A (ja) * 2012-03-02 2013-09-12 New Japan Radio Co Ltd 半導体装置の製造方法
JP2013030789A (ja) * 2012-09-10 2013-02-07 Seiko Epson Corp 実装構造体及び実装構造体の製造方法
JP2016034130A (ja) * 2014-07-30 2016-03-10 太陽誘電株式会社 弾性波デバイス及びその製造方法

Also Published As

Publication number Publication date
KR100379823B1 (ko) 2003-06-02
TW259894B (enExample) 1995-10-11
KR940027134A (ko) 1994-12-10

Similar Documents

Publication Publication Date Title
US5616520A (en) Semiconductor integrated circuit device and fabrication method thereof
CN101312162B (zh) 一种制造半导体器件的方法
JP3297254B2 (ja) 半導体パッケージおよびその製造方法
US6214642B1 (en) Area array stud bump flip chip device and assembly process
JP2002353398A (ja) 半導体装置
JP2002026072A (ja) 半導体装置の製造方法
JP2001313314A (ja) バンプを用いた半導体装置、その製造方法、および、バンプの形成方法
US7598121B2 (en) Method of manufacturing a semiconductor device
JP3180800B2 (ja) 半導体装置及びその製造方法
JPH10173003A (ja) 半導体装置とその製造方法およびフィルムキャリアテープとその製造方法
JP2001338932A (ja) 半導体装置及び半導体装置の製造方法
JPH10335527A (ja) 半導体装置、半導体装置の実装方法、および半導体装置の製造方法
KR100379823B1 (ko) 반도체집적회로장치의제조방법
JPH0555635A (ja) 電子部品のフリツプチツプ接続構造
JPH08293530A (ja) 半導体装置の製造方法
JPH0437148A (ja) Lsiモジュールの製造方法
EP0714553B1 (en) Method of forming electrically conductive polymer interconnects on electrical substrates
US7019405B2 (en) Terminal, semiconductor device, terminal forming method and flip chip semiconductor device manufacturing method
JP2003007765A (ja) Tabテープ及びボンディング方法
JP2000294586A (ja) 半導体装置及び半導体装置の製造方法
JP2002076048A (ja) フリップチップ接続によるバンプの配置方法
JP2002299374A (ja) 半導体装置及びその製造方法
US6407457B1 (en) Contact-bumpless chip contacting method and an electronic circuit produced by said method
JP2000332060A (ja) 半導体装置およびその製造方法
TW445555B (en) Method for packaging semiconductor flip chip and its structure

Legal Events

Date Code Title Description
A300 Application deemed to be withdrawn because no request for examination was validly filed

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20000801