JPH0613393A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To realize high speeding of a bipolar transistor by forming an external region coming to have concentration allowing sufficient ohmic contact while forming a shallow base.emitter region of an internal base region. CONSTITUTION:A film thickness A of polysilicon 3 on an internal base region is made higher than the sum B of a film thickness from the silicon substrate surface of a separated oxide film 2 and a film thickness of remained polysilicon 3. Next, by performing P<+> ion implantation and annealing, an external base region 9 reaches concentration allowing sufficient ohmic contact. On the other hand, the internal base region 8 is formed while adjusting an implantation condition and an annealing condition in order to form the internal base region 8 of a shallow base diffusion layer as occasion demands by diffusion from polysilicon. Thereby, semiconductor device to be obtained can perform high speeding.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a bipolar transistor.

[0002]

2. Description of the Related Art FIG. 3 is a schematic sectional view showing a procedure of a conventional manufacturing method. First, the isolation oxide film 12 is formed on the silicon substrate 10 in a self-aligning manner to expose the silicon on the active region, and the polysilicon 13 is deposited on the exposed silicon substrate 10 and isolation oxide film 12. Then P ⁺
Ions are implanted on the entire surface [FIG. 3 (a)]. Next, after depositing the NSG 14 on the polysilicon 13, the NSG 14 and the polysilicon 13 on the inner base region 15 are removed by a photolithography process. Thereafter, heat treatment is performed to form the outer base region 16 which is a P ⁺ diffusion layer [FIG. 3 (b)].

Then, P ⁻ ions are implanted into the entire surface to form the inner base region 15 (FIG. 3).
(C)]. Next, the sidewall 17 is formed on the inner base region 15 by a known method [FIG. 3 (d)].

[0004] and, deposited on the entire surface of polysilicon, ⁷⁵
After implanting N ⁺ ions such as As ^+, an emitter polysilicon 18 for forming an emitter region 19 is formed by a photo etching process. After that, the emitter region 19 is formed by thermal diffusion [FIG. 3 (e)].

As described above, conventionally, when a bipolar transistor is manufactured by base-emitter self-alignment, the outer base region is formed by thermal diffusion from silicon, and the inner base region is not formed. This is done by directly implanting N ⁺ ions into polysilicon.

[0006]

By the way, in the above-mentioned conventional method, ion implantation is required in each step to form the inner base region and the outer base region. Has a problem that since the ions are directly implanted into silicon, the depth of diffusion becomes deeper and the speed cannot be increased.

The present invention has been made to solve the above problems, and has a structure of emitter-base self-alignment and a bipolar transistor by forming the inner base region and the emitter region shallow. It is an object of the present invention to provide a method for manufacturing a semiconductor device that realizes higher speed.

[0008]

In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention comprises an inner base region and an outer base surrounding the inner active region in a predetermined active region of a substrate surface layer. In a method of manufacturing a semiconductor device having a structure in which a source region is formed, an isolation oxide film is formed on a substrate in a self-aligned manner, silicon on the active region is exposed, and then polysilicon is deposited on the entire surface of the substrate. After that, the surface of the polysilicon is oxidized, and then the polysilicon except for the area where the internal base area is to be formed is removed from the surface of the substrate to the total of the isolation oxide film and the polysilicon on the isolation oxide film. After removing so that the thickness is smaller than the total thickness of the polysilicon on the region where the internal base region is to be formed and the oxide film on the surface of the polysilicon, ion implantation and annealing are sequentially performed. To form an outer base region and an inner base region with a predetermined concentration and depth, and then deposit an insulating film for planarization on the entire surface. After etching back until the upper polysilicon is exposed, a groove is formed by removing the polysilicon on the internal base region, and then a sidewall is formed on the side wall in the groove, Characterized by forming an emitter region within the inner base region.

[0009]

[Function] An inner base and an outer base having a self-aligned structure are formed by performing ion implantation in a state where polysilicon is selectively left thick on the region where the inner base region is to be formed. To be done. Also, the inner base is formed by shallow diffusion from polysilicon.

[0010]

1 and 2 are views showing the procedure of an embodiment of the present invention. Embodiments of the present invention will be described below with reference to the drawings.

First, an isolation oxide film is formed on the silicon substrate 1 in a self-aligned manner by a known technique to expose silicon on the active region. Here, oxide film separation is taken as an example, but other methods such as trench separation may be used. Then, polysilicon 3 is deposited on the exposed silicon substrate 1 and isolation oxide film 2. Then, the surface of the polysilicon 3 is oxidized to form an oxide film 4. The film thickness of the oxide film 4 is appropriately determined depending on the P ⁺ ion implantation condition in the subsequent step [FIG. 1 (a)].

Next, by a photolithography process, the oxide film 4 and the polysilicon 3 excluding the inner base region 8 are removed by etching so that the polysilicon 3 remains with a predetermined thickness. At this time, the film thickness A of the polysilicon 3 on the internal base region is higher than the sum B of the film thickness of the isolation oxide film 2 from the silicon substrate surface and the film thickness of the remaining polysilicon 3. In this way, the film thickness of the isolation oxide film 2, the film thickness of the polysilicon 3, the remaining film thickness after etching, etc. are adjusted [Fig.
(B)].

Then, P ⁺ ions such as ¹¹ B ⁺ are implanted,
Anneal. In this process, the difference in the film thickness of the polysilicon between the outer base region 9 and the inner base region 8, that is, the film thickness of the polysilicon 3 on the outer base region 9 is the same as that on the inner base region 8. Since the thickness is smaller than the film thickness of the polysilicon 3, the outer base region 9 has a concentration capable of making a sufficient ohmic contact. on the other hand,
The inner base region 8 is diffused from the polysilicon 3,
The implantation conditions and the annealing conditions are adjusted so that the inner base region 8 of the shallow base diffusion layer is formed as needed. The concentration and depth of the internal base region 8 can also be controlled by adjusting the film thickness of the oxide film 4 on the surface of the polysilicon 3 [FIG. 1 (c)].

Next, an insulating film 5 such as SOG which is excellent in flattening is deposited on the entire surface, and then etched back until the polysilicon 3 on the internal base region 8 is exposed [FIG.
(A)].

After that, the polysilicon 3 on the inner base region 8 is removed by etching under the condition that the selection ratio with respect to the insulating film 5 is sufficient [FIG. 2 (b)]. Next, after depositing an insulating film such as HTO, the sidewalls 6 are formed by etching back. After that, polysilicon is deposited on the entire surface and ⁷⁵ A
After implanting N ⁺ ions such as s ^+, the emitter polysilicon 7 for forming the emitter region 81 is deposited by a photo etching process. After that, an emitter region 81 is formed by thermal diffusion from the emitter polysilicon 7 [FIG. 2 (c)].

[0016]

As described above, according to the method of manufacturing a semiconductor device of the present invention, polysilicon is selectively left thick on the region where the internal base region is to be formed,
By performing ion implantation once, an external base region having a concentration capable of obtaining a sufficient ohmic contact is formed,
On the other hand, since the inner base region is configured to form a shallow base-emitter region by thermal diffusion from polysilicon, the obtained semiconductor device can be speeded up and a device having excellent characteristics can be realized. Moreover, since the self-aligned structure can be formed by performing the ion implantation process once, the process can be simplified and the cost can be reduced.

[Brief description of drawings]

FIG. 1 is a schematic sectional view illustrating a process of an example of the present invention.

FIG. 2 is a schematic cross-sectional view illustrating a process of an example of the present invention.

FIG. 3 is a schematic cross-sectional view illustrating a process of a conventional example.

[Explanation of symbols]

 1 ... Substrate 2 ... Separation oxide film 3, 7 ... Polysilicon 4 ... Oxide film 5 ... Insulating film 6 ... Sidewall 8 ... Internal Base region 81 ... Emitter region 9 ... External base region

Claims (1)

[Claims] 1. A method of manufacturing a semiconductor device having a structure in which an inner base region and an outer base region around the inner base region are formed in a predetermined active region of a surface layer of a substrate. An isolation oxide film should be formed on the substrate to expose the silicon on the active region, and then polysilicon should be deposited on the entire surface of the substrate, the polysilicon surface should be oxidized, and then the internal base region should be formed. The total thickness of the isolation oxide film and the polysilicon on the isolation oxide film from the surface of the substrate excluding the polysilicon on the region is the polysilicon on the region where the internal base region is to be formed and the polysilicon surface thereof. After the oxide film is removed to a thickness less than the total thickness of the oxide film, ion implantation and annealing are performed in order to form an outer base region and an inner base region with a predetermined concentration and depth. Then, an insulating film for flattening is deposited on the entire surface, and the insulating film is etched back until the polysilicon on the internal base region is exposed.
A trench is formed by removing polysilicon on the inner base region, and then a sidewall is formed on a sidewall in the trench, and then an emitter region is formed in the inner base region. A method for manufacturing a characteristic semiconductor device.