JPH0611531Y2 - Circuit board device - Google Patents

Circuit board device

Info

Publication number
JPH0611531Y2
JPH0611531Y2 JP1988101559U JP10155988U JPH0611531Y2 JP H0611531 Y2 JPH0611531 Y2 JP H0611531Y2 JP 1988101559 U JP1988101559 U JP 1988101559U JP 10155988 U JP10155988 U JP 10155988U JP H0611531 Y2 JPH0611531 Y2 JP H0611531Y2
Authority
JP
Japan
Prior art keywords
component mounting
solder
land
circuit board
board device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1988101559U
Other languages
Japanese (ja)
Other versions
JPH0224570U (en
Inventor
秀雄 栗原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP1988101559U priority Critical patent/JPH0611531Y2/en
Publication of JPH0224570U publication Critical patent/JPH0224570U/ja
Application granted granted Critical
Publication of JPH0611531Y2 publication Critical patent/JPH0611531Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

【考案の詳細な説明】 〔産業上の利用分野〕 本考案は、混成集積回路等のための回路基板装置に関す
る。
The present invention relates to a circuit board device for a hybrid integrated circuit or the like.

〔従来の技術〕[Conventional technology]

混成集積回路を製造する際に、使用する電子部品(例え
ばIC)を、実質的に同一な電気的特性を有しているに
も拘らず寸法が幾らか相違するものに変えなければなら
ないことがしばしば生じる。この場合、電子部品に合せ
て、回路基板の部品取付用ランドのパターンを変えれば
必然的に混成集積回路がコスト高になる。
BACKGROUND OF THE INVENTION In manufacturing hybrid integrated circuits, the electronic components used (e.g., ICs) must be altered to have somewhat different dimensions despite having substantially the same electrical characteristics. Often occurs. In this case, if the pattern of the component mounting lands of the circuit board is changed according to the electronic component, the cost of the hybrid integrated circuit will inevitably increase.

この問題を解決するために、複数種の電子部品に適合す
るように部品取付用ランドを大きめに予め設けておくこ
とが考えられる。しかし、部品取付用ランドを大面積に
形成すると、ここに塗布されるクリーム半田(ペースト
状半田)の量も多くなり、リフロー半田付け時に部品取
付用ランドから半田が流出して端子間短絡を起したり、
電子部品のリード端子の位置ずれを生じさせることがあ
る。
In order to solve this problem, it is conceivable that a component mounting land is provided in advance in a larger size so as to be compatible with a plurality of types of electronic components. However, if the component mounting land is formed in a large area, the amount of cream solder (paste solder) applied here will also increase, and during reflow soldering, the solder will flow out of the component mounting land, causing a short circuit between the terminals. Or
The lead terminals of electronic components may be displaced.

この種の問題を解決するために、部品取付用ランドを半
田レジストで分割し、複数種の電子部品(IC)に対応
させることが例えば実開昭62ー196376号公報に
開示されている。
In order to solve this kind of problem, it is disclosed, for example, in Japanese Utility Model Laid-Open No. 62-196376 that the component mounting lands are divided by a solder resist so as to correspond to a plurality of types of electronic components (IC).

〔考案が解決しようとする課題〕[Problems to be solved by the device]

しかし、半田レジストによって部品取付用ランドを分割
する場合には、この分割領域の高さがさほど高くなら
ず、半田の流れを十分に阻止することができなかった。
However, when the component mounting land is divided by the solder resist, the height of the divided region is not so high, and the flow of solder cannot be sufficiently blocked.

そこで、本考案の目的は、半田流動の阻止を良好且つ容
易に達成することができる回路基板装置を提供すること
にある。
Therefore, an object of the present invention is to provide a circuit board device that can satisfactorily and easily achieve prevention of solder flow.

〔課題を解決するための手段〕[Means for Solving the Problems]

上記目的を達成するための本考案は、リード端子間ピッ
チがほぼ同一又は整数倍であるが、幅が異なる複数種の
電子部品を半田によって取付けることができるように部
品取付用ランドが設けられている回路基板装置におい
て、前記部品取付用ランドが複数個に分割されるように
厚膜抵抗体層とオーバーコートガラス層とから成る半田
流動阻止用ダムが前記部品取付用ランド上に設けられて
いることを特徴とする回路基板装置に係わるものであ
る。
In order to achieve the above object, the present invention provides a component mounting land so that a plurality of types of electronic components having lead terminals having substantially the same pitch or an integral multiple, but different widths can be mounted by soldering. In the circuit board device, a solder flow prevention dam including a thick film resistor layer and an overcoat glass layer is provided on the component mounting land so that the component mounting land is divided into a plurality of parts. The present invention relates to a circuit board device characterized by the above.

〔考案の作用及び効果〕[Operation and effect of device]

本考案は次の作用効果を有する。 The present invention has the following effects.

(イ)半田流動阻止用ダムを厚膜抵抗体層とオーバーコ
ートガラス層とで形成するので半田流動阻止用ダムの高
さを十分に高くすることができ、半田の流れを確実に阻
止できる。
(A) Since the solder flow blocking dam is formed of the thick film resistor layer and the overcoat glass layer, the height of the solder flow blocking dam can be made sufficiently high and the solder flow can be reliably blocked.

(ロ)半田流動阻止用ダムは回路基板装置の製作時に使
用される厚膜抵抗とオーバーコートガラスで形成されて
いるので、コストの上昇を抑えることができる。
(B) Since the solder flow prevention dam is formed of the thick film resistor and the overcoat glass used when manufacturing the circuit board device, it is possible to suppress an increase in cost.

〔実施例〕〔Example〕

次に、第1図〜第3図を参照して本考案の実施例に係わ
る混成集積回路を説明する。
Next, a hybrid integrated circuit according to an embodiment of the present invention will be described with reference to FIGS.

まず、第1図(A)に示すように、アルミナ磁器基板か
ら成る回路基板1上に配線導体2、一方の側の部品取付
用ランド3及び他方の側の部品取付用ランド4を設け
る。一方の側の部品取付用ランド3と他方の側の部品取
付用ランド4とはIC等の電子部品のリード端子に対応
するように配置されている。一方の側の部品取付用ラン
ド3は複数種の電子部品で共通に使用するように形成さ
れている。他方の側の部品取付用ランド4は、複数種の
電子部品に対応することができるように長めに形成され
ている。
First, as shown in FIG. 1A, a wiring conductor 2, a component mounting land 3 on one side and a component mounting land 4 on the other side are provided on a circuit board 1 made of an alumina porcelain substrate. The component mounting land 3 on one side and the component mounting land 4 on the other side are arranged so as to correspond to the lead terminals of an electronic component such as an IC. The component mounting land 3 on one side is formed so as to be commonly used by a plurality of types of electronic components. The component mounting land 4 on the other side is formed to be long so as to be compatible with a plurality of types of electronic components.

次に、第1図(B)に斜線を付して示すように、抵抗ペ
ーストを印刷し、焼成することによって厚膜抵抗体層5
とこれと同一の半田非付着性の厚膜抵抗体層から成る半
田流動阻止用ダム6を形成する。半田流動阻止用ダム6
は、他方の側の部品取付用ランド4を長手方向において
2つに分割するように配設する。これにより、第1のラ
ンド部4aと第2のランド部4bが生じる。
Next, as shown by hatching in FIG. 1 (B), the thick film resistor layer 5 is printed by printing the resistance paste and firing it.
Then, the solder flow preventing dam 6 composed of the same thick film resistor layer with non-adhesive solder is formed. Dam 6 for solder flow prevention
Is arranged so that the component mounting land 4 on the other side is divided into two in the longitudinal direction. As a result, the first land portion 4a and the second land portion 4b are generated.

次に、第1図(C)及び第2図に示すように、一方の側
の部品取付用ランド3及び他方の側の第1および第2の
ランド部4a、4b、リードランド(図示せず)等を除
いた領域にオーバーコートガラス層7を形成する。な
お、この際、第1図(B)に示す厚膜抵抗体から成る半
田流動阻止用ダム6の上にも第1図(C)で斜線を付し
て示すようにオーバーコートガラス層7を形成する。こ
れにより、二層構造の半田流動阻止用ダム6aが生じ、
半田の流れを確実に阻止することが可能になる。以上の
工程で製作された回路基板装置は、第2図に示す幅の狭
い第1の電子部品8aと第3図に示す幅の広い第2の電
子部品8bとの両方に適合する。
Next, as shown in FIG. 1 (C) and FIG. 2, the component mounting land 3 on one side, the first and second land portions 4a and 4b on the other side, and the lead land (not shown). The overcoat glass layer 7 is formed in a region excluding the above). At this time, the overcoat glass layer 7 is also provided on the solder flow preventing dam 6 made of the thick film resistor shown in FIG. 1B as shown by hatching in FIG. 1C. Form. As a result, a solder flow preventing dam 6a having a two-layer structure is generated,
It becomes possible to reliably prevent the flow of solder. The circuit board device manufactured by the above process is suitable for both the narrow first electronic component 8a shown in FIG. 2 and the wide second electronic component 8b shown in FIG.

第1図(C)及び第2図はSOP型パッケージICから
成る幅の狭い第1の電子部品8aを搭載した状態を示
す。この第1の電子部品8aは平板状本体部9から左右
対称に導出された複数本のリード端子10、11を有す
る。一方の側のリード端子10は、一方の側の部品取付
用ランド3に半田12で固着され、他方の側のリード端
子11は第1のランド部4aに半田12で固着されてい
る。一方及び他方の側のリード端子10、11の半田付
けは、クリーム半田(ペースト状半田)をランド3及び
4aに印刷し、このクリーム半田のリフローによって行
う。リード端子11のための第1のランド部4aは、ラ
ンド4を半田流動阻止用ダム6aによって分割した部分
であるので、この第1のランド部4aの半田の量は比較
的少ない。従って、リード端子11の相互間の短絡や、
半田12のかたよりによるリード端子11の位置ずれを
防ぐことができる。
FIGS. 1 (C) and 2 show a state in which a narrow first electronic component 8a composed of an SOP type package IC is mounted. The first electronic component 8 a has a plurality of lead terminals 10 and 11 which are symmetrically led out from the flat plate-shaped main body 9. The lead terminal 10 on one side is fixed to the component mounting land 3 on one side with solder 12, and the lead terminal 11 on the other side is fixed to the first land portion 4a with solder 12. The soldering of the lead terminals 10 and 11 on one side and the other side is performed by printing cream solder (paste solder) on the lands 3 and 4a and then reflowing the cream solder. Since the first land portion 4a for the lead terminal 11 is a portion obtained by dividing the land 4 by the solder flow preventing dam 6a, the amount of solder in the first land portion 4a is relatively small. Therefore, short circuit between the lead terminals 11 and
It is possible to prevent the displacement of the lead terminal 11 due to the bias of the solder 12.

幅広の第2の電子部品8bを搭載する場合には、一方の
リード端子10を第3図に示すように共通のランド3に
半田12で固着し、他方のリード端子11を第2のラン
ド部4bに半田12で固着する。第2の電子部品8bの
リード端子10、11の相互間隔(ピッチ)は第1の電
子部品8aとほぼ同一又は整数倍であるが、幅は第1の
電子部品8aよりも大きい。
When mounting the wide second electronic component 8b, one lead terminal 10 is fixed to the common land 3 with the solder 12 and the other lead terminal 11 is attached to the second land portion as shown in FIG. It is fixed to 4b with solder 12. The mutual spacing (pitch) between the lead terminals 10 and 11 of the second electronic component 8b is almost the same as or an integral multiple of that of the first electronic component 8a, but the width is larger than that of the first electronic component 8a.

この第2の電子部品8bをリフロー半田付けする際にも
半田に基づくリード端子11の相互間の短絡やリード端
子11の位置ずれが半田流動阻止用ダム6aの働きで防
止される。
Even when the second electronic component 8b is reflow-soldered, the solder flow preventing dam 6a prevents a short circuit between the lead terminals 11 and a displacement of the lead terminals 11 due to the solder.

〔変形例〕[Modification]

本考案は上述の実施例に限定されるものでなく、例えば
次の変形が可能なものである。
The present invention is not limited to the above-mentioned embodiments, and the following modifications are possible, for example.

(1)一方の側の部品取付用ランド3もリード端子10
の延びる方向に長手に形成し、ここにも厚膜抵抗体層か
ら成る半田流動阻止用ダムを設けてもよい。
(1) The component mounting land 3 on one side is also the lead terminal 10
It may be formed to be long in the extending direction, and a solder flow preventing dam made of a thick film resistor layer may be provided here as well.

(2)回路基板1をアルミナ基板以外の種々の基板に置
き換えることができる。
(2) The circuit board 1 can be replaced with various substrates other than the alumina substrate.

【図面の簡単な説明】[Brief description of drawings]

第1図(A)(B)(C)は本考案の実施例に係わる混
成集積回路の一部を製造工程順に示す平面図、 第2図は第1図(C)のII−II線に相当する部分の断面
図、 第3図は幅広の電子部品を装着した状態を第2図に対応
する部分で示す断面図である。 1……回路基板、3……一方の側の部品取付用ランド、
4……他方の側の部品取付用ランド、4a……第1のラ
ンド部、4b……第2のランド部、5……厚膜抵抗体
層、6……半田流動阻止用ダム、7……オーバーコート
ガラス層、8a……第1の電子部品、8b……第2の電
子部品、10,11……リード端子、12……半田。
1 (A), (B) and (C) are plan views showing a part of a hybrid integrated circuit according to an embodiment of the present invention in the order of manufacturing steps, and FIG. 2 is a line II-II in FIG. 1 (C). FIG. 3 is a cross-sectional view of a corresponding portion, and FIG. 3 is a cross-sectional view showing a state in which a wide electronic component is mounted in a portion corresponding to FIG. 1 ... Circuit board, 3 ... Land for component mounting on one side,
4 ... Land for mounting components on the other side, 4a ... First land portion, 4b ... Second land portion, 5 ... Thick film resistor layer, 6 ... Solder flow prevention dam, 7 ... ... overcoat glass layer, 8a ... first electronic component, 8b ... second electronic component, 10,11 ... lead terminal, 12 ... solder.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】リード端子間ピッチがほぼ同一又は整数倍
であるが、幅が異なる複数種の電子部品を半田によって
取付けることができるように部品取付用ランドが設けら
れている回路基板装置において、 前記部品取付用ランドが複数個に分割されるように厚膜
抵抗体層とオーバーコートガラス層とから成る半田流動
阻止用ダムが前記部品取付用ランド上に設けられている
ことを特徴とする回路基板装置。
1. A circuit board device in which component mounting lands are provided so that a plurality of types of electronic components having substantially the same pitch or an integral multiple of lead terminals but different widths can be mounted by soldering, A circuit characterized in that a solder flow preventing dam composed of a thick film resistor layer and an overcoat glass layer is provided on the component mounting land so that the component mounting land is divided into a plurality of parts. Substrate device.
JP1988101559U 1988-07-30 1988-07-30 Circuit board device Expired - Lifetime JPH0611531Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988101559U JPH0611531Y2 (en) 1988-07-30 1988-07-30 Circuit board device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988101559U JPH0611531Y2 (en) 1988-07-30 1988-07-30 Circuit board device

Publications (2)

Publication Number Publication Date
JPH0224570U JPH0224570U (en) 1990-02-19
JPH0611531Y2 true JPH0611531Y2 (en) 1994-03-23

Family

ID=31330667

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988101559U Expired - Lifetime JPH0611531Y2 (en) 1988-07-30 1988-07-30 Circuit board device

Country Status (1)

Country Link
JP (1) JPH0611531Y2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2011040480A1 (en) * 2009-09-30 2013-02-28 株式会社村田製作所 Circuit board

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4978164A (en) * 1972-12-04 1974-07-27
JPS62196376U (en) * 1986-06-04 1987-12-14

Also Published As

Publication number Publication date
JPH0224570U (en) 1990-02-19

Similar Documents

Publication Publication Date Title
JPH08172143A (en) Printed wiring board and electronic device using it
JP2702839B2 (en) Wiring board electrode structure
JPH0611531Y2 (en) Circuit board device
JPH0563346A (en) Device mounted with chip type electronic parts
JP2528436B2 (en) Manufacturing method of circuit board device
JPH10335795A (en) Printed board
JPH0219635B2 (en)
JP2527326Y2 (en) Circuit board device
JPH02113596A (en) Printed circuit board
JPH0744043Y2 (en) Printed wiring board
JP2563859B2 (en) Surface mount hybrid IC terminal structure
JP2725646B2 (en) Semiconductor component and its mounting method
JPS63283051A (en) Substrate for hybrid integrated circuit device
JPH03132092A (en) Printed wiring board
JPS5853890A (en) Method of soldering electronic part
JPH04264795A (en) Chip part mounting pad
JPH05327196A (en) Printed board for mounting electronic component using narrow pitch electrodes
JPH0737337Y2 (en) Circuit parts
JPH04243187A (en) Printed circuit board
JP2914980B2 (en) Surface mounting structure of multi-terminal electronic components
JPH06204652A (en) Printed circuit board
JPH04223361A (en) Electronic component mounting board
JPH01251788A (en) Printed board
JPH05129767A (en) Printed wiring board
JPH06314885A (en) Multilayer printed wiring board module