JPH05327196A - Printed board for mounting electronic component using narrow pitch electrodes - Google Patents
Printed board for mounting electronic component using narrow pitch electrodesInfo
- Publication number
- JPH05327196A JPH05327196A JP15575792A JP15575792A JPH05327196A JP H05327196 A JPH05327196 A JP H05327196A JP 15575792 A JP15575792 A JP 15575792A JP 15575792 A JP15575792 A JP 15575792A JP H05327196 A JPH05327196 A JP H05327196A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- printed circuit
- narrow pitch
- solder
- recess
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0284—Details of three-dimensional rigid printed circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、狭ピッチ電極の電子部
品を表面実装するためのプリント基板の改良に係るもの
である。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a printed circuit board for surface mounting an electronic component having a narrow pitch electrode.
【0002】[0002]
【従来の技術】プリント基板上に、電極接続用導体部
(パッド)を介してIC、LSI、VLSIその他の電
子部品を半田ペースト(Sn−Pb系ペーストに限ら
ず、Agペースト、その他の導電性のある半田付け用ペ
ーストを含む)を用いて接合して実装する場合に、半田
ペーストの量が多いと部品搭載時に余剰の半田がはみ出
し、例えば図4で示す如くその余剰半田5により各導体
部3間にブリッジが形成されることがある。2. Description of the Related Art Electronic components such as ICs, LSIs, VLSIs and the like are solder pastes (not only Sn-Pb type pastes but also Ag pastes and other conductive materials) on a printed circuit board through conductors (pads) for electrode connection. If a large amount of solder paste is used, the excess solder will squeeze out when the components are mounted. For example, as shown in FIG. A bridge may be formed between the three.
【0003】このブリッジはショートの原因となりその
製品を不良品とするので、余剰半田5によるブリッジの
形成を防止する必要があり、従来は例えば図5で示す如
く各導体部2間にソルダーレジストインク8を塗布し、
いわば堤防を形成することでブリッジの形成を防止して
いた。Since this bridge causes a short circuit and makes the product defective, it is necessary to prevent the bridge from being formed by the excess solder 5. Conventionally, for example, as shown in FIG. Apply 8
In other words, the formation of dikes prevented the formation of bridges.
【0004】[0004]
【発明が解決しようとする課題】ところが、上記の如く
導体部2間にソルダーレジストインク8を塗布して余剰
半田5によるブリッジ形成を防止する手段は、電子部品
の多ピン化・高密度化により電極のピッチが一層狭くな
り、基板側の接続用導体部3間のピッチも狭くなると
(例えば配線密度が0.3mmピッチ以下)、導体部3
間へのソルダーレジストインク8の塗布の精度やインク
8の密着強度の低下という問題が発生している。そのた
め上記手段は、余剰半田によるブリッジの形成防止に有
効ではなくなっている。However, as described above, the means for applying the solder resist ink 8 between the conductor portions 2 to prevent the bridge formation due to the excess solder 5 is to increase the number of pins and the density of the electronic parts. When the pitch of the electrodes is further narrowed and the pitch between the conductor portions 3 for connection on the substrate side is also narrowed (for example, the wiring density is 0.3 mm pitch or less), the conductor portions 3
There is a problem that the accuracy of applying the solder resist ink 8 between the gaps and the decrease in the adhesion strength of the ink 8 occur. Therefore, the above means is no longer effective in preventing the formation of bridges due to excess solder.
【0005】そこで、シンプルな手段でコストアップに
ならずに、余剰半田によるブリッジの形成を有効に防止
できる手段の開発が望まれている。本発明は、狭ピッチ
電極をもつ電子部品の実装用プリント基板における上記
問題点を解決しようとするものであり、その目的は狭ピ
ッチ電極をもつ電子部品を実装する場合に、接続用導体
部間に余剰半田によるブリッジの形成を防止し、この面
でのショートの発生を無くすような、プリント基板を提
供することにある。Therefore, there is a demand for the development of means capable of effectively preventing the formation of a bridge due to excess solder without increasing the cost with a simple means. The present invention is intended to solve the above problems in a printed circuit board for mounting an electronic component having a narrow pitch electrode, and an object thereof is to mount an electronic component having a narrow pitch electrode between connecting conductor portions. Another object of the present invention is to provide a printed circuit board that prevents the formation of bridges due to excess solder and eliminates the occurrence of short circuits on this surface.
【0006】[0006]
A 本発明に係る狭ピッチ電極をもつ電子部品の実装用
プリント基板の第1のものは、電子部品の狭ピッチ電極
2に対応してプリント基板1に狭ピッチで形成された各
接続用導体部3間に、プリント基板1の絶縁層4の一部
を、部品搭載時の余剰半田5の体積以上の容積で除去し
て、余剰半田逃げ用凹所6を形成してなるものである
(図1・図2参照)。A. A first printed circuit board for mounting an electronic component having a narrow pitch electrode according to the present invention is a connecting conductor portion formed on the printed circuit board 1 at a narrow pitch corresponding to the narrow pitch electrode 2 of the electronic component. In between 3, a part of the insulating layer 4 of the printed board 1 is removed with a volume equal to or larger than the volume of the excess solder 5 at the time of mounting the component, and the excess solder escape recess 6 is formed (FIG. 1 ・ See Fig. 2).
【0007】上記余剰半田逃げ用凹所6は、底部のある
窪み状であってもよいし、底部のない通孔状のものであ
ってもよい。The above-mentioned recess 6 for excess solder escape may be a recess having a bottom or a hole having no bottom.
【0008】B 本発明に係る狭ピッチ電極をもつ電子
部品の実装用プリント基板の第2のものは、プリント基
板1で電子部品の各狭ピッチ電極2に対応する各位置
に、絶縁層4の一部を、そこに形成される接続用導体部
3と半田接合される電極2と部品搭載時の余剰半田5の
各体積の和以上の容積をもつ凹部7を設け、該各凹部7
内面に導体部3を形成してなるなるものである。B The second printed circuit board for mounting an electronic component having a narrow pitch electrode according to the present invention has an insulating layer 4 at each position on the printed circuit board 1 corresponding to each narrow pitch electrode 2 of the electronic component. A concave portion 7 having a volume not less than the sum of the respective volumes of the electrode 2 to be solder-joined to the connecting conductor portion 3 formed therein and the surplus solder 5 at the time of mounting the component is provided.
The conductor portion 3 is formed on the inner surface.
【0009】図において、9は接合半田を示す。In the figure, reference numeral 9 indicates a bonding solder.
【0010】[0010]
【作用】プリント基板1の各接続用導体部3に、電子部
品の各狭ピッチ電極2を半田ペーストで接合して実装す
る場合に、部品実装時に各導体部3上に余分な量の半田
ペーストがあると、それが余剰半田5となる。半田ペー
ストが接合として必要な量よりも多すぎると余剰半田5
の量もそれだけ多くなり、そのままでは隣接する導体部
3間を繋ぐブリッジが形成される。When the narrow pitch electrodes 2 of the electronic component are bonded to the conductor portions 3 for connection on the printed circuit board 1 with solder paste and mounted, an excessive amount of solder paste is placed on the conductor portions 3 when the components are mounted. If there is, it becomes the excess solder 5. If the amount of solder paste is too much for joining, excess solder 5
Is also increased by that amount, and as it is, a bridge connecting the adjacent conductor portions 3 is formed.
【0011】1)しかし、本発明に係る狭ピッチ電極を
もつ電子部品の実装用プリント基板の上記第1のもの
は、プリント基板1の各接続用導体部3間の絶縁層4の
一部を除去して、部品搭載時の余剰半田5の体積以上の
容積で余剰半田逃げ用凹所6を形成してある。1) However, the above-mentioned first printed circuit board for mounting an electronic component having a narrow pitch electrode according to the present invention has a portion of the insulating layer 4 between the connecting conductor portions 3 of the printed circuit board 1. The excess solder 5 is removed to form the excess solder escape recess 6 with a volume equal to or larger than the volume of the excess solder 5 when the component is mounted.
【0012】そのため余剰半田5が生じても、該余剰半
田5は導体部3間の余剰半田逃げ用凹所6内へ流入する
が、該凹所6の容積が上記の如く余剰半田5の体積以上
にしてあるから、隣接する導体部3間を繋ぐブリッジが
形成されることがない(図1・図2参照)。なおこの凹
部6内の余剰半田5は容易に除去することもできる。Therefore, even if the surplus solder 5 is generated, the surplus solder 5 flows into the surplus solder escape recess 6 between the conductor portions 3. However, the volume of the recess 6 is the volume of the surplus solder 5 as described above. Because of the above, no bridge connecting the adjacent conductor portions 3 is formed (see FIGS. 1 and 2). The excess solder 5 in the recess 6 can be easily removed.
【0013】2)他方、本発明に係る狭ピッチ電極をも
つ電子部品の実装用プリント基板の上記第2のものは、
プリント基板1で電子部品の各狭ピッチ電極2に対応す
る各位置の絶縁層4の一部を除去して、そこに形成され
る接続用導体部3と半田接合される電極2と部品搭載時
の余剰半田5の各体積の和以上の容積をもつ凹部7を設
けて、該各凹部7内面に導体部3を形成してある。2) On the other hand, the second printed circuit board for mounting an electronic component having a narrow pitch electrode according to the present invention is
When a part of the insulating layer 4 at each position corresponding to each narrow pitch electrode 2 of the electronic component is removed on the printed circuit board 1 and the electrode 2 to be soldered to the connecting conductor portion 3 formed therein and the component are mounted The recesses 7 having a volume not less than the sum of the respective volumes of the excess solder 5 are provided, and the conductor portion 3 is formed on the inner surface of each recess 7.
【0014】そのため余剰半田5が生じても、該余剰半
田5は上記凹部7内に流入するが、該凹部7の容積が上
記の如く接続用導体部3と半田接合される電極2と余剰
半田5の各体積の和以上であるから、該余剰半田5はそ
こから溢れることがなく、隣接する導体部3間を繋ぐブ
リッジが形成されることはない(図3参照)。Therefore, even if the surplus solder 5 is generated, the surplus solder 5 flows into the recess 7, but the volume of the recess 7 is the electrode 2 and the surplus solder which are soldered to the connecting conductor portion 3 as described above. Since it is equal to or more than the sum of the respective volumes of No. 5, the excess solder 5 does not overflow from there and a bridge connecting the adjacent conductors 3 is not formed (see FIG. 3).
【0015】[0015]
【実施例】図1および図2は、上記本発明に係る狭ピッ
チ電極をもつ電子部品の実装用プリント基板の第1のも
のを示し、図3は上記第2のものを示す。図示例では単
層のプリント基板を示しているが、両面または多層プリ
ント基板であっても同様である。1 and 2 show a first printed circuit board for mounting an electronic component having narrow pitch electrodes according to the present invention, and FIG. 3 shows the second printed circuit board. Although a single-layer printed circuit board is shown in the illustrated example, the same applies to a double-sided or multi-layer printed circuit board.
【0016】上記本発明に係る狭ピッチ電極をもつ電子
部品の実装用プリント基板の基材としては、例えばエキ
シマレーザー等の照射で上記余剰半田逃げ用凹所6や凹
部7を形成可能な有機高分子材料を用いるのがよい。具
体的には、アラミドベースのプリント基板材料、ポリイ
ミドベースのFPCやTAB等に用いればよい。As a base material of a printed circuit board for mounting electronic parts having narrow pitch electrodes according to the present invention, for example, an organic solder which can form the above-mentioned recess 6 or recess 7 for excess solder escape by irradiation of excimer laser or the like. It is better to use a molecular material. Specifically, it may be used for an aramid-based printed circuit board material, a polyimide-based FPC, TAB, or the like.
【0017】また、上記余剰半田逃げ用凹所6や凹部7
の形成は、上記エキシマレーザー等の照射を、例えばマ
スクイメージ、コンタクトマスク、あるいはプリント基
板表層導体にて形成したコンフオーマルマスクを利用し
て、絶縁層4から上記の所望の容積を除去するようにす
ればよい。Further, the recess 6 for recessing the excess solder and the recess 7 are provided.
Is formed by removing the desired volume from the insulating layer 4 by irradiating the excimer laser or the like, for example, using a mask image, a contact mask, or a conformal mask formed of a printed circuit board surface layer conductor. do it.
【0018】上記本発明の1番目のプリント基板におい
て、その余剰半田逃げ用凹所6は図1で示す如く底部の
ある窪み状のものでも、図2で示す如く底部のない通孔
状のものとしてもよい。また上記本発明の第2のプリン
ト基板において、各凹部7内に形成される接続用導体部
3は、形成された凹部7の内面に例えば銅メッキを施せ
ばよい。In the first printed circuit board of the present invention, the excess solder escape recess 6 is a recess having a bottom as shown in FIG. 1 or a through hole having no bottom as shown in FIG. May be In the second printed circuit board of the present invention, the connecting conductor portion 3 formed in each recess 7 may be formed by, for example, copper plating the inner surface of the formed recess 7.
【0019】[0019]
【発明の効果】以上で明らかな如く、本発明に係る狭ピ
ッチ電極をもつ電子部品の実装用プリント基板は、狭ピ
ッチ電極をもつ電子部品を実装する場合に、余剰半田に
よる接続用導体部間のブリッジの発生を防止することが
できる。As is apparent from the above, the printed circuit board for mounting an electronic component having a narrow pitch electrode according to the present invention is used for mounting an electronic component having a narrow pitch electrode between connecting conductor portions for connection by excess solder. It is possible to prevent the occurrence of the bridge.
【0020】即ち、従来の狭ピッチ電極をもつ電子部品
の実装用プリント基板では、余剰半田による接続用導体
部間のブリッジ発生の防止を、一般には導体部間にソル
ダーレジストインクを塗布していた。しかし近時の如く
電子部品の電極が狭ピッチ化に対応してプリント基板側
の導体部間も狭ピッチ化すると、導体部間へのソルダー
レジストインク塗布の精度やインクの密着強度の低下と
いう問題が生じ、ブリッジの形成防止に有効でなくなっ
ている。That is, in a conventional printed circuit board for mounting an electronic component having a narrow pitch electrode, a solder resist ink is generally applied between the conductor portions to prevent the occurrence of a bridge between the connecting conductor portions due to excess solder. .. However, when the pitch of the conductors on the printed circuit board side becomes narrower in response to the narrower pitch of the electrodes of electronic parts as in recent years, there is a problem that the accuracy of solder resist ink application between the conductors and the adhesion strength of the ink decrease. Occurs and is no longer effective in preventing the formation of bridges.
【0021】これに対して本発明では上記の如く、プリ
ント基板の各接続用導体部間の絶縁層の一部を除去し
て、部品搭載時の余剰半田の体積以上の容積で余剰半田
逃げ用凹所を形成し、あるいはプリント基板で電子部品
の各狭ピッチ電極に対応する各位置の絶縁層の一部を除
去して、そこに形成される導体部と半田接合される電極
と部品搭載時の余剰半田の各体積の和以上の容積の凹部
を設け、該各凹部内面に導体部を形成してある。On the other hand, in the present invention, as described above, by removing a part of the insulating layer between the connecting conductor portions of the printed circuit board, the excess solder escapes at a volume equal to or larger than the volume of the excess solder when the component is mounted. When mounting a component by forming a recess or removing a part of the insulating layer at each position corresponding to each narrow-pitch electrode of the electronic component on the printed circuit board and solder-bonding the electrode A recess having a volume not less than the sum of the respective volumes of the excess solder is provided and a conductor portion is formed on the inner surface of each recess.
【0022】そのため、本発明では上記第1および第2
のもの共に、余剰半田は接続用導体部間の上記凹所内、
あるいは上記凹部内へ流入して溜まるが、該凹所あるい
は凹部の容積が余剰半田の体積以上の容積をもつから、
余剰半田がそこから溢れることがなく、隣接する導体部
間を繋ぐブリッジの形成が防止できる。したがって、余
剰半田によるブリッジが原因のショートの発生を防止
し、この面での不良品の発生を無くすことができる。Therefore, in the present invention, the above-mentioned first and second
In both cases, the excess solder is in the recess between the connecting conductors,
Alternatively, it flows into the recess and accumulates therein, but since the volume of the recess or the recess has a volume equal to or larger than the volume of the excess solder,
Excessive solder will not overflow from it, and the formation of bridges connecting adjacent conductor portions can be prevented. Therefore, it is possible to prevent the occurrence of a short circuit due to the bridge due to excess solder, and to eliminate the occurrence of defective products on this side.
【図1】本発明に係るプリント基板の第1の実施例を示
す一部拡大縦断斜視図である。FIG. 1 is a partially enlarged vertical perspective view showing a first embodiment of a printed circuit board according to the present invention.
【図2】本発明に係るプリント基板の第1の実施例の変
形例を示す一部拡大縦断斜視図である。FIG. 2 is a partially enlarged vertical perspective view showing a modified example of the first embodiment of the printed circuit board according to the present invention.
【図3】本発明に係るプリント基板の第2の実施例を示
す一部拡大縦断斜視図である。FIG. 3 is a partially enlarged vertical perspective view showing a second embodiment of the printed circuit board according to the present invention.
【図4】従来のプリント基板でブリッジが形成された状
態を示す一部拡大縦断斜視図である。FIG. 4 is a partially enlarged vertical perspective view showing a state in which a bridge is formed on a conventional printed circuit board.
【図5】従来のプリント基板におけるブリッジ形成防止
手段を示す一部拡大縦断斜視図である。FIG. 5 is a partially enlarged vertical perspective view showing a bridge formation preventing means in a conventional printed circuit board.
1−プリント基板 2−狭ピッチ電極 3
−接続用導体部 4−絶縁層 5−余剰半田 6
−凹所 7−凹部 9−接合半田1-Printed circuit board 2-Narrow pitch electrode 3
-Connecting conductor part 4-Insulating layer 5-Excessive solder 6
-Recess 7-Recess 9-Joint solder
Claims (2)
ント基板1に狭ピッチで形成された各接続用導体部3間
に、プリント基板1の絶縁層4の一部を、部品搭載時の
余剰半田5の体積以上の容積で除去して、余剰半田逃げ
用凹所6を形成してなる、狭ピッチ電極をもつ電子部品
の実装用プリント基板。1. A part of an insulating layer 4 of a printed circuit board 1 is mounted between parts of connecting conductors 3 formed at a narrow pitch on a printed circuit board 1 in correspondence with a narrow pitch electrode 2 of an electronic device. A printed circuit board for mounting an electronic component having a narrow pitch electrode, which is formed by removing the excess solder 5 with a volume equal to or larger than that of the excess solder 5 and forming the excess solder escape recesses 6.
極2に対応する各位置に、絶縁層4の一部を、そこに形
成される接続用導体部3と半田接合される電極2と部品
搭載時の余剰半田5の各体積の和以上の容積をもつ凹部
7を設け、該各凹部7内面に導体部3を形成してなる、
狭ピッチ電極をもつ電子部品の実装用プリント基板。2. A printed circuit board (1) is provided with a portion of an insulating layer (4) at each position corresponding to each narrow pitch electrode (2) of an electronic component and an electrode (2) soldered to a connecting conductor portion (3) formed there. A recess 7 having a volume equal to or larger than the sum of the respective volumes of the excess solder 5 when the component is mounted is provided, and the conductor portion 3 is formed on the inner surface of each recess 7.
Printed circuit board for mounting electronic components with narrow pitch electrodes.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4155757A JPH07114315B2 (en) | 1992-05-22 | 1992-05-22 | Printed circuit board for mounting electronic components with narrow pitch electrodes |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4155757A JPH07114315B2 (en) | 1992-05-22 | 1992-05-22 | Printed circuit board for mounting electronic components with narrow pitch electrodes |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH05327196A true JPH05327196A (en) | 1993-12-10 |
JPH07114315B2 JPH07114315B2 (en) | 1995-12-06 |
Family
ID=15612750
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4155757A Expired - Fee Related JPH07114315B2 (en) | 1992-05-22 | 1992-05-22 | Printed circuit board for mounting electronic components with narrow pitch electrodes |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07114315B2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7291912B2 (en) | 2004-03-09 | 2007-11-06 | Orion Electric Co., Ltd. | Circuit board |
JP2008263407A (en) * | 2007-04-12 | 2008-10-30 | Nippon Dempa Kogyo Co Ltd | Electronic device for surface mounting |
US7719119B2 (en) | 2006-01-26 | 2010-05-18 | Panasonic Corporation | Semiconductor device, electronic apparatus comprising the same, and method for fabrication of substrate for semiconductor device used therein |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6352497A (en) * | 1986-08-22 | 1988-03-05 | 日立デバイスエンジニアリング株式会社 | Wiring board |
-
1992
- 1992-05-22 JP JP4155757A patent/JPH07114315B2/en not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6352497A (en) * | 1986-08-22 | 1988-03-05 | 日立デバイスエンジニアリング株式会社 | Wiring board |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7291912B2 (en) | 2004-03-09 | 2007-11-06 | Orion Electric Co., Ltd. | Circuit board |
US7719119B2 (en) | 2006-01-26 | 2010-05-18 | Panasonic Corporation | Semiconductor device, electronic apparatus comprising the same, and method for fabrication of substrate for semiconductor device used therein |
JP2008263407A (en) * | 2007-04-12 | 2008-10-30 | Nippon Dempa Kogyo Co Ltd | Electronic device for surface mounting |
Also Published As
Publication number | Publication date |
---|---|
JPH07114315B2 (en) | 1995-12-06 |
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Legal Events
Date | Code | Title | Description |
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LAPS | Cancellation because of no payment of annual fees |