JPH01218092A - Manufacture of printed wiring board - Google Patents

Manufacture of printed wiring board

Info

Publication number
JPH01218092A
JPH01218092A JP4385688A JP4385688A JPH01218092A JP H01218092 A JPH01218092 A JP H01218092A JP 4385688 A JP4385688 A JP 4385688A JP 4385688 A JP4385688 A JP 4385688A JP H01218092 A JPH01218092 A JP H01218092A
Authority
JP
Japan
Prior art keywords
conductive film
resist
solder
soldering
conductive foil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4385688A
Other languages
Japanese (ja)
Inventor
Masayuki Ibaraki
茨木 政行
Satoshi Hasegawa
智 長谷川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP4385688A priority Critical patent/JPH01218092A/en
Publication of JPH01218092A publication Critical patent/JPH01218092A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452Solder masks

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE:To prevent bridge soldering from being defective by forming a dam whose thickness is equal to the thickness of a resist between adjacent portions of the conductive film in which the soldering resist is filmed so as to cover the conductive film. CONSTITUTION:A soldering resist 12 is covered so that a conductive film 11 corresponding to electronic component leads which are formed at a narrow pitch is exposed. A part of the conductive film 11 is on a lower level compared to the surface of the surrounding soldering resist 12, so that dams D are formed between the adjacent conductive film portions as much as the thickness of the resist. Then, the reflow soldering is performed after first applying a soldering paste on the part to be soldered on the conductive film 11 having the dams D formed and then mounting the component leads 13 on the corresponding conductive film portions. The dams D prevent the melted solder 14 from being overflown from the conductive film 11, thereby preventing bridges from being defective when the adjacent conductive film portions are soldered.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は印刷配線基板の製造方法に係り、特にリードが
狭いピッチで多数形成された電子部品が表面実装された
印刷配線基板の製造方法に関する。
[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a method for manufacturing a printed wiring board, and particularly to a printed wiring board on which electronic components having a large number of leads formed at a narrow pitch are surface mounted. The present invention relates to a method for manufacturing a substrate.

(従来の技術) 従来から、基板上にフラットパッケージICのようなリ
ードが狭い間隔で多数配列された電子部品を表面実装し
てなる印刷配線基板が知られている。
(Prior Art) Printed wiring boards have been known that are formed by surface-mounting electronic components such as flat package ICs on which a large number of leads are arranged at narrow intervals.

このような印刷配線基板に上記電子部品を表面実装する
には、印刷配線基板上の電子部品のリードを半田付けす
るための導電箔の部分を除く露出部分に半田レジストが
被覆される。
In order to surface-mount the electronic component on such a printed wiring board, solder resist is coated on the exposed portion of the printed wiring board except for the conductive foil portion for soldering the leads of the electronic component on the printed wiring board.

印刷配線基板の露出部分をレジストで被覆する方法とし
ては、第3図に示すように、印刷配線基板Pの導電箔1
全体の外側に、これら導電箔1の周囲全体を囲むように
斜線で示す半田レジスト2を被覆するか、あるいは第4
図(a)、(b)に示すように、各導電箔1間にも配置
されるようにしてレジスト2が被覆される。
As shown in FIG.
A solder resist 2 shown by diagonal lines is coated on the outside of the entire conductive foil 1 so as to surround the entire periphery of the conductive foil 1, or a fourth
As shown in FIGS. (a) and (b), the resist 2 is coated so as to be placed also between the conductive foils 1.

しかしながら、このような従来の方法では、いずれも各
導体箔1とレジスト2の高さがほぼ等しくなって、隣り
合う導電箔1の間に溶融した半田を遮断するものがなに
もないため、この上にぺ−スト状の半田を置いてリフロ
ー半田する際、各リード間に、半田ブリッジが生じやす
いという問題があった。
However, in these conventional methods, the heights of each conductor foil 1 and resist 2 are approximately equal, and there is nothing between adjacent conductive foils 1 to block the molten solder. When paste-like solder is placed on top of this and reflow soldering is performed, there is a problem in that solder bridges tend to occur between the leads.

また、各導体箔1とレジスト2間に間隙dあるいはd′
が形成され、この間にも半田が入り込むため、狭ピッチ
への対応が困難であるという問題もあった。
Also, there is a gap d or d' between each conductor foil 1 and the resist 2.
is formed, and the solder also enters during this time, making it difficult to deal with narrow pitches.

第5図は第4図に示した印刷配線基板Pの導電箔1の部
分にペースト状の半田を塗布して、電子部品のり−ド3
を配置し、半田リフローした場合の半田4とブリッジ5
の状態を示したものである。
FIG. 5 shows that paste-like solder is applied to the conductive foil 1 portion of the printed wiring board P shown in FIG.
Solder 4 and Bridge 5 when placed and solder reflowed
This shows the state of

(発明が解決しようとする課題) 上述したように従来の方法では、隣り合う導電箔の間に
溶融した半田を遮断するものがなにもないため、半田ブ
リッジが生じやすいという問題があった。
(Problems to be Solved by the Invention) As described above, in the conventional method, there was a problem in that solder bridges were likely to occur because there was nothing to block the molten solder between adjacent conductive foils.

また導電箔の側面まで半田が付着するため狭ピッチの対
応が困難であるという問題もあった。
Another problem is that it is difficult to handle narrow pitches because the solder adheres to the sides of the conductive foil.

本発明はこのような問題を解決するためなされたもので
、半田ブリッジによる不良を防止した印刷配線基板の製
造方法を提供することを目的とする。
The present invention was made to solve such problems, and an object of the present invention is to provide a method for manufacturing a printed wiring board that prevents defects caused by solder bridges.

[発明の構成] (課題を解決するための手段) 本発明の印刷配線基板の製造方法は、電子部品のリード
を半田付けするための半田付は用導電箔を有する基板上
に、前記電子部品を半田付けにより表面実装するにあた
り、露出した基板表面から前記半田付は用導電箔の周縁
部上にかけて半田レジストを被覆して導電箔周縁部上に
半田レジストによるダムを形成し、次いでこのダムの内
側の導電箔上に半田を塗布して、前記電子部品のリード
を配置し、この半田をリフローさせることを特徴として
いる。
[Structure of the Invention] (Means for Solving the Problems) The method for manufacturing a printed wiring board of the present invention provides a method for manufacturing a printed wiring board of the present invention, in which the electronic component is soldered onto a substrate having a conductive foil for soldering the leads of the electronic component. When surface mounting by soldering, a solder resist is coated from the exposed surface of the board to the periphery of the conductive foil for soldering, and a dam of solder resist is formed on the periphery of the conductive foil. The method is characterized in that solder is applied onto the inner conductive foil, the leads of the electronic component are arranged, and the solder is reflowed.

本発明における半田レジストとしては、インク状のもの
も、フィルム状のものも使用可能である。
As the solder resist in the present invention, both ink-like and film-like ones can be used.

(作用) 上記のように、本発明においては、半田レジストを導電
箔にかかるように被覆するので隣接する導電箔間にレジ
スト要分のダムを形成することになり、このダムにより
半田のブリッジ不良が防止される。
(Function) As described above, in the present invention, since the solder resist is coated over the conductive foil, a dam corresponding to the resist is formed between adjacent conductive foils, and this dam causes solder bridging defects. is prevented.

また半田レジストのパターンの変更により導電箔の半田
付は部の形状を変更することが可能である。
Further, by changing the pattern of the solder resist, it is possible to change the shape of the soldering portion of the conductive foil.

(実施例) 次に本発明の実施例について図面を用いて説明する。(Example) Next, embodiments of the present invention will be described using the drawings.

まず、第1図(a)に示すように、フラットパッケージ
IC等のリードが狭いピッチで形成された電子部品のリ
ードに対応する導電箔11が露出するように半田レジス
ト12を被覆する。
First, as shown in FIG. 1(a), a solder resist 12 is coated so that the conductive foil 11 corresponding to the leads of an electronic component such as a flat package IC whose leads are formed at a narrow pitch is exposed.

このとき、半田レジスト12は、斜線で示すように、導
電箔11の周縁部に被さるようにして基板P上に被覆す
る。
At this time, the solder resist 12 is coated on the substrate P so as to cover the peripheral edge of the conductive foil 11, as shown by diagonal lines.

このようにして半田レジスト12で導電箔11の周縁部
を覆うことにより、第1図(b)に示すように半田付け
する導電箔11の部分が周囲の半田レジスト12の面よ
り低くなり、隣接する導電箔11の間にレジスト厚さ分
だけのダムDが形成される。このようにしてダムDの形
成された導電箔11の、半田付は部分に第2図に示すよ
うにペースト状の半田を塗布して対応する部品リード1
3を装着し、半田リフローすると溶融した半田14はレ
ジスト12により形成されたダムDにより導電箔11か
らの流出が防止され、半田14による隣接導電箔のブリ
ッジ不良を避けることができる。
By covering the peripheral edge of the conductive foil 11 with the solder resist 12 in this manner, the portion of the conductive foil 11 to be soldered becomes lower than the surface of the surrounding solder resist 12, as shown in FIG. A dam D corresponding to the thickness of the resist is formed between the conductive foils 11. The conductive foil 11 with the dam D formed thereon is soldered by applying paste-like solder to the corresponding component lead 1 as shown in FIG.
3 is attached and solder reflow is performed, the molten solder 14 is prevented from flowing out from the conductive foil 11 by the dam D formed by the resist 12, and bridging defects of adjacent conductive foils caused by the solder 14 can be avoided.

また導電箔の側面に半田が付着しないため狭ピッチの対
応も容易になる。
Furthermore, since solder does not adhere to the side surfaces of the conductive foil, narrow pitches can be easily accommodated.

[発明の効果] 以上説明したように、本発明方法によれば半田付けする
導電箔の部分が周囲の半田レジストの面より低くなって
おり、隣接する導電箔の間にレジスト厚さ分だけのダム
が形成されるので、溶融した半田が導電箔から流出する
ことがなく、半田ブリッジ不良のない印刷配線基板を製
造することができる。
[Effects of the Invention] As explained above, according to the method of the present invention, the part of the conductive foil to be soldered is lower than the surface of the surrounding solder resist, and there is a space between adjacent conductive foils equal to the thickness of the resist. Since the dam is formed, molten solder does not flow out from the conductive foil, and a printed wiring board without solder bridge defects can be manufactured.

また導電箔゛の側面まで半田が付むしないため狭ピッチ
の対応が容易になる。
Furthermore, since the solder does not reach the side surfaces of the conductive foil, narrow pitches can be easily accommodated.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)は本発明方法におけるダムを示す平面図、
第1図(b)は第1図(a)のA−A’線に沿う断面図
、第2図は第1図(b)の印刷配線基板に電子部品のリ
ードを半田付けした状態を示す断面図、第3図と第4図
(a)6は従来方法を説明するための印刷配線基板の平
面図、第4図(b)は第4図(a)のB−B’線に沿う
断面図、第5図は第4図(b)の基板に電子部品のリー
ドを半田付けした状態を示す断面図である。 11・・・・・・・・・導電箔 12・・・・・・・・・半田レジスト 13・・・・・・・・・リード 14・・・・・・・・・半田 D・・・・・・・・・・・・ダム
FIG. 1(a) is a plan view showing a dam in the method of the present invention;
Figure 1(b) is a cross-sectional view taken along line A-A' in Figure 1(a), and Figure 2 shows the state in which electronic component leads are soldered to the printed wiring board in Figure 1(b). 3 and 4(a) 6 are plan views of printed wiring boards for explaining the conventional method, and FIG. 4(b) is taken along line BB' in FIG. 4(a). 5 is a sectional view showing a state in which leads of electronic components are soldered to the board of FIG. 4(b). 11... Conductive foil 12... Solder resist 13... Lead 14... Solder D... ·········dam

Claims (1)

【特許請求の範囲】[Claims] (1)電子部品のリードを半田付けするための半田付け
用導電箔を有する基板上に、前記電子部品を半田付けに
より表面実装するにあたり、露出した基板表面から前記
半田付け用導電箔の周縁部上にかけて半田レジストを被
覆して導電箔周縁部上に半田レジストによるダムを形成
し、次いでこのダムの内側の導電箔上に半田を塗布して
、前記電子部品のリードを配置し、この半田をリフロー
させることを特徴とする印刷配線基板の製造方法。
(1) When surface-mounting electronic components by soldering on a board having conductive foil for soldering to which leads of electronic components are soldered, the peripheral edge of the conductive foil for soldering extends from the exposed surface of the board. A dam of solder resist is formed on the periphery of the conductive foil by coating it with a solder resist, and then solder is applied on the conductive foil inside the dam, and the leads of the electronic component are placed, and this solder is applied. A method for manufacturing a printed wiring board, characterized by reflowing.
JP4385688A 1988-02-26 1988-02-26 Manufacture of printed wiring board Pending JPH01218092A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4385688A JPH01218092A (en) 1988-02-26 1988-02-26 Manufacture of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4385688A JPH01218092A (en) 1988-02-26 1988-02-26 Manufacture of printed wiring board

Publications (1)

Publication Number Publication Date
JPH01218092A true JPH01218092A (en) 1989-08-31

Family

ID=12675349

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4385688A Pending JPH01218092A (en) 1988-02-26 1988-02-26 Manufacture of printed wiring board

Country Status (1)

Country Link
JP (1) JPH01218092A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008288464A (en) * 2007-05-18 2008-11-27 Tamura Seisakusho Co Ltd Semiconductor mounting substrate
CN107078126A (en) * 2014-11-06 2017-08-18 三菱电机株式会社 The conductive member of semiconductor module and semiconductor module

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62142619A (en) * 1985-10-15 1987-06-26 プレジデント・エンジニアリング・コ−ポレ−シヨン Method and device for manufacturing prepreg as metal laminated base body substance for circuit board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62142619A (en) * 1985-10-15 1987-06-26 プレジデント・エンジニアリング・コ−ポレ−シヨン Method and device for manufacturing prepreg as metal laminated base body substance for circuit board

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008288464A (en) * 2007-05-18 2008-11-27 Tamura Seisakusho Co Ltd Semiconductor mounting substrate
CN107078126A (en) * 2014-11-06 2017-08-18 三菱电机株式会社 The conductive member of semiconductor module and semiconductor module
EP3217430A4 (en) * 2014-11-06 2018-07-04 Mitsubishi Electric Corporation Semiconductor module and conductive member for semiconductor module
US10475667B2 (en) 2014-11-06 2019-11-12 Mitsubishi Electric Corporation Semiconductor module and conductive member for semiconductor module including cut in bent portion

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