JPH11145605A - Printed wiring board - Google Patents

Printed wiring board

Info

Publication number
JPH11145605A
JPH11145605A JP30686897A JP30686897A JPH11145605A JP H11145605 A JPH11145605 A JP H11145605A JP 30686897 A JP30686897 A JP 30686897A JP 30686897 A JP30686897 A JP 30686897A JP H11145605 A JPH11145605 A JP H11145605A
Authority
JP
Japan
Prior art keywords
mounting land
component mounting
solder resist
printed wiring
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP30686897A
Other languages
Japanese (ja)
Other versions
JP3440786B2 (en
Inventor
Toshimitsu Matsuda
利光 松田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP30686897A priority Critical patent/JP3440786B2/en
Publication of JPH11145605A publication Critical patent/JPH11145605A/en
Application granted granted Critical
Publication of JP3440786B2 publication Critical patent/JP3440786B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452Solder masks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates

Landscapes

  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a printed wiring board wherein, even some displacement occurs between a circuit pattern and a solder resist, a sufficient soldering area is secured for good soldering with high reliability. SOLUTION: A solder resist 2 rides over around a mounting land 1 so that some displacement between them is caucelled in the overlap amount for constant exposure amount of the mounting land 1, at the same time, the mounting land 1 is reinforced by the solder resist 2 overlapping raround it for improved anti- peeling strength between a base material and the mounting land 1, thus a printed wiring board wherein good soldering is realized with high reliability.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はパソコン、移動体通
信用電話機、ヒデオカメラ等の各種電子機器に用いられ
るプリント配線板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board used for various electronic devices such as a personal computer, a mobile communication telephone, and a video camera.

【0002】[0002]

【従来の技術】近年、電子機器の高機能化、高密度化に
伴い、電子部品は、ますます小型化、高集積化、高速
化、多ピン化の傾向にある。
2. Description of the Related Art In recent years, as electronic devices have become higher in function and higher in density, electronic components have tended to become smaller, more highly integrated, operate at higher speeds, and have more pins.

【0003】このために、プリント配線板の形態はます
ます低誘電率、薄型、軽量化の傾向が進んでおり、同時
に実装部品の形態も多ピン化の中で小型化に応えるた
め、従来の周辺端子実装型パッケージに加え、面格子実
装型パッケージも実用化されてきているなど高密度化の
傾向にあり、また一方で実装時の信頼性、リペアー性が
要求されてきている。
[0003] For this reason, printed wiring boards are becoming more and more low dielectric constant, thinner and lighter, and at the same time, the mounting parts are more compact in response to the increase in the number of pins. In addition to the peripheral terminal mounting type package, a surface lattice mounting type package has been put into practical use, and the density has tended to increase. On the other hand, reliability and repairability during mounting have been required.

【0004】以下に従来のプリント配線板について説明
する。図3(a),(b)は従来のプリント配線板を示
す図である。図3(a),(b)において、11は部品
実装ランド、12はソルダレジストである。
[0004] A conventional printed wiring board will be described below. FIGS. 3A and 3B are views showing a conventional printed wiring board. 3A and 3B, reference numeral 11 denotes a component mounting land, and reference numeral 12 denotes a solder resist.

【0005】以上のように構成されたプリント配線板に
ついて、以下詳細に説明する。部品実装ランド11は、
両面プリント配線板の表裏もしくは多層プリント配線板
の最外層の金属層に対してエッチングなどの手段を用い
て回路パターンを形成する際に同時に形成する。次には
んだ付けなどによる部品実装時に不用な部分にソルダレ
ジスト12を形成することにより短絡を防止する。この
時部品実装ランド11上にソルダレジスト12が乗り上
げた場合、部品実装ランド11の実装面積が減少し良好
なはんだ付けを行うことを阻害することになる。
The printed wiring board configured as described above will be described in detail below. The component mounting land 11
It is formed at the same time when a circuit pattern is formed on the front and back surfaces of the double-sided printed wiring board or the outermost metal layer of the multilayer printed wiring board by using a method such as etching. Next, a short circuit is prevented by forming a solder resist 12 on an unnecessary portion at the time of component mounting by soldering or the like. At this time, if the solder resist 12 rides on the component mounting land 11, the mounting area of the component mounting land 11 is reduced, which hinders good soldering.

【0006】そこでこれを防止するためにソルダレジス
ト12を形成する際、部品実装ランド11上の部分は予
め部品実装ランド11に対してクリアランスをもたせ部
品実装ランド11よりも大きな形状で設計することによ
り、ソルダレジスト12の形成時に回路パターンと多少
のズレが発生してもそれを吸収することを可能としてい
た。ここで部品実装ランド11とソルダレジスト12の
除去部の形状は図3(a),(b)に示すように円形、
四角形など様々な形状が存在する。
To prevent this, when the solder resist 12 is formed, a portion on the component mounting land 11 is designed to have a clearance in advance with respect to the component mounting land 11 and to be designed in a shape larger than the component mounting land 11. In addition, even if a slight deviation from the circuit pattern occurs when the solder resist 12 is formed, the deviation can be absorbed. Here, the shape of the removed part of the component mounting land 11 and the solder resist 12 is circular as shown in FIGS.
There are various shapes such as squares.

【0007】[0007]

【発明が解決しようとする課題】しかしながら上記の従
来のプリント配線板では、ますます高密度化が進む中で
上記部品実装ランド11とソルダレジスト12とのクリ
アランスも減少する傾向にあり、そのために回路パター
ンとソルダレジスト12との間に僅かなズレが発生した
場合でも、その乗り上げによりはんだ付け面積が減少し
良好なはんだ付けを行うことが阻害される傾向にあると
いう問題点を有していた。
However, in the above-described conventional printed wiring board, the clearance between the component mounting land 11 and the solder resist 12 tends to decrease as the density of the printed wiring board further increases. Even when a slight displacement occurs between the pattern and the solder resist 12, there is a problem that the soldering area is reduced due to the climb and the soldering tends to be hindered.

【0008】また、高密度化を保ったまま十分なクリア
ランスを得るために部品実装ランド11を小さくすると
リペアー等の取り扱い方法によっては部品実装ランド1
1が基材から剥離するという問題点を有していた。
If the component mounting land 11 is made small in order to obtain a sufficient clearance while maintaining a high density, the component mounting land 1 may be reduced depending on a handling method such as repair.
1 had a problem that it peeled off from the substrate.

【0009】本発明は上記従来の問題点を解決するもの
であり、回路パターンとソルダレジストとの間に多少の
ズレが発生しても十分なはんだ付け面積を確保し良好な
はんだ付けを高い信頼性により行うことが可能なプリン
ト配線板を提供することを目的とする。
The present invention solves the above-mentioned conventional problems. Even if a slight displacement occurs between a circuit pattern and a solder resist, a sufficient soldering area is ensured and good soldering is performed with high reliability. It is an object of the present invention to provide a printed wiring board which can be performed by the property.

【0010】[0010]

【課題を解決するための手段】この目的を達成するため
に本発明のプリント配線板は、回路パターンの部品実装
ランドにおいてソルダレジストを部品実装ランドの周囲
もしくはその一部に乗り上げるように形成した構成を有
している。
In order to achieve this object, a printed wiring board according to the present invention has a structure in which a solder resist is formed on a component mounting land of a circuit pattern so as to ride around the component mounting land or a part thereof. have.

【0011】この構成によれば、回路パターンとソルダ
レジストとの間に多少のズレが発生しても十分なはんだ
付け面積を確保し良好なはんだ付けを高い信頼性により
行うことが可能なプリント配線板が得られる。
[0011] According to this configuration, even if a slight deviation occurs between the circuit pattern and the solder resist, a printed wiring that can secure a sufficient soldering area and perform good soldering with high reliability. A plate is obtained.

【0012】[0012]

【発明の実施の形態】本発明の請求項1に記載した発明
は、回路パターンの部品実装ランドにおいてソルダレジ
ストを部品実装ランドの周囲もしくはその一部に乗り上
げるように形成したものであり、この構成によって、部
品実装ランドはその上に形成されたソルダレジストの除
去部のすべての部分に露出しており、はんだ付け面積は
このソルダレジストの除去部の面積に等しくなる。ソル
ダレジスト形成時に回路パターンに対して多少のズレが
発生しても、そのズレ量を部品実装ランドに対するソル
ダレジストの乗り上げ量に吸収できるように予め設計し
ておけば部品実装ランドの露出部の面積は常に一定に保
たれ、はんだ付け状態も常に一定に保たれる。また、部
品実装ランドはその周囲に乗り上げたソルダレジストに
より基材に対する接着力が補強され基材と部品実装ラン
ドの剥離を防止することができるという作用を有する。
According to a first aspect of the present invention, in a component mounting land of a circuit pattern, a solder resist is formed so as to ride around or part of the component mounting land. As a result, the component mounting land is exposed to all portions of the removed portion of the solder resist formed thereon, and the soldering area is equal to the area of the removed portion of the solder resist. Even if there is some deviation from the circuit pattern during the formation of the solder resist, the area of the exposed part of the component mounting land should be designed in advance so that the amount of deviation can be absorbed by the amount of solder resist riding on the component mounting land. Is always kept constant, and the soldering state is always kept constant. Further, the component mounting land has an effect that the adhesive strength to the base material is reinforced by the solder resist running on the periphery thereof, so that separation of the component mounting land from the base material can be prevented.

【0013】請求項2に記載の発明は、エポキシ樹脂を
含浸した芳香族ポリアミドからなる被圧縮性多孔質基材
に貫通穴を形成し、この貫通穴に導電性ペーストを充填
し、前記多孔質基材の両面に加熱加圧により張り合せた
金属層で形成した回路パターンの部品実装ランドの周囲
もしくはその一部に乗り上げるようにソルダレジストを
形成した構成であり、この構成によって、低誘電率基材
である芳香族ポリアミドによりプリント配線板は低誘電
率化し、また被圧縮多孔質基材に貫通穴を形成し導電性
ペーストを充填した後基材を加熱加圧することでパター
ン配線を高密度化すると同時に従来の弱点であったラン
ド剥離強度を請求項1の作用で述べた理由により向上で
きるという作用を有する。
[0013] According to a second aspect of the present invention, there is provided a porous base material made of an aromatic polyamide impregnated with an epoxy resin, wherein a through-hole is formed, and the through-hole is filled with a conductive paste. A solder resist is formed so as to ride on or around a component mounting land of a circuit pattern formed by a metal layer bonded by heating and pressing on both sides of the base material. The printed wiring board is made to have a low dielectric constant by the aromatic polyamide material, and the pattern wiring is made dense by forming a through hole in the compressed porous substrate, filling the conductive paste, and then heating and pressing the substrate. At the same time, there is an effect that the land peel strength, which is a conventional weak point, can be improved for the reason described in the function of claim 1.

【0014】請求項3に記載の発明は、部品実装ランド
の直下に導電性ペーストによるビアを形成した請求項1
または請求項2に記載のプリント配線板としたものであ
り、この構成によって、部品実装ランドの直下にビアを
形成することで余分な回路パターンの引き回しを行う必
要がなく配線密度を大幅に向上するとともに、更にラン
ド剥離強度も同時に向上できるという作用を有する。
According to a third aspect of the present invention, a via made of a conductive paste is formed immediately below a component mounting land.
Alternatively, the printed wiring board according to claim 2 is formed, and with this configuration, it is not necessary to route extra circuit patterns by forming vias directly below the component mounting lands, thereby greatly improving the wiring density. In addition, it has the effect that the land peel strength can be further improved at the same time.

【0015】以下本発明の実施の形態について、図1及
び図2を用いて説明する。図1(a)〜(c)は本発明
の実施の形態におけるプリント配線板を示す図であり、
図2は本発明の実施の形態におけるプリント配線板の断
面図である。図1(a)〜(c)及び図2において、部
品実装ランド1の周囲にソルダレジスト2は乗り上げて
おり、このことにより両者の間に多少のズレが発生して
もこの乗り上げ量の中に吸収でき部品実装ランド1の露
出量は常に一定に保たれ、同時に部品実装ランド1をそ
の周囲に乗り上げたソルダレジスト2により補強するこ
とができるという作用を有する。
An embodiment of the present invention will be described below with reference to FIGS. FIGS. 1A to 1C are views showing a printed wiring board according to an embodiment of the present invention.
FIG. 2 is a sectional view of the printed wiring board according to the embodiment of the present invention. 1 (a) to 1 (c) and FIG. 2, the solder resist 2 runs around the component mounting land 1, so that even if a slight displacement occurs between the two, the solder resist 2 does not fall within this running amount. This has the effect that the amount of exposure of the component mounting land 1 can be absorbed and kept constant, and at the same time, the component mounting land 1 can be reinforced by the solder resist 2 running around it.

【0016】次に、本発明の具体例を説明する。図1
(a)〜(c)及び図2において、1は部品実装ラン
ド、2はソルダレジスト、3はビア、4は基材、5は回
路パターンである。
Next, a specific example of the present invention will be described. FIG.
2 (a) to 2 (c) and FIG. 2, 1 is a component mounting land, 2 is a solder resist, 3 is a via, 4 is a base material, and 5 is a circuit pattern.

【0017】以上のように構成されたプリント配線板に
ついて、以下その動作を説明する。図1(a)〜(c)
に示したように、部品実装ランド1は必要な所定の実装
面積よりも大きいものを形成し、そしてこの部品実装ラ
ンド1上に所定の実装面積になるようにソルダレジスト
2を除去することで所定の実装面積分だけ部品実装ラン
ド1を露出することができる。その結果、部品実装ラン
ド1の全周囲または一部にソルダレジスト2は乗り上げ
ており、このことにより両者の間に多少のズレが発生し
てもこの乗り上げ量の中に吸収でき部品実装ランド1の
露出量は常に一定に保たれる。同時に部品実装ランド1
をその周囲に乗り上げたソルダレジスト2により補強す
ることができ基材4と部品実装ランド1の剥離強度を向
上することができる。
The operation of the printed wiring board configured as described above will be described below. 1 (a) to 1 (c)
As shown in the figure, the component mounting land 1 is formed larger than a required predetermined mounting area, and the solder resist 2 is removed on the component mounting land 1 so as to have a predetermined mounting area. The component mounting land 1 can be exposed by an amount corresponding to the mounting area. As a result, the solder resist 2 runs over the entire periphery or a part of the component mounting land 1, so that even if a slight displacement occurs between the two, the solder resist 2 can be absorbed in the amount of running up and the component mounting land 1 can be absorbed. The exposure is always kept constant. At the same time, component mounting land 1
Can be reinforced by the solder resist 2 riding on the periphery thereof, and the peel strength between the base material 4 and the component mounting land 1 can be improved.

【0018】また、図2に示したように、基材4にエポ
キシ樹脂を含浸した芳香族ポリアミドからなる被圧縮性
多孔質基材低誘電率基材である芳香族ポリアミドを用
い、これに貫通穴を形成し導電性ペーストを充填した
後、基材4を加熱加圧することでビア3を形成し、その
後回路パターン5を形成することを繰り返すことにより
スルーホールを必要とすることなく任意の層間だけ電気
的に接続でき配線を高密度化すると同時に、部品実装ラ
ンド1の周囲にソルダレジスト2を乗り上げることによ
り従来の弱点であったランド剥離強度を前記理由により
向上できる。
As shown in FIG. 2, a compressible porous base material made of an aromatic polyamide impregnated with an epoxy resin is used as a base material 4, and an aromatic polyamide as a low dielectric constant base material is used. After forming a hole and filling the conductive paste, the substrate 3 is heated and pressed to form the via 3, and then the circuit pattern 5 is repeatedly formed, so that an arbitrary interlayer can be formed without requiring a through hole. Only the electrical connection can be made, the wiring density can be increased, and at the same time, the land peeling strength, which is a conventional weak point, can be improved by running the solder resist 2 around the component mounting land 1 for the above-mentioned reason.

【0019】更に部品実装ランド1の直下にビア3を形
成することで部品実装ランド1から回路パターンにより
他の部分へ引き回すことなく他の層へ電気接続すること
ができ、配線を極端に高密度化することが可能となり、
同時にここでも部品実装ランド1の周囲にソルダレジス
ト2を乗り上げることにより従来の弱点であったランド
剥離強度を前記理由により向上できる。
Further, by forming the via 3 immediately below the component mounting land 1, it is possible to electrically connect from the component mounting land 1 to another layer by a circuit pattern without being routed to another portion. It becomes possible to
At the same time, by mounting the solder resist 2 around the component mounting land 1, the land peeling strength, which has been a weak point in the related art, can be improved for the above-mentioned reason.

【0020】以上のように本実施の形態によれば、部品
実装ランド1の周囲にソルダレジスト2を乗り上げるこ
とにより両者の間に多少のズレが発生してもこの乗り上
げ量の中に吸収することで部品実装ランド1の露出量は
常に一定に保たれ、同時に部品実装ランド1をその周囲
に乗り上げたソルダレジスト2により補強することで基
材4と部品実装ランド1の剥離強度を向上することがで
き、良好なはんだ付けを高い信頼性で行うことが可能な
プリント配線板を提供することができる。
As described above, according to the present embodiment, if the solder resist 2 runs around the component mounting land 1, even if a slight gap occurs between the two, the solder resist 2 absorbs the difference in the running amount. Thus, the exposure amount of the component mounting land 1 is always kept constant, and at the same time, the peel strength between the base material 4 and the component mounting land 1 can be improved by reinforcing the component mounting land 1 with the solder resist 2 running around the periphery. It is possible to provide a printed wiring board capable of performing good soldering with high reliability.

【0021】なお、本発明の実施の形態において部品実
装ランド1の形状及びソルダレジスト2の除去部の形状
は円形、四角形としたがその他の形状及びそれらの組み
合わせとしてもよい。
In the embodiment of the present invention, the shape of the component mounting land 1 and the shape of the removed portion of the solder resist 2 are circular or square, but may be other shapes or a combination thereof.

【0022】[0022]

【発明の効果】以上のように本発明は、部品実装ランド
の周囲にソルダレジストを乗り上げることにより両者の
間に多少のズレが発生してもこの乗り上げ量の中に吸収
することで部品実装ランドの露出量は常に一定に保た
れ、同時に部品実装ランドをその周囲に乗り上げたソル
ダレジストにより補強することで基材と部品実装ランド
の剥離強度を向上することができ、良好なはんだ付けを
高い信頼性で行うことが可能なプリント配線板を実現で
きるものである。
As described above, according to the present invention, by mounting the solder resist around the component mounting land, even if a slight deviation occurs between the two, the difference is absorbed in the running amount, and the component mounting land is absorbed. The amount of exposure is always kept constant, and at the same time, the peel strength between the base material and the component mounting land can be improved by reinforcing the component mounting land with the solder resist running around it, and high reliability of good soldering This makes it possible to realize a printed wiring board that can be performed with high flexibility.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(a)〜(c)本発明の実施の形態におけるプ
リント配線板を示す図
FIGS. 1A to 1C show a printed wiring board according to an embodiment of the present invention.

【図2】本発明の実施の形態におけるプリント配線板の
断面図
FIG. 2 is a sectional view of the printed wiring board according to the embodiment of the present invention.

【図3】(a)〜(b) 従来のプリント配線板を示す
FIGS. 3A and 3B show a conventional printed wiring board.

【符号の説明】[Explanation of symbols]

1 部品実装ランド 2 ソルダレジスト 3 ビア 4 基材 5 回路パターン DESCRIPTION OF SYMBOLS 1 Component mounting land 2 Solder resist 3 Via 4 Base material 5 Circuit pattern

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 回路パターンの部品実装ランドにおいて
ソルダレジストを部品実装ランドの周囲もしくはその一
部に乗り上げるように形成したプリント配線板。
1. A printed wiring board wherein a solder resist is formed on a component mounting land of a circuit pattern so as to ride around or part of the component mounting land.
【請求項2】 エポキシ樹脂を含浸した芳香族ポリアミ
ドからなる被圧縮性多孔質基材に貫通穴を形成し、この
貫通穴に導電性ペーストを充填し、前記多孔質基材の両
面に加熱加圧して張り合せた金属層により形成した回路
パターンの部品実装ランドの周囲もしくはその一部に乗
り上げるように形成したソルダレジストを有する請求項
1に記載のプリント配線板。
2. A through hole is formed in a compressible porous substrate made of an aromatic polyamide impregnated with an epoxy resin, a conductive paste is filled in the through hole, and heat is applied to both surfaces of the porous substrate. 2. The printed wiring board according to claim 1, further comprising a solder resist formed so as to ride around or part of a component mounting land of a circuit pattern formed by the metal layer pressed and bonded.
【請求項3】 部品実装ランドの直下に導電性ペースト
によるビアを形成した請求項1または請求項2に記載の
プリント配線板。
3. The printed wiring board according to claim 1, wherein a via made of a conductive paste is formed immediately below the component mounting land.
JP30686897A 1997-11-10 1997-11-10 Printed wiring board Expired - Fee Related JP3440786B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30686897A JP3440786B2 (en) 1997-11-10 1997-11-10 Printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30686897A JP3440786B2 (en) 1997-11-10 1997-11-10 Printed wiring board

Publications (2)

Publication Number Publication Date
JPH11145605A true JPH11145605A (en) 1999-05-28
JP3440786B2 JP3440786B2 (en) 2003-08-25

Family

ID=17962225

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30686897A Expired - Fee Related JP3440786B2 (en) 1997-11-10 1997-11-10 Printed wiring board

Country Status (1)

Country Link
JP (1) JP3440786B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100346679C (en) * 2000-12-08 2007-10-31 日本电气株式会社 Circuit board, electronic equipment using the circuit board and method of sorting circuit board
CN100423621C (en) * 2001-03-07 2008-10-01 索尼株式会社 Land portion of printed wiring board, method for manufacturnig printed wiring board, and printed wiring board mounting method
WO2011089747A1 (en) * 2010-01-25 2011-07-28 株式会社村田製作所 Electronic module and communication equipment
JP2020057725A (en) * 2018-10-03 2020-04-09 キヤノン株式会社 Printed circuit board and electronic apparatus

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100346679C (en) * 2000-12-08 2007-10-31 日本电气株式会社 Circuit board, electronic equipment using the circuit board and method of sorting circuit board
CN100423621C (en) * 2001-03-07 2008-10-01 索尼株式会社 Land portion of printed wiring board, method for manufacturnig printed wiring board, and printed wiring board mounting method
WO2011089747A1 (en) * 2010-01-25 2011-07-28 株式会社村田製作所 Electronic module and communication equipment
US8797759B2 (en) 2010-01-25 2014-08-05 Murata Manufacturing Co., Ltd. Electronic module and communication apparatus
JP2020057725A (en) * 2018-10-03 2020-04-09 キヤノン株式会社 Printed circuit board and electronic apparatus

Also Published As

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