JPH0587137B2 - - Google Patents

Info

Publication number
JPH0587137B2
JPH0587137B2 JP61169223A JP16922386A JPH0587137B2 JP H0587137 B2 JPH0587137 B2 JP H0587137B2 JP 61169223 A JP61169223 A JP 61169223A JP 16922386 A JP16922386 A JP 16922386A JP H0587137 B2 JPH0587137 B2 JP H0587137B2
Authority
JP
Japan
Prior art keywords
gate electrode
wiring
layer
forming
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP61169223A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6325976A (ja
Inventor
Minoru Taguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP61169223A priority Critical patent/JPS6325976A/ja
Publication of JPS6325976A publication Critical patent/JPS6325976A/ja
Publication of JPH0587137B2 publication Critical patent/JPH0587137B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/611—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using diodes as protective elements
JP61169223A 1986-07-18 1986-07-18 半導体装置の製造方法 Granted JPS6325976A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61169223A JPS6325976A (ja) 1986-07-18 1986-07-18 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61169223A JPS6325976A (ja) 1986-07-18 1986-07-18 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS6325976A JPS6325976A (ja) 1988-02-03
JPH0587137B2 true JPH0587137B2 (instruction) 1993-12-15

Family

ID=15882501

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61169223A Granted JPS6325976A (ja) 1986-07-18 1986-07-18 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS6325976A (instruction)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2753058B2 (ja) * 1989-07-27 1998-05-18 株式会社東芝 半導体装置の製造方法
JP2838836B2 (ja) * 1990-04-26 1998-12-16 富士通株式会社 半導体集積回路及び半導体集積回路装置
JPH104092A (ja) * 1996-06-14 1998-01-06 Nec Corp 半導体装置の製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6020548A (ja) * 1983-07-15 1985-02-01 Hitachi Ltd 集積回路における入力保護装置
JPS6037160A (ja) * 1983-08-08 1985-02-26 Nec Corp 半導体集積回路装置

Also Published As

Publication number Publication date
JPS6325976A (ja) 1988-02-03

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees