JPH0586864B2 - - Google Patents

Info

Publication number
JPH0586864B2
JPH0586864B2 JP60144563A JP14456385A JPH0586864B2 JP H0586864 B2 JPH0586864 B2 JP H0586864B2 JP 60144563 A JP60144563 A JP 60144563A JP 14456385 A JP14456385 A JP 14456385A JP H0586864 B2 JPH0586864 B2 JP H0586864B2
Authority
JP
Japan
Prior art keywords
voltage
drain
gate
semiconductor layer
mos transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60144563A
Other languages
English (en)
Japanese (ja)
Other versions
JPS627149A (ja
Inventor
Koichi Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP60144563A priority Critical patent/JPS627149A/ja
Publication of JPS627149A publication Critical patent/JPS627149A/ja
Publication of JPH0586864B2 publication Critical patent/JPH0586864B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices

Landscapes

  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
JP60144563A 1985-07-03 1985-07-03 半導体装置における書込み、読出し方法 Granted JPS627149A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60144563A JPS627149A (ja) 1985-07-03 1985-07-03 半導体装置における書込み、読出し方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60144563A JPS627149A (ja) 1985-07-03 1985-07-03 半導体装置における書込み、読出し方法

Publications (2)

Publication Number Publication Date
JPS627149A JPS627149A (ja) 1987-01-14
JPH0586864B2 true JPH0586864B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-12-14

Family

ID=15365153

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60144563A Granted JPS627149A (ja) 1985-07-03 1985-07-03 半導体装置における書込み、読出し方法

Country Status (1)

Country Link
JP (1) JPS627149A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI230392B (en) 2001-06-18 2005-04-01 Innovative Silicon Sa Semiconductor device
JP3808763B2 (ja) 2001-12-14 2006-08-16 株式会社東芝 半導体メモリ装置およびその製造方法
EP1357603A3 (en) 2002-04-18 2004-01-14 Innovative Silicon SA Semiconductor device
US7476939B2 (en) 2004-11-04 2009-01-13 Innovative Silicon Isi Sa Memory cell having an electrically floating body transistor and programming technique therefor
US7301838B2 (en) 2004-12-13 2007-11-27 Innovative Silicon S.A. Sense amplifier circuitry and architecture to write data into and/or read from memory cells
US7301803B2 (en) 2004-12-22 2007-11-27 Innovative Silicon S.A. Bipolar reading technique for a memory cell having an electrically floating body transistor
US7606066B2 (en) 2005-09-07 2009-10-20 Innovative Silicon Isi Sa Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same
US7542345B2 (en) 2006-02-16 2009-06-02 Innovative Silicon Isi Sa Multi-bit memory cell having electrically floating body transistor, and method of programming and reading same
US7492632B2 (en) 2006-04-07 2009-02-17 Innovative Silicon Isi Sa Memory array having a programmable word length, and method of operating same
JP4406413B2 (ja) 2006-04-18 2010-01-27 株式会社東芝 半導体記憶装置及びその読み出し方法
US7542340B2 (en) 2006-07-11 2009-06-02 Innovative Silicon Isi Sa Integrated circuit including memory array having a segmented bit line architecture and method of controlling and/or operating same
JP4498323B2 (ja) * 2006-07-14 2010-07-07 株式会社東芝 半導体記憶装置
US8536628B2 (en) 2007-11-29 2013-09-17 Micron Technology, Inc. Integrated circuit having memory cell array including barriers, and method of manufacturing same
US9076543B2 (en) 2009-07-27 2015-07-07 Micron Technology, Inc. Techniques for providing a direct injection semiconductor memory device
US8174881B2 (en) 2009-11-24 2012-05-08 Micron Technology, Inc. Techniques for reducing disturbance in a semiconductor device
US9559216B2 (en) 2011-06-06 2017-01-31 Micron Technology, Inc. Semiconductor memory device and method for biasing same

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6040710B2 (ja) * 1978-11-14 1985-09-12 富士通株式会社 半導体記憶装置
JPS55113364A (en) * 1979-02-22 1980-09-01 Fujitsu Ltd Semiconductor integrated circuit device
JPS56144574A (en) * 1980-04-11 1981-11-10 Fujitsu Ltd Production of semiconductor device

Also Published As

Publication number Publication date
JPS627149A (ja) 1987-01-14

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term