JPH0586571B2 - - Google Patents

Info

Publication number
JPH0586571B2
JPH0586571B2 JP61256054A JP25605486A JPH0586571B2 JP H0586571 B2 JPH0586571 B2 JP H0586571B2 JP 61256054 A JP61256054 A JP 61256054A JP 25605486 A JP25605486 A JP 25605486A JP H0586571 B2 JPH0586571 B2 JP H0586571B2
Authority
JP
Japan
Prior art keywords
bank
request
busy
cycle time
banks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61256054A
Other languages
English (en)
Japanese (ja)
Other versions
JPS63109566A (ja
Inventor
Akira Jitsuho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP25605486A priority Critical patent/JPS63109566A/ja
Publication of JPS63109566A publication Critical patent/JPS63109566A/ja
Publication of JPH0586571B2 publication Critical patent/JPH0586571B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP25605486A 1986-10-28 1986-10-28 主記憶アクセス制御方式 Granted JPS63109566A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25605486A JPS63109566A (ja) 1986-10-28 1986-10-28 主記憶アクセス制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25605486A JPS63109566A (ja) 1986-10-28 1986-10-28 主記憶アクセス制御方式

Publications (2)

Publication Number Publication Date
JPS63109566A JPS63109566A (ja) 1988-05-14
JPH0586571B2 true JPH0586571B2 (cs) 1993-12-13

Family

ID=17287261

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25605486A Granted JPS63109566A (ja) 1986-10-28 1986-10-28 主記憶アクセス制御方式

Country Status (1)

Country Link
JP (1) JPS63109566A (cs)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0740241B2 (ja) * 1989-01-17 1995-05-01 富士通株式会社 リクエストキャンセル方式
JPH0475160A (ja) * 1990-07-17 1992-03-10 Gijutsu Kenkyu Kumiai Kokusai Fuajii Kogaku Kenkyusho データ処理装置
JP4496001B2 (ja) * 2004-04-15 2010-07-07 本田技研工業株式会社 データ通信装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57101957A (en) * 1980-12-17 1982-06-24 Hitachi Ltd Storage control device

Also Published As

Publication number Publication date
JPS63109566A (ja) 1988-05-14

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