JPH0555401A - プリント配線基板 - Google Patents

プリント配線基板

Info

Publication number
JPH0555401A
JPH0555401A JP3074134A JP7413491A JPH0555401A JP H0555401 A JPH0555401 A JP H0555401A JP 3074134 A JP3074134 A JP 3074134A JP 7413491 A JP7413491 A JP 7413491A JP H0555401 A JPH0555401 A JP H0555401A
Authority
JP
Japan
Prior art keywords
recess
plating layer
hole
printed wiring
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3074134A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0563941B2 (enrdf_load_stackoverflow
Inventor
Hiromi Ogawa
弘海 小川
Osamu Fujikawa
治 藤川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP57178663A external-priority patent/JPS5967686A/ja
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP3074134A priority Critical patent/JPH0555401A/ja
Publication of JPH0555401A publication Critical patent/JPH0555401A/ja
Publication of JPH0563941B2 publication Critical patent/JPH0563941B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Structure Of Printed Boards (AREA)
JP3074134A 1982-10-12 1991-03-13 プリント配線基板 Granted JPH0555401A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3074134A JPH0555401A (ja) 1982-10-12 1991-03-13 プリント配線基板

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP57178663A JPS5967686A (ja) 1982-10-12 1982-10-12 プリント配線基板とその製造方法
JP3074134A JPH0555401A (ja) 1982-10-12 1991-03-13 プリント配線基板

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP57178663A Division JPS5967686A (ja) 1982-10-12 1982-10-12 プリント配線基板とその製造方法

Publications (2)

Publication Number Publication Date
JPH0555401A true JPH0555401A (ja) 1993-03-05
JPH0563941B2 JPH0563941B2 (enrdf_load_stackoverflow) 1993-09-13

Family

ID=26415269

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3074134A Granted JPH0555401A (ja) 1982-10-12 1991-03-13 プリント配線基板

Country Status (1)

Country Link
JP (1) JPH0555401A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7098571B2 (en) 2000-02-03 2006-08-29 Calient Networks, Inc. Electrostatic actuator for microelectromechanical systems and methods of fabrication
JP2007096187A (ja) * 2005-09-30 2007-04-12 Sanyo Electric Co Ltd 回路基板および回路基板の製造方法
US7728339B1 (en) 2002-05-03 2010-06-01 Calient Networks, Inc. Boundary isolation for microelectromechanical devices
US7737368B2 (en) 2005-09-30 2010-06-15 Sanyo Electric Co., Ltd. Circuit board and method of manufacturing circuit board

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7098571B2 (en) 2000-02-03 2006-08-29 Calient Networks, Inc. Electrostatic actuator for microelectromechanical systems and methods of fabrication
US7261826B2 (en) 2000-02-03 2007-08-28 Calient Networks, Inc. Electrostatic actuator for microelectromechanical systems and methods of fabrication
US7728339B1 (en) 2002-05-03 2010-06-01 Calient Networks, Inc. Boundary isolation for microelectromechanical devices
JP2007096187A (ja) * 2005-09-30 2007-04-12 Sanyo Electric Co Ltd 回路基板および回路基板の製造方法
US7737368B2 (en) 2005-09-30 2010-06-15 Sanyo Electric Co., Ltd. Circuit board and method of manufacturing circuit board

Also Published As

Publication number Publication date
JPH0563941B2 (enrdf_load_stackoverflow) 1993-09-13

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