JPH0550870B2 - - Google Patents

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Publication number
JPH0550870B2
JPH0550870B2 JP59181098A JP18109884A JPH0550870B2 JP H0550870 B2 JPH0550870 B2 JP H0550870B2 JP 59181098 A JP59181098 A JP 59181098A JP 18109884 A JP18109884 A JP 18109884A JP H0550870 B2 JPH0550870 B2 JP H0550870B2
Authority
JP
Japan
Prior art keywords
semiconductor
light
electrode
present
laser
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59181098A
Other languages
Japanese (ja)
Other versions
JPS6158278A (en
Inventor
Shunpei Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP59181098A priority Critical patent/JPS6158278A/en
Publication of JPS6158278A publication Critical patent/JPS6158278A/en
Publication of JPH0550870B2 publication Critical patent/JPH0550870B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042PV modules or arrays of single PV cells
    • H01L31/0445PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
    • H01L31/046PV modules composed of a plurality of thin film solar cells deposited on the same substrate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Description

【発明の詳細な説明】 「発明の利用分野」 この発明は、水素またはハロゲン元素が添加さ
れたPIN接合を有するアモルフアス半導体を含む
非単結晶半導体を絶縁表面を有する基板に設けた
光電変換素子(単に素子という)を複数個電気的
に直列接合をした高い電圧の発生の可能な光電変
換装置の作製方法に関する。
Detailed Description of the Invention "Field of Application of the Invention" The present invention relates to a photoelectric conversion element ( The present invention relates to a method for manufacturing a photoelectric conversion device capable of generating a high voltage by electrically connecting a plurality of elements (simply referred to as elements) in series.

「従来の技術」 従来、水素またはハロゲン元素が添加された非
単結晶半導体としてアモルフアス半導体が知られ
ている。しかし、かかる半導体はアモルフアス構
造を有し、結晶性を積極的に用いていないため、
PIN接合におけるI型半導体層のキヤリアの空乏
層が0.3μ以上と狭く、またAM1(100mW/cm2
での光照射に対し劣化が生じてしまつた。
"Prior Art" Conventionally, amorphous semiconductors are known as non-single crystal semiconductors to which hydrogen or halogen elements are added. However, since such semiconductors have an amorphous structure and do not actively use crystallinity,
The carrier depletion layer of the I-type semiconductor layer in the PIN junction is as narrow as 0.3 μ or more, and the AM1 (100 mW/cm 2 )
Deterioration occurred due to light irradiation.

「本発明が解決しようとする問題点」 本発明は、かかるアモルフアス半導体を含む非
単結晶半導体に対し、活性半導体領域での結晶化
を助長せしめ、光照射に対する劣化を防ぎ、かつ
PIN接合を有する光電変換装置にあつては、I型
半導体への空乏層を1μ以上と大きく巾広にする
ことを特徴としている。
"Problems to be Solved by the Present Invention" The present invention promotes crystallization in the active semiconductor region of a non-single crystal semiconductor including such an amorphous semiconductor, prevents deterioration due to light irradiation, and
A photoelectric conversion device having a PIN junction is characterized in that the depletion layer to the I-type semiconductor is made large and wide, with a width of 1 μ or more.

さらに連結部を構成する非活性半導体領域はア
モルフアス半導体の高抵抗とし、この非活性領域
での電極間リークを防ぐものである。
Furthermore, the non-active semiconductor region constituting the connecting portion is made of amorphous semiconductor with high resistance to prevent leakage between electrodes in this non-active region.

「問題を解決しようとする手段」 本発明は透光性電極側よりこの電極を透過して
内部の非単結晶半導体に対し、500nm以上の波
長をバルス状の強光(パルス巾10〜100n秒)を
照射して、I型半導体層およびそれに近接したP
またはN型半導体層を水素またはハロゲン元素を
内部に保持しつつ結晶性を促しめるものである。
"Means to Solve the Problem" The present invention transmits a pulse of strong light (pulse width 10 to 100 ns) with a wavelength of 500 nm or more from the transparent electrode side to the non-single crystal semiconductor inside the electrode. ) to irradiate the I-type semiconductor layer and P close to it.
Alternatively, crystallinity can be promoted while holding hydrogen or a halogen element inside the N-type semiconductor layer.

特に本発明は、その光吸収が小さい500nm以
上一般には0.5〜2μ例えば0.53μまたは1.06μの
YAGレーザのパルス状の強光を照射し、全体ま
たは内部の十分深い領域までのI型半導体の結晶
性を促進させる、いわゆる光アニールを行つた。
このため、光は半導体の光吸収係数の比較的少な
い500nm以上の波長を用いた。
In particular, the present invention has a low light absorption of 500 nm or more, generally 0.5 to 2μ, for example 0.53μ or 1.06μ.
So-called optical annealing was performed by irradiating strong pulsed light from a YAG laser to promote the crystallinity of the I-type semiconductor as a whole or to a sufficiently deep region inside.
For this reason, a wavelength of 500 nm or more was used for light, where the light absorption coefficient of semiconductors is relatively small.

本発明は、この光アニールにより、同時に伴う
電気伝導度の増加が集積化構造にあつてアイソレ
イシヨンの妨げになつてはならない。このため本
発明方法においては、この光アニールを活性半導
体領域のみに対して行つた。さらにこの光アニー
ルと同時またはその後、この導電膜およびその下
の非活性領域に連結部を構成するため、非単結晶
半導体をレーザ光(Qスイツチ)がかけれらた
YAGレーザ光によりスクライブし、除去したも
のである。
In the present invention, the accompanying increase in electrical conductivity caused by this optical annealing must not impede isolation in an integrated structure. Therefore, in the method of the present invention, this photoannealing was performed only on the active semiconductor region. Furthermore, at the same time as or after this optical annealing, a laser beam (Q switch) is applied to the non-single crystal semiconductor in order to form a connection part in this conductive film and the inactive region below it.
It was scribed and removed using a YAG laser beam.

「作用」 その結果、レーザアニールにより得られる結晶
化助長領域は、各セル間のアイソレイシヨン領域
には何等行わないため、集積化光電変換装置の製
造に他の余分の工程を伴わずに完了させることが
できるという特長を有する。
"Effect" As a result, the crystallization promoting region obtained by laser annealing does not do anything to the isolation region between each cell, so manufacturing of the integrated photoelectric conversion device is completed without any other extra steps. It has the advantage of being able to

本発明の装置における素子の配置、大きい、形
状は設計仕様によつて決められる。しかし本発明
の内容を簡単にするため、以下の詳細は説明にお
いては、第1の素子の下側(基板側)の第1の電
極と、その右隣りに配置した第2の素子の第2の
電極(半導体上即ち基板から離れた側)とを電気
的に直列接続させた場合のパターンを基として記
す。
The arrangement, size, and shape of the elements in the device of the present invention are determined by design specifications. However, in order to simplify the content of the present invention, the following details will be explained with reference to the first electrode on the lower side (substrate side) of the first element and the second electrode of the second element disposed on the right side thereof. The pattern is based on the case where the electrodes (on the semiconductor, that is, on the side away from the substrate) are electrically connected in series.

そしてこの規定された位置にLS用のレーザ光、
例えば波長1.06μ(光径約50μ)または0.53μ(光径
約25μ)とYAGレーザ(焦点距離40nm)を照射
させる。
Then, the laser beam for LS is placed at this specified position.
For example, a YAG laser (focal length 40 nm) with a wavelength of 1.06μ (light diameter approximately 50μ) or 0.53μ (light diameter approximately 25μ) is irradiated.

さらにそれを0.05〜5m/分例えば30cm/分の
操作速度で移動せしめ、前工程と従属関係の開溝
を作製せしめる。
Further, it is moved at an operating speed of 0.05 to 5 m/min, for example, 30 cm/min, to create an open groove in a dependent relationship with the previous process.

本発明は、基板が透光性のガラスである場合、
また、非透光性基板上に半導体を形成し、その上
面の光照射に対し500nm以上のレーザ光アニー
ル(エネルギ密度は1×104〜1×106W/cm2であ
りレーザスクライプの際のエネルギ密度の5×
106〜5×107W/cm2より1/10〜1/103である)を
行つたもので、製造工程を増加させることなしに
歩留りを従来の約60%より87%にまで高めること
ができるという画期的な光電変換装置の作製方法
を提供することにある。
In the present invention, when the substrate is made of translucent glass,
In addition, a semiconductor is formed on a non-transparent substrate, and the upper surface is annealed with a laser beam of 500 nm or more (the energy density is 1 × 10 4 to 1 × 10 6 W/cm 2 , and the laser scribe is 5× of the actual energy density
10 6 - 5 × 10 7 W/cm 2 ), which increases the yield from about 60% to 87 % without increasing the manufacturing process. An object of the present invention is to provide a method for manufacturing an epoch-making photoelectric conversion device.

以下に図面に従つて本発明の詳細を示す。 The details of the invention are shown below with reference to the drawings.

実施例 1 第1図は本発明の製造工程を示す縦断面図であ
る。
Example 1 FIG. 1 is a longitudinal sectional view showing the manufacturing process of the present invention.

図面において、絶縁表面を有する基板例えばガ
ラス基板1であつて、長さ(図面では左右方向)
10cm、巾10cmを用いた。さらにこの上面に、全面
にわたつて第1の導電膜2、透光性導電膜2を
0.1〜0.5μの厚さに形成させた。
In the drawing, a substrate having an insulating surface, such as a glass substrate 1, is shown with a length (in the left-right direction in the drawing).
A size of 10 cm and a width of 10 cm was used. Further, on this upper surface, a first conductive film 2 and a transparent conductive film 2 are applied over the entire surface.
It was formed to a thickness of 0.1 to 0.5μ.

この透光性導電膜2として弗素等のハロゲン元
素が添加された酸化スズを主成分とする透光性導
電膜またはITO(酸化スズ・インジユーム)(500
〜5000Å代表的には500〜1500Å)をスパツタ法
またはスプレー法により形成させて、第1の導電
膜とした。
This transparent conductive film 2 is a transparent conductive film whose main component is tin oxide to which a halogen element such as fluorine is added, or ITO (indium tin oxide) (500
~5000 Å (typically 500 to 1500 Å) was formed by sputtering or spraying to form the first conductive film.

この後、この基板の上側より、YAGレーザ
(波長0.53μ(パルス巾30n秒)加工機(日本電気
製)により平均出力0.3〜3W(焦点距離40mm)を
加え、直径5mmφのレーザ光を集光し、スポツト
径20〜70μφ代表的には40μφをマイクロコンピユ
ータにより制御して、上方よりレーザ光を照射
し、その走査により、スクライブライン用の第1
の開溝13を形成させ、各活性素子領域31,1
1に第1の電極15をレーザスクライブ(LSと
いう)により作製した。
After that, an average output of 0.3 to 3 W (focal length 40 mm) is applied from the top of this substrate using a YAG laser (wavelength 0.53 μ (pulse width 30 ns) processing machine (manufactured by NEC Corporation)), and a laser beam with a diameter of 5 mmφ is focused. The spot diameter is 20 to 70μφ, typically 40μφ, and is controlled by a microcomputer to irradiate the laser beam from above, and by scanning, the first spot for the scribe line is
to form an open groove 13 in each active element region 31,1.
1, a first electrode 15 was produced by laser scribing (referred to as LS).

LSにより形成された開溝13は、巾約50μ長さ
10cmであり、深さはそれぞれ第1の電極を構成さ
せるために完全に切断分離した。
The open groove 13 formed by LS is approximately 50μ in width and length.
The length was 10 cm, and the depth was completely cut and separated to form the first electrode.

かくして第1の素子31および第2の素子11
を構成する領域の巾は5〜40mm例えば10mmとして
形成させた。
Thus, the first element 31 and the second element 11
The width of the area constituting the area is 5 to 40 mm, for example 10 mm.

この後、この上面にプラズマCVD法、フオト
CVD法またはLPCVD法により、光照射により光
起電力を発生する非単結晶半導体即ちPIN接合を
有する8素またはハロゲン元素が添加された非単
結晶半導体層3をI型半導体中の平均酸素濃度を
5×1018cm-3以下とし、かつその厚さを0.3〜3.0μ
代表的には1.5μの厚さに形成させた。
After this, plasma CVD method is applied to this top surface.
A non-single-crystal semiconductor layer 3 doped with an octa-element or a halogen element that has a PIN junction, that is, a non-single-crystal semiconductor that generates photovoltaic force when irradiated with light, is heated by CVD or LPCVD to reduce the average oxygen concentration in the I-type semiconductor. 5×10 18 cm -3 or less, and the thickness is 0.3 to 3.0μ
Typically, it was formed to a thickness of 1.5μ.

その代表例は光照射が起板側からの場合である
ため、P型(SixC1-X0<X<1)半導体(約
200Å)−I型アモルフアスまたはセルアモルフア
スのシリコン半導体(約1.5μ)−N型の微結晶
(約500Å)を有する半導体よりなる1つのPIN接
合を有する非単結晶半導体3を全面にわたつて均
一の膜厚で形成させた。
A typical example is when light irradiation is from the plate-raising side, so P-type (SixC 1-X 0<X<1) semiconductor (approximately
200 Å) - I-type amorphous or cell-amorphous silicon semiconductor (approximately 1.5 μ) - N-type microcrystalline (approximately 500 Å) non-single crystal semiconductor 3 having one PIN junction is uniformly distributed over the entire surface. It was formed with a film thickness of .

さらに第1図Bに示されるごとく、第1の開溝
13の左方向側(第1の素子側)にわたつて第2
の開溝14を第2のLS工程により形成させた。
Furthermore, as shown in FIG.
The open groove 14 was formed by the second LS process.

この図面では第1および第2の開溝13,14
の中心間100μずらしている。
In this drawing, the first and second open grooves 13, 14
The centers of the two are shifted by 100μ.

かくして第2の開溝18は第1の電極の側面
8,9を露出させた。
The second open groove 18 thus exposed the side surfaces 8, 9 of the first electrode.

さらに本発明は、第1の電極2の透光性導電膜
15の表面のみを露呈させてもよいが、製造歩留
りの向上のためにはレーザ光が0.1〜1W例えば
0.8Wでは多少強すぎ、この第1の電極15の深
さ方向のすべてを除去した。しかし、その側面8
(側面のみまたは側面と上面の端部)に第1図C
で第2の電極38とのコネクタ30が密接しても
その接触抵抗が一般に酸化物−酸化物コンタクト
(酸化スズ−ITOコンタクト)となり、この界面
に絶縁物バリアが形成されないため、実用上何等
問題はなかつた。
Furthermore, in the present invention, only the surface of the transparent conductive film 15 of the first electrode 2 may be exposed;
0.8W was a little too strong, and the entire depth of this first electrode 15 was removed. However, that aspect 8
(side side only or side and top edge) Fig. 1C
Even if the connector 30 and the second electrode 38 are brought into close contact with each other, the contact resistance is generally an oxide-oxide contact (tin oxide-ITO contact), and no insulating barrier is formed at this interface, so there is no practical problem. I stopped talking.

第1図において、さらにこの上面に第1図Cに
示されるごとく、表面の第2の導電膜5およびコ
ネクタ30を形成した。
In FIG. 1, a second surface conductive film 5 and a connector 30 were further formed on this upper surface as shown in FIG. 1C.

さらに本発明方法における500nm以上の波長
(一般には500nmまたは1.06μ)を発光するYAG
パルス光レーザアニール装置の概要およびその方
法を示す。
Furthermore, in the method of the present invention, YAG that emits light with a wavelength of 500 nm or more (generally 500 nm or 1.06μ)
An overview of the pulsed light laser annealing device and its method will be shown.

被照射構造物は第1図BまたはCに示す。 The irradiated structure is shown in FIG. 1B or C.

第2の透光性電極5を形成する前または後の構
造物を光アニール工程における対象基体として用
いた。
The structure before or after forming the second transparent electrode 5 was used as a target substrate in the optical annealing process.

光源の照射光面積は1mm×9mmのYAGバルス
レーザ光を用いた。特にこの巾は活性領域の巾±
0 1mmとし、1回の走査で活性領域のすべてを光ア
ニールさせた。このため、ここでは9mmとした。
また、スキヤンスピードとの関係でその厚さを1
mmとして、照射エネルギ密度を制御するため、
100μ〜3mmまで可変させてもよい。
The irradiation light area of the light source was YAG pulsed laser light with a size of 1 mm x 9 mm. In particular, this width is the width of the active region ±
0 1 mm, and the entire active region was photoannealed in one scan. For this reason, it is set to 9 mm here.
Also, in relation to the scan speed, the thickness should be reduced by 1
To control the irradiation energy density as mm,
It may be varied from 100μ to 3mm.

ここではNEC製レーザ発振器を用いた。 Here, a NEC laser oscillator was used.

さらにこのレーザ光はレンズで長方形に集光
し、パルス光(周波数300Hz〜30KHz)有し
5kw/cm2(巾1mmの場合)となつた。
Furthermore, this laser light is focused into a rectangular shape by a lens and has a pulsed light (frequency 300Hz to 30KHz).
5kw/cm 2 (for width 1mm).

この照射光25を被照射面に一定速度の移動基
体に照射させた。
This irradiation light 25 was irradiated onto the irradiated surface of a moving base at a constant speed.

かくすると、非単結晶半導体中でI層の全厚さ
(波長1.06μの場合)または0.53μの波長を用いる
場合にその半分程度の3000〜5000Åの深さの領域
の結晶化を助長させることができた。この結晶化
の事実は、この工程の後レーザラマン分光測定を
行うことにより判明した。加えて、この本発明方
法のアニールは光パルスアニールのため、結晶化
の際、既に含有している水素またはハロゲン元素
を外部に脱気することが少なく、また結晶粒界の
不対結合手を中和させ得る。加えて結晶性または
秩序性を光アニールにより促進するため、光劣化
特性が小さくなり、加えてPN間のアモルフアス
半導体におけるI層中の空乏層の巾をアモルフア
ス構造のPIN接合における0.3μより結晶性を有せ
しめるため、1〜3μと伸ばすことができるとい
う二重の特長を有していた。このためI層の最適
厚さをアモルフアス半導体の0.5μより1.5〜2.0μに
まで厚くさせることができ、光電変換装置として
の電流を増加させ得る。
In this way, in a non-single crystal semiconductor, crystallization can be promoted in a region with a depth of 3000 to 5000 Å, which is the full thickness of the I layer (in the case of a wavelength of 1.06 μ) or about half of that when using a wavelength of 0.53 μ. was completed. The fact of this crystallization was found by performing laser Raman spectroscopy after this step. In addition, since the annealing of the method of the present invention is a light pulse annealing, there is little degassing of hydrogen or halogen elements already contained to the outside during crystallization, and dangling bonds at grain boundaries are removed. Can be neutralized. In addition, since crystallinity or orderliness is promoted by photoannealing, the photodegradation characteristics are reduced, and in addition, the width of the depletion layer in the I layer in the amorphous semiconductor between PN and PN is made more crystalline than 0.3μ in the PIN junction of an amorphous structure. It had the double feature of being able to be stretched to 1 to 3μ. Therefore, the optimum thickness of the I layer can be increased to 1.5 to 2.0 μm from 0.5 μm of an amorphous semiconductor, and the current as a photoelectric conversion device can be increased.

このレーザアニールは、第1図Cにおいて、3
3,34の間、33′,34′の間の活性領域3
1,11に限られる。そして4の非活性領域は高
抵抗型の半導体、特にアモルフアス半導体であ
り、20の下側の半導体、13の部分の半導体に
より電極間のリークがないようにせしめた。
This laser annealing is performed at 3 in Figure 1C.
Active region 3 between 3 and 34 and between 33' and 34'
1, 11 only. The non-active region 4 is a high-resistance semiconductor, especially an amorphous semiconductor, and the semiconductor below 20 and the semiconductor 13 prevent leakage between the electrodes.

さらにこのレーザアニールは素子の巾方向の両
端部より1〜2mm内側とし、両端部に至らないよ
うにした。そのため、アモルフアス半導体が両端
部に残存している。換言すれば、活性領域の外周
辺部は高抵抗度のアモルフアス半導体で取り囲む
構造とした。かくすることにより、活性半導体の
周辺部での上下電極間のリーク即ち等価回路的に
いうならば並列抵抗の低下を防ぐことができた。
Furthermore, this laser annealing was carried out 1 to 2 mm inside of both ends of the element in the width direction, so as not to reach both ends. Therefore, amorphous semiconductor remains at both ends. In other words, the outer periphery of the active region is surrounded by a highly resistive amorphous semiconductor. By doing so, it was possible to prevent leakage between the upper and lower electrodes at the periphery of the active semiconductor, that is, a decrease in parallel resistance in terms of an equivalent circuit.

このレーザアニールの後、第3のLSにより切
断分離して複数の第2の電極39,38を第3の
開溝20を形成してアイソレイシヨンした。
After this laser annealing, the plurality of second electrodes 39 and 38 were separated by cutting using a third LS to form third grooves 20 and isolate them.

この第2の導電膜5は金属と透光性導電酸化膜
(CTF)とを用いた。その厚さはそれぞれ300〜
1500Åに形成させた。
This second conductive film 5 is made of metal and a transparent conductive oxide film (CTF). Its thickness is 300 ~
It was formed at 1500 Å.

このCTFとしてクロム−珪素化合物等の非酸
化物導電膜よりなる透光性導電膜を用いてもよ
い。
As this CTF, a light-transmitting conductive film made of a non-oxide conductive film such as a chromium-silicon compound may be used.

これらは電子ビーム蒸着法またはスパツタ法、
フオトCVD法、フオト・プラズマCVD法を含む
CVD法を用い、半導体層を劣化させないため、
250℃以下の温度で形成させた。
These are electron beam evaporation method or sputtering method,
Including photo CVD method and photo plasma CVD method
Using the CVD method, it does not deteriorate the semiconductor layer, so
It was formed at a temperature below 250°C.

かくして第1図Cに示されるごとく、複数の素
子31,11を連結部4で直列接続する光電変換
装置を作ることができた。
In this way, as shown in FIG. 1C, a photoelectric conversion device in which a plurality of elements 31 and 11 were connected in series through the connecting portion 4 could be manufactured.

第1図Dはさらに本発明を光電変換装置として
完成させんとしたものである。即ちパツシベイシ
ヨン膜としてプラズマ気相法またはフオト・プラ
ズマ気相法により窒化珪素膜21を500〜2000Å
の厚さに均一に形成させ、各素子間のリーク電流
の湿気等の吸着による発生をさらに防いだ。
FIG. 1D shows the present invention further completed as a photoelectric conversion device. That is, a silicon nitride film 21 with a thickness of 500 to 2000 Å is formed as a bonding film by a plasma vapor phase method or a photo plasma vapor phase method.
This further prevents leakage current between each element from occurring due to adsorption of moisture, etc.

さらに外部引出し端子22,22′を周辺部に
設けた。
Furthermore, external lead-out terminals 22, 22' are provided at the periphery.

斯くして照射光10に対し、この実施例のごと
き基板(10cm×10cm)において、各素子を巾10mm
×92mmの短冊上に設け、さらに連結部の巾200μ
m外部引出し電極部の巾3mm、周辺部4mmによ
り、実質的に88mm×92mm内に10段を有せしめた。
In this way, for the irradiation light 10, on a substrate (10 cm x 10 cm) as in this example, each element has a width of 10 mm.
×92mm strip, and the width of the connection part is 200μ
Since the width of the external lead electrode part is 3 mm and the peripheral part is 4 mm, there are essentially 10 stages within 88 mm x 92 mm.

その結果、セグメントが11.3%(1.05cm2)の変
換能率を有する場合、パネルにて7.6%(理論的
には9.3%になるが、9段直列連結抵抗により実
効変換効率が低下した(AM1〔100mW/cm2〕))
にて、6.3Wの出力電力を有せしめることができ
た。
As a result, when the segment had a conversion efficiency of 11.3% (1.05 cm 2 ), the panel had a conversion efficiency of 7.6% (theoretically 9.3%, but the effective conversion efficiency decreased due to the 9-stage series-connected resistance (AM1 [ 100mW/ cm2 〕))
We were able to achieve an output power of 6.3W.

またさらにこのパネルを大きくし、例えば40cm
×60cmを2ケ直列にアルミサツシの固い枠内また
カーボン・ブラツクによる可曲性枠内に組み合わ
せることによりパツケージさせ、120cm×40cmの
NEDO規格の大電力用のパネルを設けることが
可能である。
Also, make this panel even larger, for example 40cm.
x 60 cm in series within a hard frame made of aluminum sash or a flexible frame made of carbon black to form a package.
It is possible to install a NEDO standard high power panel.

またこのNEDO規格のパネル用にはシーフレ
ツクスによりガラス基板の裏面(照射面の反対
側)に本発明の光電変換装置の上面をはりあわせ
て、風圧、雨等に対し機械強度の増加を図ること
も有効である。
In addition, for panels that meet this NEDO standard, the top surface of the photoelectric conversion device of the present invention can be attached to the back surface of the glass substrate (opposite the irradiation surface) using Seaflex to increase mechanical strength against wind pressure, rain, etc. It is valid.

実施例 2 第1図の図面に従つてこの実施例を示す。Example 2 This embodiment is illustrated according to the drawing in FIG.

即ち絶縁性被膜を有する金属箔基板として約
100μの厚さのステンレス箔の表面にポリイミド
樹脂をPIQを用い1.5μの厚さにコートした基板1
長さ10cm、巾10cmを用いた。
In other words, as a metal foil substrate with an insulating coating, approximately
Substrate 1: The surface of a 100μ thick stainless steel foil is coated with polyimide resin to a thickness of 1.5μ using PIQ.
A length of 10 cm and a width of 10 cm were used.

さらに上面にSnO2を1500Åの厚さにスパツタ
法により作製した。
Furthermore, SnO 2 was formed on the top surface to a thickness of 1500 Å by sputtering.

次にこの後、第1の開溝をスポツト径50μ、出
力0.5WのYAGレーザをマイクロコンピユータに
より制御して0.1〜1m/分(平均0.3m/分)の
走査速度にて作製した。
After this, a first open groove was formed using a YAG laser with a spot diameter of 50 μm and an output of 0.5 W, controlled by a microcomputer at a scanning speed of 0.1 to 1 m/min (average 0.3 m/min).

素子領域31,11は10mm巾とした。 The element regions 31 and 11 were 10 mm wide.

この後公知のPCVD法、フオトCVD法または
フオト・プラズムCVD法により第1図に示した
PIN接合を1つ有する非単結晶半導体を作製し
た。
After this, the well-known PCVD method, photo-CVD method or photo-plasma CVD method was used to produce the
A non-single crystal semiconductor with one PIN junction was fabricated.

光照射が上側の第2の電極側からの場合である
ため、基板側の第1の電極2上にN型微結晶珪素
(約300Å)半導体−I型半導体(1.2μ)−P型微
結晶化Si半導体(300Å)−P型SiXC1-X(約50Å
x=0.2〜0.3)半導体と積層してある。
Since the light irradiation is from the upper second electrode side, N-type microcrystalline silicon (approximately 300 Å) semiconductor - I-type semiconductor (1.2μ) - P-type microcrystal is placed on the first electrode 2 on the substrate side. oxide Si semiconductor (300Å) - P-type Si X C 1-X (approximately 50Å
x=0.2~0.3) Laminated with semiconductor.

その全厚さは約1.3μであつた。 Its total thickness was approximately 1.3μ.

かかる後、第1の開溝をテレビにてモニターし
て、そこより100μ第1の素子31側にシフトさ
せ、スポツト径50μ、平均出力0.5W、室温、周波
数3KHz、操作スピート60cm/分にてLSにより第
2の開溝14を作製した。
After this, the first open groove was monitored on a television, and shifted 100μ from there to the first element 31 side, with a spot diameter of 50μ, average output of 0.5W, room temperature, frequency of 3KHz, and operation speed of 60cm/min. A second open groove 14 was created using LS.

この後、2mmφYAGレーザ(波長0.5μ)25の
パルス25(この場合は第1図に示すと逆向きの
上側からのパルス光となる)により、光アニール
処理を上側のP型半導体を通してI型半導体層に
行つた。するとこの微結晶化したP型半導体層お
よびその下のI型半導体層との結晶化または秩序
性を助長せしめ、いわゆる多結晶化領域として構
成せしめることができた。
After that, a light annealing process is performed on the I-type semiconductor through the upper P-type semiconductor using a pulse 25 of a 2 mmφ YAG laser (wavelength 0.5μ) 25 (in this case, the pulsed light is from the upper side in the opposite direction as shown in FIG. 1). I went to the layer. Then, the crystallization or orderliness of this microcrystalized P-type semiconductor layer and the I-type semiconductor layer below it was promoted, and a so-called polycrystalline region was formed.

かくして得られた半導体を1/10HF中に浸漬し
て半導体表面の絶縁酸化物を除去し、さらにこの
全体をCTFであるITOをスパツタ法により平均
膜厚700Åに作製して、第2の導電膜5およびコ
ネクタ30を構成せしめた。
The semiconductor thus obtained was immersed in 1/10 HF to remove the insulating oxide on the semiconductor surface, and the whole was then coated with ITO (CTF) to an average thickness of 700 Å by sputtering to form a second conductive film. 5 and connector 30 were constructed.

さらに第3の開溝20を同様にLSにより第2
のの開溝14より100μのわたり深さに第1の素
子31側にシフトして形成させ第1図Cを得た。
Furthermore, the third open groove 20 is similarly connected to the second groove by LS.
FIG. 1C was obtained by shifting the opening groove 14 to a depth of 100 μm toward the first element 31.

レーザ光は平均出力0.5Wとし、他は第2の開
溝の作製と同一条件とした。
The average power of the laser beam was 0.5 W, and the other conditions were the same as those for producing the second open groove.

第1図Cの工程の後、パネルの端部をレーザ光
出力1Wにて第1の電極、半導体、第2の電極の
すべてをステンレス基板端より4mm内側で長方形
に走査し、パネルの枠との電気的短絡を防止し
た。
After the process shown in Figure 1C, the first electrode, semiconductor, and second electrode are all rectangularly scanned 4 mm inside the edge of the stainless steel substrate using a laser beam output of 1W, and the edge of the panel is aligned with the frame of the panel. prevents electrical short circuits.

この後、パツシベイシヨン膜21をPCVD法ま
たはフオト・プラズマCVD法により窒化珪素膜
を1000Åの厚さに250℃の温度にて作製した。
Thereafter, a silicon nitride film with a thickness of 1000 Å was formed at a temperature of 250° C. by PCVD or photo plasma CVD to form a passivation film 21.

すると10cm×10cmのパネルに10mm巾の素子を9
段作ることができた。
Then, nine 10mm wide elements are placed on a 10cm x 10cm panel.
I was able to make steps.

バネルの実効効率としてAM1(100mw/cm2
にて8.7%、出力7.8Wを得ることができた。
AM1 (100mw/cm 2 ) as the effective efficiency of the panel
We were able to obtain an output of 8.7% and an output of 7.8W.

有効面積は82.8cm2であり、パネル全体の82.8%
を有効に利用することができた。
The effective area is 82.8cm2 , 82.8% of the whole panel
was able to be used effectively.

本発明におけるレーザアニールは0.53μパルス
巾30n秒または1.06μ(パルス巾70n秒)の波長の
YAGレーザを用いた。
The laser annealing in the present invention uses a wavelength of 0.53μ pulse width 30ns or 1.06μ (pulse width 70ns).
A YAG laser was used.

しかしこの500(0.5μ)〜5000nm(5μm)の波
長光を他のレーザ光またはフラツシユ状のキセノ
ンランプ等を用いて行うことは有効であつた。
However, it has been effective to emit light with a wavelength of 500 (0.5 μm) to 5000 nm (5 μm) using another laser beam or a flash-shaped xenon lamp.

本発明の実施例は半導体装置における特に光電
変換装置に関して記した。しかし同じ構造のPIN
またはNIP構造を有する水素またはハロゲン元素
が添加されたフオトセンサ、イメージセンサに対
して本発明を適用してもよいことはいうまでもな
い。
The embodiments of the present invention have been described regarding semiconductor devices, particularly photoelectric conversion devices. But the PIN with the same structure
It goes without saying that the present invention may also be applied to photo sensors and image sensors to which hydrogen or halogen elements are added and have an NIP structure.

「効果」 本発明は第2図に示す如く、光照射(AM1
(100mw/cm2))効果に対してきわめて有効であ
る。そしてその1例として一般的なアモルフアス
PIN型半導体の劣化特性50に比べて、I型半導
体の場合は1.3〜2μと厚いにもかかわらず、きわ
めてその劣化が少ない結果51を本発明では得る
ことができた。51は実施例1、52は実施例2
の特性である。
"Effect" As shown in FIG.
(100 mw/cm 2 )) is extremely effective. One example is the common amorphous
Compared to the deterioration characteristics 50 of the PIN type semiconductor, the present invention has been able to obtain a result 51 in which the deterioration of the I type semiconductor is extremely small even though it is thicker at 1.3 to 2 μm. 51 is Example 1, 52 is Example 2
It is a characteristic of

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の光電変換装置の製造工程を示
す縦断面図である。第2図は本発明の光パルスア
ニールを行なわない光電変換装置と、本発明の光
パルスアニールを行つた光電変換装置の光照射特
性である。
FIG. 1 is a longitudinal sectional view showing the manufacturing process of the photoelectric conversion device of the present invention. FIG. 2 shows the light irradiation characteristics of a photoelectric conversion device without optical pulse annealing according to the present invention and a photoelectric conversion device using optical pulse annealing according to the present invention.

Claims (1)

【特許請求の範囲】 1 絶縁表面を有する基板上に設けられた第1の
電極と、該電極上に密接して設けられたPIN接合
を有する水素またはハロゲン元素が添加された非
単結晶半導体と、該半導体上に設けられた第2の
電極とを有する光電変換素子を複数個直列に連結
部において連結して設けた半導体装置において、 前記非単結晶半導体における活性領域に対して
強光を照射することにより、前記活性領域の半導
体の結晶性を助長せしめるとともに、前記連結部
における半導体に対して前記強光を照射しないこ
とにより、前記連結部における半導体に高抵抗を
保持せしめたことを特徴とする半導体装置の作製
方法。 2 特許請求の範囲第1項において、強光として
レーザ光を用いることを特徴とする半導体装置の
作製方法。
[Claims] 1. A first electrode provided on a substrate having an insulating surface, a non-single crystal semiconductor doped with hydrogen or a halogen element and having a PIN junction provided closely on the electrode. , a semiconductor device in which a plurality of photoelectric conversion elements each having a second electrode provided on the semiconductor are connected in series at a connecting portion, the active region of the non-single crystal semiconductor being irradiated with strong light. By doing so, crystallinity of the semiconductor in the active region is promoted, and by not irradiating the semiconductor in the connection part with the strong light, the semiconductor in the connection part is made to maintain high resistance. A method for manufacturing a semiconductor device. 2. A method for manufacturing a semiconductor device according to claim 1, characterized in that a laser beam is used as the intense light.
JP59181098A 1984-08-29 1984-08-29 Manufacture of semiconductor device Granted JPS6158278A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59181098A JPS6158278A (en) 1984-08-29 1984-08-29 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59181098A JPS6158278A (en) 1984-08-29 1984-08-29 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS6158278A JPS6158278A (en) 1986-03-25
JPH0550870B2 true JPH0550870B2 (en) 1993-07-30

Family

ID=16094796

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59181098A Granted JPS6158278A (en) 1984-08-29 1984-08-29 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6158278A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5753542A (en) * 1985-08-02 1998-05-19 Semiconductor Energy Laboratory Co., Ltd. Method for crystallizing semiconductor material without exposing it to air
JPH0682856B2 (en) * 1986-11-25 1994-10-19 株式会社半導体エネルギ−研究所 Semiconductor device manufacturing method

Also Published As

Publication number Publication date
JPS6158278A (en) 1986-03-25

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