JPS60100482A - Manufacture of photoelectric converting semicoductor device - Google Patents
Manufacture of photoelectric converting semicoductor deviceInfo
- Publication number
- JPS60100482A JPS60100482A JP58208069A JP20806983A JPS60100482A JP S60100482 A JPS60100482 A JP S60100482A JP 58208069 A JP58208069 A JP 58208069A JP 20806983 A JP20806983 A JP 20806983A JP S60100482 A JPS60100482 A JP S60100482A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- semiconductor
- groove
- conductive film
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 239000004065 semiconductor Substances 0.000 claims abstract description 48
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 239000004020 conductor Substances 0.000 claims abstract description 13
- 238000006243 chemical reaction Methods 0.000 claims description 17
- 238000000034 method Methods 0.000 claims description 17
- 239000013078 crystal Substances 0.000 claims description 7
- 230000001678 irradiating effect Effects 0.000 claims description 3
- 239000011521 glass Substances 0.000 abstract description 5
- 238000002425 crystallisation Methods 0.000 abstract description 2
- 230000008025 crystallization Effects 0.000 abstract description 2
- 238000009413 insulation Methods 0.000 abstract description 2
- 230000008878 coupling Effects 0.000 abstract 1
- 238000010168 coupling process Methods 0.000 abstract 1
- 238000005859 coupling reaction Methods 0.000 abstract 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 6
- 229910052804 chromium Inorganic materials 0.000 description 6
- 239000011651 chromium Substances 0.000 description 6
- 238000000926 separation method Methods 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 230000002093 peripheral effect Effects 0.000 description 5
- 239000011347 resin Substances 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 238000000605 extraction Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000005566 electron beam evaporation Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 238000000859 sublimation Methods 0.000 description 2
- 230000008022 sublimation Effects 0.000 description 2
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical group O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 2
- 229910001887 tin oxide Inorganic materials 0.000 description 2
- 229920000049 Carbon (fiber) Polymers 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 description 1
- 239000004952 Polyamide Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 238000004026 adhesive bonding Methods 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 239000004917 carbon fiber Substances 0.000 description 1
- 150000001732 carboxylic acid derivatives Chemical class 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000012939 laminating adhesive Substances 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 description 1
- 239000011533 mixed conductor Substances 0.000 description 1
- 229910001120 nichrome Inorganic materials 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000000615 nonconductor Substances 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 229920002647 polyamide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/042—PV modules or arrays of single PV cells
- H01L31/0445—PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
- H01L31/046—PV modules composed of a plurality of thin film solar cells deposited on the same substrate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Sustainable Development (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Life Sciences & Earth Sciences (AREA)
- Power Engineering (AREA)
- Sustainable Energy (AREA)
- Manufacturing & Machinery (AREA)
- Photovoltaic Devices (AREA)
Abstract
Description
【発明の詳細な説明】
この発明は、光照射により光起電力を発生するアモルフ
ァス半導体を含む非単結晶半導体が絶縁表面を有する基
板上に設けられた光電変換素子(単に素子ともいう)を
複数個電気的に直列接続した、高い電圧の発生が可能な
光電変換装置における連結部の作製方d、に関する。Detailed Description of the Invention The present invention provides a plurality of photoelectric conversion elements (also simply referred to as elements) in which a non-single crystal semiconductor including an amorphous semiconductor that generates photovoltaic force upon irradiation with light is provided on a substrate having an insulating surface. The present invention relates to a method (d) of manufacturing a connecting portion in a photoelectric conversion device that is electrically connected in series and is capable of generating a high voltage.
この発明は、レーザ・スクライブ(以下LSという)に
より光電変換装置を作製せんとした場合、それぞれの素
子を直列に接続する連結部において、基板上の第1の導
電膜と、半導体上の第2の導電膜とがその大きさにより
互いにショートしてしまい、電気的に直列接続がされな
(なってしまうことを防ぐため、連結をさせる開溝(以
下第2の開溝という)を半導体の両側端よりも「内部」
に設けたことを特徴としている。In the present invention, when a photoelectric conversion device is manufactured by laser scribing (hereinafter referred to as LS), a first conductive film on a substrate and a second conductive film on a semiconductor are connected to each other in a connecting portion connecting each element in series. In order to prevent the conductive films from shorting each other due to their size and not being electrically connected in series, open grooves for connection (hereinafter referred to as second open grooves) are placed on both sides of the semiconductor. “inside” rather than the edge
It is characterized by the fact that it is set in
この発明は、光電変換装置パネル(以下単にパネルとい
う)の周辺部、特にこのパネルを矩形または長方形とし
た時、外部取り出し電極の形成されていない他の2側部
においても、その連結部、即ち1つの素子の下側電極(
第1の導電膜により作られた第1の電極)と隣の素子の
上側電極(第2の導電膜により作られた第2の電極)と
が、第2の電極より延在させた導体により第1の電極と
第2のコンタクトで連結させたことを特長としている。This invention provides a method for connecting the peripheral part of a photoelectric conversion device panel (hereinafter simply referred to as a panel), particularly when this panel is rectangular or rectangular, also in the other two sides where no external extraction electrode is formed. The lower electrode of one element (
The first electrode made of the first conductive film) and the upper electrode of the adjacent element (second electrode made of the second conductive film) are connected by a conductor extending from the second electrode. The feature is that the first electrode and the second contact are connected.
従来より、一般にパネルはその側端部において、基板が
1μ〜0.1mmの凹面または凸面のそりを有している
。かかる側端部ではレーザ光の焦点がぼけるため、第1
の導電膜を所定の素子に必要な第1の電極の形状に完全
に電気的に分離できない。Conventionally, the substrate generally has a concave or convex curvature of 1 μm to 0.1 mm at the side edges of the panel. Since the laser beam is out of focus at such side edges, the first
It is not possible to completely electrically separate the conductive film into the shape of the first electrode required for a predetermined element.
またこの第1の電極が酸化スズ、酸化インソユームを主
成分とするCTl’とすると、基板の側面に電子ビーム
蒸着法等で形成する際、CTFがまわりこの、その側面
での導通性をLSでは除去することができない。Furthermore, if this first electrode is CTl' whose main component is tin oxide or insium oxide, when it is formed on the side surface of the substrate by electron beam evaporation, the CTF rotates and the conductivity on that side surface is determined by LS. cannot be removed.
即ち、それぞれの素子を直列に連結する連結部において
ショートシてしまう場合があることが判明した。即ち、
もし連結部が半導体の端部までに至る開溝(第2の開溝
)を形成さ・lると1、この連結部にて第2の電極はそ
の隣の素子の開溝より外側の第1の導電膜とも電気的に
連結する。さらにこの導電膜はリークにより前記した第
2の電極下の第1の導電11Qとショー1・しているた
め、結果として1つの素子の上下の電極間が周辺部でシ
ョートシてしまい、光起電力を発生させることができな
くなってしまう。このためこの周辺部のショートによる
光起電力の低下を防ぐことは工業−Lきわめて重要であ
った。That is, it has been found that short circuits may occur at the connecting portions that connect the respective elements in series. That is,
If the connecting part forms an open groove (second open groove) that extends to the edge of the semiconductor, the second electrode at this connecting part is connected to the second electrode in the outer groove of the adjacent element. It is also electrically connected to the conductive film of No. 1. Furthermore, this conductive film is short-circuited with the first conductive layer 11Q under the second electrode due to leakage, resulting in a short circuit between the upper and lower electrodes of one element at the periphery. It becomes impossible to generate electricity. Therefore, it is extremely important to prevent the photovoltaic power from decreasing due to short circuits in the peripheral area.
即ぢ、本発明はかかる問題を解決し、連結に重要な第2
の開溝を形成させた半導体のIJよりも小さく内側にL
Sにより形成せしめ、1つのパネルにおいて隣あったそ
れぞれの素子を直列に側端部にてショートさせることな
く連結させたものである。Therefore, the present invention solves this problem and solves the second problem that is important for connection.
L is smaller on the inside than the semiconductor IJ in which an open groove is formed.
S, and the adjacent elements in one panel are connected in series without short-circuiting at the side ends.
さらに、本発明は、第1の導電膜を電気的に開溝(以下
第1の開溝という)の形成の際レーザ光の焦点ぼけのた
めに切断しにくい基板端を除去するため、この側端より
内部(一般には0.3〜5mm )にレーザ光を用いて
開溝(以下第4の開溝という)を形成させることにより
、それぞれの素子用の第1の電極を4本の開溝(2本の
第1の開溝および2本の第4の開#)により回りを取り
囲む構成とせしめた。Furthermore, in the present invention, in order to remove the edge of the substrate which is difficult to cut due to the defocus of the laser beam when forming the first conductive film to electrically open the groove (hereinafter referred to as the first groove), this side By forming an open groove (hereinafter referred to as the fourth open groove) inward from the end (generally 0.3 to 5 mm) using a laser beam, the first electrode for each element is formed into four open grooves. (Two first open grooves and two fourth open grooves) surround the circumference.
かくして前記したごとき基板端部の基板のそり等による
レーザ加工のばらつきによる電極間の電気ショーI−を
除去することができた。In this way, it was possible to eliminate the electric show I- between the electrodes due to variations in laser processing due to substrate warping at the edge of the substrate as described above.
本発明ばかかる簗積化構造をマスクを用いずに成就する
ものであるが、この集積化の際、余分の工程がかかりや
すい基板の側端部を集積化工程と同一のLSI程で成就
するものである。The present invention achieves such a stacked structure without using a mask, but during this integration, the side edges of the substrate, which tend to require extra steps, can be achieved in the same LSI as the integration process. It is something.
さらに本発明においては、このレーザスタライブ工程を
用いるに加えて、そのスクライブラインの合わせ精度に
冗長(余裕)度をもたせたことが重要である。そのため
隣合った素子間の第1の電wA(下側)と、他の素子の
第2の電極(上側電極)とがこの半導体の「外側」で互
いに連結をさせるのではなく、半導体の「内部j側にL
Sで形成された第2の開溝を利用して、第2の電極より
延在した導体リードとにより第1の電極の側面または側
面と上坦面において電気的に連結させるコンタクトを構
成させることにより、スクライブラインの開溝の位置に
冗長度を持たせることができた。Furthermore, in the present invention, in addition to using this laser staglining process, it is important to have a degree of redundancy (margin) in the alignment accuracy of the scribe lines. Therefore, the first electrode wA (lower side) between adjacent elements and the second electrode (upper electrode) of another element are not connected to each other on the "outside" of this semiconductor, but on the "outside" of the semiconductor. L on internal j side
Utilizing the second groove formed by S, a contact is configured to be electrically connected to the side surface of the first electrode or the side surface and the upper surface of the first electrode by a conductor lead extending from the second electrode. This made it possible to provide redundancy in the position of the open groove of the scribe line.
以下、図面の実施例に従って本発明を説明する。Hereinafter, the present invention will be explained according to the embodiments shown in the drawings.
第1図は本発明を用いた光電変換装置のパネル(50)
を上面より示したものである。即ち、図面において、光
電変倹素−j’−(31)、(II)は連結部(12)
を経て直列に連結して!J”、 all化さ−Uた光電
変換装置(50)を設けている。パネルの上6i;i部
、下端部に枠と電気的にショー1−シないように、分月
11溝(36)が設けられている。Figure 1 shows a panel (50) of a photoelectric conversion device using the present invention.
is shown from the top. That is, in the drawing, the photoelectric converter -j'-(31), (II) is the connecting part (12)
Connect in series through ! A photoelectric conversion device (50) which has been converted into a photovoltaic device (50) is installed in the top 6i; ) is provided.
この連結部(12〉を構成する3本の開溝のうち、図面
では第2の開溝を代表して示す。そのため、図面では分
離溝(36)にまでこの開溝が至らず内部側に直線状に
設けている。Of the three grooves that make up this connecting part (12>), the second groove is shown as a representative in the drawing. Therefore, in the drawing, this groove does not reach the separation groove (36), but instead extends to the inside. It is arranged in a straight line.
第1図のパネルにおいて、その大きさは20cm x6
0cm、 40cmX120cm、40cmX6Qcm
等の任意の大きさを設計によって得ることができる。In the panel shown in Figure 1, its size is 20cm x 6
0cm, 40cmX120cm, 40cmX6Qcm
Any size can be obtained by design.
第1図における(A−A’)の縦断面図を第2図に示し
ている。さらに(B−B’)の縦断面図を第3図(B)
に、(C)を第3図(A)に拡大して示している。番号
はそれぞれに対応させている。FIG. 2 shows a vertical cross-sectional view taken along the line (AA') in FIG. 1. Furthermore, the vertical cross-sectional view of (B-B') is shown in Figure 3 (B).
3(C) is shown enlarged in FIG. 3(A). The numbers correspond to each other.
第2図は第1図A−A’の縦断面図を示す。即ぢ、本発
明の製造工程を示す縦断面図である。FIG. 2 shows a longitudinal sectional view of FIG. 1 along line AA'. That is, it is a longitudinal cross-sectional view showing the manufacturing process of the present invention.
第2図(A)および第3図において、絶縁表面を有する
基板例えば透光性基板(1)即ちガラス板(例えば厚さ
1.2 mm、長さく図面では左右方向)60cm、中
20cm)、 S光性有機樹脂(厚さ100μまたは透
光性有機樹脂膜上に窒化珪素膜(厚さ0.1〜1μ)が
形成された基板)を用いた。さらにこの上面に全面にわ
たって、透光性導電膜例えばITO(約1500人)
+SnO,(200〜400人)またはノーロゲン元素
が添加された酸化スズを主成分とする透光性導電膜(3
500〜10000人)を真空MH法、1.PCVD法
、プラズマCVI]法またはスプレー法により形成させ
た。In FIGS. 2(A) and 3, a substrate having an insulating surface, such as a transparent substrate (1), that is, a glass plate (for example, thickness 1.2 mm, length in the left and right direction in the drawings: 60 cm, middle 20 cm); A photosensitive organic resin (a substrate having a thickness of 100 μm or a silicon nitride film (thickness 0.1 to 1 μm) formed on a transparent organic resin film) was used. Furthermore, a transparent conductive film such as ITO (approximately 1,500 layers) is applied over the entire upper surface.
+SnO, (200-400 people) or a translucent conductive film whose main component is tin oxide added with a norogen element (3
500 to 10,000 people) using the vacuum MH method, 1. It was formed by a PCVD method, a plasma CVI method, or a spray method.
この後、この基板の上側より、YAG レーザ加工機(
日本レーザ製)により0.5〜3w平均出刃を加え、ス
ポット径30〜7oμφ例えば5oμψ、周波数7KI
Iz、パルス中0.1 μ秒をマイクロコンビューり数
を制御して照射−し、その走査にょリスクライブライン
用開溝(13)、<13’)を形成さセ、各素子領域間
および外部引出し電極Iti城(5)を分割した。After this, from the top of this board, use a YAG laser processing machine (
(manufactured by Nippon Laser), add an average cutting edge of 0.5 to 3W, spot diameter 30 to 7oμφ, for example 5oμψ, frequency 7KI
Iz, 0.1 μsec during the pulse is irradiated by controlling the number of microcontacts, and the scanning groove (13) for the scribe line (<13') is formed between each element region and The external extraction electrode Iti castle (5) was divided.
そして第1の電極(37)、<39)を作製した。Then, a first electrode (37), <39) was produced.
このLSにより形成された第1の開溝(] 3 )、<
13 ’ )は+13約50μ長さ20cmとし、深
さは第1の電極それぞれを完全に切断分δ11シた。こ
の長さは第1図における図面の上端から1・端まで通り
抜C)さセ、開溝の形成の走査スピードを2m/分と速
くさせた。The first open groove (] 3 ) formed by this LS, <
13') was +13 about 50μ long and 20cm long, and the depth was δ11 by completely cutting each of the first electrodes. This length was determined by passing through from the top edge of the drawing in FIG.
かくして外部引出し電極領域(5)、第1の素子領域(
3工)および第2の素子領域(月)を構成させた。これ
らの素子の中ば】0〜20mmとした。In this way, the external extraction electrode region (5), the first element region (
3) and the second element region (Moon) were constructed. The middle of these elements was set to 0 to 20 mm.
加えて第3図に示すごとく、基板の側部における分離溝
(36)用の第4の開溝(56)も同様のLSプロセス
により作製した。その結果、パネルにおける素子領域(
31)を周辺部の不均質な不要導電膜(15)即ち側端
部での凹部凸部の基板のそりでレーザ光の焦点がぼけ、
開溝(13ル03’)の形成できない領域(17)と電
気的に分離した。かくして素子が作られる活性領域(1
4)において開溝(13)により素子(31)、<11
)の第1の電極を電気的に分離した。In addition, as shown in FIG. 3, a fourth open groove (56) for the separation groove (36) on the side of the substrate was also fabricated by the same LS process. As a result, the element area (
31) The laser beam is out of focus due to the uneven unnecessary conductive film (15) in the peripheral area, that is, the warpage of the substrate in the concave and convex portions at the side edges,
It was electrically isolated from the region (17) where the open groove (13 03') could not be formed. The active region (1
4), the element (31) is formed by the open groove (13), <11
) were electrically isolated.
この後、この活性領域(14)、第1の開溝および第4
の開溝を覆い上面にプラズマCVD法またはLPCVD
法、光CVD法、光プラズ7CVD法、[、T CVD
法(IIOMOCVD法ともいう)により光照射により
光起電力を発生させる非単結晶半導体特にPNまたばP
IN接合を有する非単結晶半導体FJ(3)を0.2〜
1.0 μ代表的には0.4〜0.6 μの厚さに形成
させた。その代表例は、P型半導体(SixC1−Xx
=0.850〜150人X23) −I型アモルファ
スまたはセミアモルファスのシリコン半導体(0,4〜
0.6μ)<24)−N型の微結晶(100〜200人
)または5ixC+−x (0< x < 1 例えば
x=0.9)の半導体(25)よりなる1つのPIN接
合を有する非単結晶半導体(3)とした。この半導体と
してP型半導体(SixC1−)<) −1型Si半導
体−N型Si半導体−P型Si半導体−■型5jXGc
l−x半導体−N型半導体よりなる2つのPIN接合
と1つのPN接合を有するタンデム型のPINPIN・
・・IIIN接合の半導体(3)としてもよい。かかる
非fl′L結晶半導体(3)をCTFの活性領域(14
)および開溝(13)、<13’)J二の全面にわたっ
て均一の脱1’7−で形成さゼた。After this, this active region (14), the first open groove and the fourth
Plasma CVD method or LPCVD method is applied to the upper surface to cover the open groove.
method, optical CVD method, optical plasma 7CVD method, [,T CVD
A non-single crystal semiconductor, especially PN or P, which generates photovoltaic force by light irradiation using
Non-single crystal semiconductor FJ (3) with IN junction from 0.2 to
It was formed to a thickness of 1.0 μm, typically 0.4 to 0.6 μm. A typical example is a P-type semiconductor (SixC1-Xx
= 0.850 to 150 people x 23) - Type I amorphous or semi-amorphous silicon semiconductor (0.4 to
0.6 μ) < 24) -N type microcrystalline (100-200) or a non-conductor with one PIN junction consisting of a semiconductor (25) of 5ixC+-x (0 < x < 1 e.g. x = 0.9). A single crystal semiconductor (3) was used. As this semiconductor, a P type semiconductor (SixC1-)<) -1 type Si semiconductor -N type Si semiconductor -P type Si semiconductor -■ type 5jXGc
A tandem type PIN pin having two PIN junctions and one PN junction made of l-x semiconductor-N type semiconductor.
...It may be used as an IIIN junction semiconductor (3). The non-fl'L crystalline semiconductor (3) is used as the active region (14) of the CTF.
) and open grooves (13), <13') were formed by uniform removal over the entire surface of J2.
さらに第2図(B)に示されるごとく、第1の開溝(1
3)の左側に第2の開溝(]8)を50μの中に100
〜200μの距1i11t(7)をわたらせて第2のL
SI程により形成さ・Uた。Further, as shown in FIG. 2(B), the first open groove (1
3) On the left side, make a second open groove (]8) with a diameter of 100μ
~200μ distance 1i11t(7) to the second L
Formed by SI process.
かくして第2の開溝(111)は第1の電極の側面(8
)、< 9 >を露出させた。この時、LSのスキャン
スピードが60cm 7分またはそれツ下では側面のめ
が露出される。しかしこのスピードを10(1cm 7
分〜250cm 7分とすると、側面のめならずその上
川面を0.5μ〜5μのl〕で同時に露呈させることが
できた。即ち、LSにより半導体は1420℃で熔けて
除去されるが、これよりも数倍強い即ち昇華温度が18
50″CであるSnOえ等のCTFは残りやすい。加え
て、レーザ光が中心部がガウス分布により強いため、開
溝の中心部は半導体とCTFとがともに除去され、開溝
の周辺部は半導体のみが除去されるためである。さらに
この後1/10肝で残存物を溶去した。第2の電極と同
一材料の導体を延在させ、コンタクトを第2の導体を積
層させて構成させた。Thus, the second open groove (111) is located on the side surface (8) of the first electrode.
), <9> was exposed. At this time, when the scanning speed of LS is 60 cm 7 minutes or less, the side eyes are exposed. However, this speed is 10 (1cm 7
250 cm for 7 minutes, it was possible to simultaneously expose the upper surface of the side surface with a volume of 0.5 μ to 5 μ. That is, the semiconductor is melted and removed at 1420°C by LS, but the sublimation temperature is several times stronger than this, that is, the sublimation temperature is 18°C.
CTF such as SnO, which is 50"C, tends to remain. In addition, since the laser beam is stronger in the center due to Gaussian distribution, both the semiconductor and CTF are removed in the center of the open groove, and the peripheral part of the open groove is removed. This is because only the semiconductor is removed.Furthermore, after this, the remaining material was eluted with 1/10 of the amount.A conductor made of the same material as the second electrode was extended, and the contact was constructed by laminating the second conductor. I let it happen.
この第2の開m (1B)は第3図(A)に示されるご
とく、半導体(3)の端部(27)の内側にて終端(2
6)をさせている。これはLSの際、基板またはレーザ
光源を走査させ、一定の速度になった後(26)より照
射を開始するか、または(26)にて照射を中止させて
同期させた。かかる第2の開溝端(26)が半導体の端
部(27)より内側とすることにより、素子(31)の
第1の電極(37)と第2の素子(11)の第2の電極
(38)との連結に際し、基板の側端部(17)にてシ
ョートすることを防ぐことができた。As shown in FIG. 3(A), this second opening m (1B) terminates at the end (2) inside the end (27) of the semiconductor (3).
6). During LS, the substrate or laser light source was scanned, and after reaching a constant speed, irradiation was started at (26), or irradiation was stopped at (26) and synchronized. By setting the second open groove end (26) inside the end (27) of the semiconductor, the first electrode (37) of the element (31) and the second electrode ( 38), it was possible to prevent short circuits at the side edges (17) of the board.
さらにこの半導体上の第2の電極がこの半導体よりも大
きくても、またパターンずれを起こし、半導体の端部(
27)より外側にずれても、連結部を経由してその素子
の第1の電極とショーl−することをも防ぐことができ
る。Furthermore, even if the second electrode on this semiconductor is larger than this semiconductor, pattern misalignment will occur again, and the edge of the semiconductor (
27) Even if it is shifted further outward, it can also be prevented from coming into contact with the first electrode of the element via the connecting portion.
また第2図(B)より明らかなごとく、第1の素子の第
1の電極(37)の一部を第2の開溝の右側(9)に残
存さ−けている。Further, as is clear from FIG. 2(B), a part of the first electrode (37) of the first element remains on the right side (9) of the second groove.
かかる残存領域がない場合、レーザ光の高jHJ>(〜
2000℃)によりこの開lllの近傍がレーザアニー
ルされ多結晶半導体となり絶縁性に劣化が起きてしまう
。この多結晶は基板のガラス基板表面上に著しく発生し
やすいため、この凸部(9)によりこの結晶化を防ぎ、
側面(9)と(16)とが電気的にショートしてしまう
ことを防いでいる。即ち、第2図(C)におりる第1の
電極(39)と同じ素子の第2の電極(38)とがショ
ー1−シてしまうことを防ぐことができた。この(9)
の部分に残存するCTFは20〜2(jOμの中を有せ
しめた。If there is no such residual area, the height of the laser beam jHJ>(~
2000° C.), the vicinity of this open region is laser annealed and becomes a polycrystalline semiconductor, resulting in deterioration of insulation properties. Since this polycrystal is extremely likely to occur on the surface of the glass substrate, this convex portion (9) prevents this crystallization.
This prevents the side surfaces (9) and (16) from being electrically shorted. That is, it was possible to prevent the first electrode (39) and the second electrode (38) of the same element from being exposed in FIG. 2(C). This (9)
The CTF remaining in the portion was 20 to 2 (jOμ).
第2図において、さらにこの上面に第2図<C>に示さ
れるごとく、裏面の第2の導電膜(4)を形成し、その
導電膜と同一材料を延在させて第1の電極の側面または
側面と上用面(18)とコンタクトを構成させた。In FIG. 2, a second conductive film (4) on the back side is further formed on this top surface as shown in FIG. 2<C>, and the same material as the conductive film is extended to form the first electrode. The side surface or the side surface and the upper surface (18) constituted a contact.
かくすることにより、側面または側面と上用面のコンタ
クトで1.5Ω/cm以下の低い接触抵抗とすることが
できた。即ち、本発明における連結部は第2の電極より
「同一の導体」がコンタク]・に延在し、第1の電極の
側面または側面と上用面の露呈した面に密接せしめたこ
とが特長である。By doing so, it was possible to achieve a low contact resistance of 1.5 Ω/cm or less in the contact between the side surface or the side surface and the upper surface. That is, the connecting part in the present invention is characterized in that the "same conductor" extends from the second electrode to the contact area and is brought into close contact with the side surface of the first electrode or the exposed surface of the side surface and the upper surface. It is.
この第2の導電膜(4)ば透光性導電膜を100〜14
00人の厚さにITO(酸化インジュームスズ)により
形成し、さらにその上面にチタン(10〜50人)、銀
(100〜500 人)、クロムを300〜3000人
の厚さに形成した。またはITO上にクロムを300〜
3000人の厚さに形成した。例えばITOを1050
人、クロムを1500人の2N構造とした。This second conductive film (4) has a translucent conductive film of 100 to 14
It was formed of ITO (indium tin oxide) to a thickness of 0.00 mm, and titanium (10 to 50 mm), silver (100 to 500 mm), and chromium were further formed to a thickness of 300 to 3000 mm on its upper surface. Or 300 ~ chromium on ITO
It was formed to a thickness of 3,000 people. For example, ITO is 1050
2N structure with 1500 people and chromium.
かくしてCTFに対しITOがコンタクト(酸化物−酸
化物コンタクト)を構成せしめた。In this way, the ITO formed a contact (oxide-oxide contact) to the CTF.
このクロム上にニッケルその他の金属を形成してもまた
クロムの代わりにニクロムを用いることも可能である。It is also possible to form nickel or other metal on the chromium, or to use nichrome instead of chromium.
この第2の導電膜の大きさく57)は、側部において第
3図(A)に4くされるごとく、第2の開溝端(26)
よりも大きくし、また半導体(3)の側部(27)より
内部側に設b)られていることが好ましい。The size 57) of this second conductive film is at the side of the second open groove end (26) as shown in FIG. 3(A).
It is preferable that it be larger than b), and that it be located inside the side part (27) of the semiconductor (3).
この第2の導電膜の端部(57)の作製は、第2の導電
膜を電子ビーム蒸着法にて作製の際、基板ホルタ(枠)
により周辺1113をマスクし一〇作習した。The end portion (57) of the second conductive film is manufactured using a substrate holder (frame) when the second conductive film is manufactured by electron beam evaporation.
The surrounding area 1113 was masked and 10 studies were carried out.
さらに第3のLS法により、切■[分離用の第3の開溝
(20)を設けた。Furthermore, by the third LS method, a third opening groove (20) for separation was provided.
この開溝は導電膜(4)を完全にり1lliさ−lてい
る。このレーザ光の照射により、昇華性導体のITOお
よびクロムを選択し、除去することが可能となった。こ
の時、レーザ光の焦点をこの第2の導電膜に対して合わ
せ込んでいるため、パネルの側部(15バ第3図)にお
いて、その下の半2η体に開/1負が形成させにくかっ
た。This open groove completely extends through the conductive film (4). Irradiation with this laser light made it possible to select and remove sublimable conductors ITO and chromium. At this time, since the laser beam is focused on this second conductive film, an open/1 negative is formed in the half 2η body below it on the side of the panel (15 bars in Figure 3). It was difficult.
さらに、この第3の開溝下の半導体上部を酸化(6〉し
てそれぞれの第2の電極間のクロスト−り(リーク電流
)の発生を防止した。Further, the upper part of the semiconductor under the third trench was oxidized (6) to prevent crosstalk (leakage current) between the respective second electrodes.
かくして第2図(C)に示されるごと<in数の素子(
31)、< 11 )を連結部(12)で直列接続した
。Thus, as shown in FIG. 2(C), <in number of elements (
31), < 11) were connected in series at the connecting part (12).
第2図(D)はさらに本発明を光電変換装置として完成
させんとしたものであり、即ちパンシヘイション映とし
てプラズマ気相法により窒化珪素膜(21)を500〜
5000人の厚さに形成させ、各素子間のリーク電流の
発生を防いだ。さらに外部引き出しバンド(49)を周
辺部(5)にて設けた。FIG. 2(D) shows the attempt to further complete the present invention as a photoelectric conversion device, that is, a silicon nitride film (21) with a thickness of 500 to
It was formed to a thickness of 5,000 mm to prevent leakage current between each element. Furthermore, an external drawer band (49) was provided at the peripheral part (5).
これらにポリイミド、ポリアミド、カブ1−ンまたはエ
ポキシ等の有機樹脂(22)を充填した。These were filled with an organic resin (22) such as polyimide, polyamide, carboxylic acid, or epoxy.
第3図は第1図における(B−B’)および(C)の拡
大図である。FIG. 3 is an enlarged view of (BB') and (C) in FIG. 1.
第3図(A)において、2つの素子(31)、< 11
)および連結部(12)を有している。側端部(17
)においても、第3図(B)に示ずごと< 、CTF(
59)が残存してしまう。このため、これらの導体が残
存しても、素子(31,)、<11)が動作不能を起こ
さないようにするため、さらにこの導体(59)が残存
しても、ここの部分でパネルを外枠(46)に固定する
ことが可能な構造を右−uしめている。In FIG. 3(A), two elements (31), < 11
) and a connecting portion (12). Side edge (17
), as shown in Figure 3 (B) < , CTF (
59) will remain. Therefore, even if these conductors remain, in order to prevent the element (31,) <11) from becoming inoperable, even if this conductor (59) remains, the panel is The structure that can be fixed to the outer frame (46) is shown on the right.
即ち、基板の側端部(15)にそって、第1の導電膜(
2)は第4の開溝(56)を形成し分離している。さら
にこの第4の開溝を覆って、半導体(3)を形成する。That is, the first conductive film (
2) is separated by forming a fourth open groove (56). Furthermore, a semiconductor (3) is formed to cover this fourth trench.
その後、この半導体に第2の開溝(18)をその半導体
の内部(26)側に設のでいる。Thereafter, a second trench (18) is formed in this semiconductor on the inside (26) side of the semiconductor.
この分離溝(36)により隣合った素子の第1Q)導電
膜同志が(17)でシーJ 1−L−Cいても、第2の
開溝(18)の内部コンタクト(2G)によりそれぞれ
の電極間のショートを防ぐことができた。また炭素繊維
枠(46)により、導体(17)が加圧されショートし
ても素子(31)、01)は何等の特性劣化がない。即
ち、側部(15)は開溝(56)、側17f11f(5
7)による分離溝(36)により安定に外枠(46)等
と固定が可能となった。さらに、樹脂(41)で枠と光
電変換装置と固定しても、十分信頼性の高い装置とする
ことが可能となっノご。Even if the 1st Q) conductive films of adjacent elements are connected to each other by this separation groove (36), the inner contact (2G) of the second open groove (18) allows the separation of each other. It was possible to prevent short circuits between the electrodes. Further, due to the carbon fiber frame (46), even if the conductor (17) is pressurized and short-circuited, the elements (31), 01) will not suffer any characteristic deterioration. That is, the side part (15) has an open groove (56) and a side 17f11f (5
The separation groove (36) provided by 7) enables stable fixation to the outer frame (46), etc. Furthermore, even if the frame and photoelectric conversion device are fixed with resin (41), it is possible to obtain a sufficiently reliable device.
かくして照射光(10)に対し、この実施例のごとき基
板(60cm X 20cm)において各素子を中14
.35mm、連結部のrl】150μ、外部引出し電極
部の1310mm5周辺部4mmにより、有効面積(1
92mm X 14.35mm X 40段 1102
cn!即ち91.8%)を得ることができた。その結果
、セグメン1−が9.3%の変換効率を有する場合、パ
ネルにて7.6%(AMI (100mW /cal)
)にて9.3誓の出力電力を有せしめることができた
。Thus, for the irradiation light (10), each element on the substrate (60 cm x 20 cm) as in this example is
.. The effective area (1
92mm x 14.35mm x 40 stages 1102
cn! That is, 91.8%) was able to be obtained. As a result, if segment 1- has a conversion efficiency of 9.3%, the panel has a conversion efficiency of 7.6% (AMI (100mW/cal)
), it was possible to have an output power of 9.3 o'clock.
さらに金属マスクをまった(用いないため、大面積パネ
ルの製造工程において何等の工業上の支障がな(、大電
力発生用の大面積低価格大量生産用にきわめて適してい
る。Furthermore, since no metal mask is used, there is no industrial hindrance in the manufacturing process of large-area panels, making it extremely suitable for large-area, low-cost mass production for generating large amounts of power.
またさらにこの本発明によって作られた〕(ネル例えば
40cm X 20cmまたは60cm X 20cm
を6ケまたは4ヶ直列にアルミサツシ枠内に組み合わせ
ることによりパッケージさせ、120cm X 40c
mのNEDO規格の大電力用のパネルを設けることが可
能である。[Flannel made according to the present invention] (for example, 40cm x 20cm or 60cm x 20cm)
Packaged by combining 6 pieces or 4 pieces in series in an aluminum sash frame, 120cm x 40cm.
It is possible to provide a high power panel of NEDO standard of m.
またこのNEDO規格のパネルはシーフレ・ノクス等の
合わせ接着剤により他のガラス板その他の機械的基体を
本発明の光電変換装置の反射面側(第2図では上側)に
はりあわせて複合体とし、風圧、雨等に対し機械強度の
増加を図ることも自〃Jである。In addition, this NEDO standard panel can be made into a composite by gluing another glass plate or other mechanical substrate onto the reflective surface side (the upper side in Figure 2) of the photoelectric conversion device of the present invention using a laminating adhesive such as Schiffle Nox. It is also necessary to increase mechanical strength against wind pressure, rain, etc.
本発明において、第2の開lil’jは半導体のαj1
°、1部より内側(内部)を一本の溝、とした場合を示
した。In the present invention, the second open lil'j is αj1 of the semiconductor
°, the case where the inner side (inside) of the first part is one groove is shown.
しかしLSに際し、その接触抵抗は大きくなるという欠
点を有するが、走査中にパルスレーザ光を不連続照射を
することにより礼状または破線状の複数の開溝を設け、
複数コンタク1−として構成さ−Uてもよい。However, LS has the disadvantage that the contact resistance increases; however, by discontinuously irradiating pulsed laser light during scanning, a plurality of open grooves in the form of bows or broken lines are created.
It may be configured as a plurality of contacts 1-U.
第3図において、第2の導電膜は仝而に形成−Uしめ、
第5の開溝ニヨ/) (57) (D位ji’J 6w
基板11!+l 6.i、i部と分離して設けてもよい
。In FIG. 3, the second conductive film is formed as shown in FIG.
5th open groove Niyo/) (57) (D position ji'J 6w
Board 11! +l 6. It may be provided separately from the i and i parts.
第1図〜第3図において光入射は一1〜側のガラス板よ
りとした。しかし本発明はその光の大MJ側を下側に限
定するものではない。In FIGS. 1 to 3, light was incident from the glass plate on the 11th side. However, the present invention does not limit the large MJ side of the light to the lower side.
なお、本発明ば、?112の開溝を設りることなし 、
に、第2の電極材料をその一トの半導体中に異常拡散さ
せた半導体金属混合体導体による、隣の素子の第1の電
極の上面にコンタクトを構成させる構造を含まない。な
ぜなら、かかる構造においては、この半導体と拡散金属
例えばアルミニュームとが反応し、不良導体となりやす
い。さらにかかる金属と酸化物導体の第1の電極との界
面で酸化反応がおき、酸化アルミニューム絶縁物が形成
され、不可能であるからである。In addition, what about the present invention? No need to install 112 open grooves,
Furthermore, it does not include a structure in which a contact is formed on the upper surface of the first electrode of an adjacent element using a semiconductor-metal mixed conductor in which a second electrode material is abnormally diffused into the one semiconductor. This is because, in such a structure, the semiconductor and the diffused metal, such as aluminum, react with each other and tend to become poor conductors. Furthermore, an oxidation reaction occurs at the interface between the metal and the first electrode of the oxide conductor, forming an aluminum oxide insulator, which is impossible.
第1図は本発明の光電変換装置のパネルである。
第2図は本発明の光電変換装置の製造工程を示す縦断面
図である。
第3図は本発明の第1図の光電変換装置を拡大して示し
た縦断面図である。
特許出願人
株式会社半導体エネルギー研究所
代表者゛ 山 崎 舜 平
3+ 12
=
(r3)
葦3(2)FIG. 1 shows a panel of a photoelectric conversion device of the present invention. FIG. 2 is a longitudinal sectional view showing the manufacturing process of the photoelectric conversion device of the present invention. FIG. 3 is an enlarged longitudinal sectional view of the photoelectric conversion device of FIG. 1 according to the present invention. Patent applicant Representative of Semiconductor Energy Research Institute Co., Ltd. Shun Yamazaki 3 + 12 = (r3) Ashi 3 (2)
Claims (1)
する工程と、該電極および該電極間の第1の開講を覆っ
て光照射により光起電力を発生させる非単結晶半導体を
形成する工程と、該非単結晶半導体にレーザ光を照射し
て該半導体の側端より内部に第2の開溝を形成せしめる
ことにより前記第1の電極を露呈せしめる工程と、該第
2の開溝および前記非単結晶半導体上に第2の電極を前
記第1の電極に対応して形成するとともに、第1の電極
の露呈面に第2の電極の導体を延在せしめる工程とを有
せしめることにより、隣合う素子を電気的に直列に連結
させたことを特徴とする光電変換半導体装置の作製方法
。 2、特許請求の範囲第1項において、第2の開溝の形成
により第1の電極の側面または側面と上坦面とを露呈せ
しめ、核部に隣の素子の第2の導電膜を密接せしめコン
タクトを形成させたことを特徴とする光電変換半導体装
置の作製方法。 3、特許請求の範囲第1項において、第2の開溝はレー
ザ光ば基板またはレーザ光の一定走査とレーザ光の照射
とをその開始および終了とを同期せしめたことを特徴と
する光電変換半導体装置の作製方法。[Claims] 1. A step of forming a plurality of first electrodes on a substrate having an insulating surface, and generating a photovoltaic force by irradiating light covering the electrodes and the first electrode between the electrodes. a step of forming a non-single crystal semiconductor; a step of exposing the first electrode by irradiating the non-single crystal semiconductor with a laser beam to form a second groove inward from a side edge of the semiconductor; A second electrode is formed on the second groove and the non-single crystal semiconductor in correspondence with the first electrode, and a conductor of the second electrode is extended to the exposed surface of the first electrode. 1. A method for manufacturing a photoelectric conversion semiconductor device, characterized in that adjacent elements are electrically connected in series. 2. In claim 1, the side surface or the side surface and the upper flat surface of the first electrode are exposed by forming the second groove, and the second conductive film of the element adjacent to the core portion is closely attached. A method for manufacturing a photoelectric conversion semiconductor device, characterized in that a contact is formed. 3. The photoelectric conversion according to claim 1, characterized in that the second groove synchronizes the start and end of laser beam irradiation with constant scanning of the substrate or laser beam and laser beam irradiation. A method for manufacturing a semiconductor device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58208069A JPS60100482A (en) | 1983-11-05 | 1983-11-05 | Manufacture of photoelectric converting semicoductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58208069A JPS60100482A (en) | 1983-11-05 | 1983-11-05 | Manufacture of photoelectric converting semicoductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60100482A true JPS60100482A (en) | 1985-06-04 |
JPH0476227B2 JPH0476227B2 (en) | 1992-12-03 |
Family
ID=16550127
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58208069A Granted JPS60100482A (en) | 1983-11-05 | 1983-11-05 | Manufacture of photoelectric converting semicoductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60100482A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60200578A (en) * | 1984-03-26 | 1985-10-11 | Semiconductor Energy Lab Co Ltd | Manufacture of photoelectric converter |
JPS6393169A (en) * | 1986-10-08 | 1988-04-23 | Matsushita Electric Ind Co Ltd | Manufacture of photovoltaic element |
JPS6393168A (en) * | 1986-10-08 | 1988-04-23 | Matsushita Electric Ind Co Ltd | Manufacture of photovoltaic element |
JPH02105583A (en) * | 1988-10-14 | 1990-04-18 | Fuji Electric Co Ltd | Thin film solar cell |
WO2010032713A1 (en) * | 2008-09-22 | 2010-03-25 | シャープ株式会社 | Integrated thin film solar cell and manufacturing method therefor |
US8907203B2 (en) | 2008-09-04 | 2014-12-09 | Sharp Kabushiki Kaisha | Integrated thin-film solar battery |
EP4328391A1 (en) | 2022-08-16 | 2024-02-28 | Toto Ltd. | Sanitary washing device |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101271915B1 (en) | 2008-09-17 | 2013-06-05 | 아사히 가세이 케미칼즈 가부시키가이샤 | Process for production of olefin, and production apparatus for same |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5753986A (en) * | 1980-07-25 | 1982-03-31 | Eastman Kodak Co | |
JPS5996778A (en) * | 1982-11-24 | 1984-06-04 | Semiconductor Energy Lab Co Ltd | Manufacture of photoelectric conversion device |
JPS6059785A (en) * | 1983-09-12 | 1985-04-06 | Semiconductor Energy Lab Co Ltd | Photoelectric conversion device and manufacture thereof |
-
1983
- 1983-11-05 JP JP58208069A patent/JPS60100482A/en active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5753986A (en) * | 1980-07-25 | 1982-03-31 | Eastman Kodak Co | |
JPS5996778A (en) * | 1982-11-24 | 1984-06-04 | Semiconductor Energy Lab Co Ltd | Manufacture of photoelectric conversion device |
JPS6059785A (en) * | 1983-09-12 | 1985-04-06 | Semiconductor Energy Lab Co Ltd | Photoelectric conversion device and manufacture thereof |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60200578A (en) * | 1984-03-26 | 1985-10-11 | Semiconductor Energy Lab Co Ltd | Manufacture of photoelectric converter |
JPH065776B2 (en) * | 1984-03-26 | 1994-01-19 | 株式会社半導体エネルギー研究所 | Method for manufacturing photoelectric conversion device |
JPS6393169A (en) * | 1986-10-08 | 1988-04-23 | Matsushita Electric Ind Co Ltd | Manufacture of photovoltaic element |
JPS6393168A (en) * | 1986-10-08 | 1988-04-23 | Matsushita Electric Ind Co Ltd | Manufacture of photovoltaic element |
JPH054824B2 (en) * | 1986-10-08 | 1993-01-20 | Matsushita Electric Ind Co Ltd | |
JPH055384B2 (en) * | 1986-10-08 | 1993-01-22 | Matsushita Electric Ind Co Ltd | |
JPH02105583A (en) * | 1988-10-14 | 1990-04-18 | Fuji Electric Co Ltd | Thin film solar cell |
US8907203B2 (en) | 2008-09-04 | 2014-12-09 | Sharp Kabushiki Kaisha | Integrated thin-film solar battery |
WO2010032713A1 (en) * | 2008-09-22 | 2010-03-25 | シャープ株式会社 | Integrated thin film solar cell and manufacturing method therefor |
JP2010074071A (en) * | 2008-09-22 | 2010-04-02 | Sharp Corp | Integrated thin film solar cell and manufacturing method thereof |
EP4328391A1 (en) | 2022-08-16 | 2024-02-28 | Toto Ltd. | Sanitary washing device |
Also Published As
Publication number | Publication date |
---|---|
JPH0476227B2 (en) | 1992-12-03 |
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