JPS6059785A - Photoelectric conversion device and manufacture thereof - Google Patents
Photoelectric conversion device and manufacture thereofInfo
- Publication number
- JPS6059785A JPS6059785A JP58168555A JP16855583A JPS6059785A JP S6059785 A JPS6059785 A JP S6059785A JP 58168555 A JP58168555 A JP 58168555A JP 16855583 A JP16855583 A JP 16855583A JP S6059785 A JPS6059785 A JP S6059785A
- Authority
- JP
- Japan
- Prior art keywords
- groove
- electrode
- conductive film
- photoelectric conversion
- frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000006243 chemical reaction Methods 0.000 title claims description 37
- 238000004519 manufacturing process Methods 0.000 title claims description 16
- 239000004065 semiconductor Substances 0.000 claims abstract description 47
- 239000013078 crystal Substances 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims description 29
- 239000000758 substrate Substances 0.000 claims description 16
- 230000002093 peripheral effect Effects 0.000 claims description 5
- 230000001678 irradiating effect Effects 0.000 claims 1
- 239000004020 conductor Substances 0.000 description 7
- 238000000605 extraction Methods 0.000 description 7
- 238000000926 separation method Methods 0.000 description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 239000011521 glass Substances 0.000 description 4
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 230000006866 deterioration Effects 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 229920000049 Carbon (fiber) Polymers 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 239000004917 carbon fiber Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 229910052736 halogen Inorganic materials 0.000 description 2
- 150000002367 halogens Chemical class 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 2
- 229910001887 tin oxide Inorganic materials 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 239000004952 Polyamide Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000004581 coalescence Methods 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 229920003223 poly(pyromellitimide-1,4-diphenyl ether) Polymers 0.000 description 1
- 229920002647 polyamide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 101150117577 rplO gene Proteins 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
- 239000002023 wood Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/042—PV modules or arrays of single PV cells
- H01L31/0445—PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
- H01L31/046—PV modules composed of a plurality of thin film solar cells deposited on the same substrate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Life Sciences & Earth Sciences (AREA)
- Sustainable Development (AREA)
- Engineering & Computer Science (AREA)
- Sustainable Energy (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photovoltaic Devices (AREA)
Abstract
Description
【発明の詳細な説明】
この発明は、光照射により光起電力を発生ずるアモルフ
ァス半導体を含む非単結晶半導体が絶縁表面を存する基
板上に設けられた光電変換素子(単に素子ともいう)を
複数1固電気的に直列接続して、高い電圧の発生が可能
な光電変換装置における端部に枠を設けることにより、
この枠で素子の電気特性が劣化しないように設けた分離
溝の構造およびその作製方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention provides a plurality of photoelectric conversion elements (also simply referred to as elements) provided on a substrate having an insulating surface and a non-single crystal semiconductor including an amorphous semiconductor that generates a photovoltaic force when irradiated with light. 1) By providing a frame at the end of a photoelectric conversion device that can be electrically connected in series to generate high voltage,
The present invention relates to a structure of a separation groove provided so that the electrical characteristics of the element are not deteriorated by this frame, and a method for manufacturing the same.
この発明は、複数の素子間の連結に必要な面積を従来の
マスク合わせ方式の1/10〜I /100にするため
、レーザスクライブ(以下LSという)方式を用いたこ
とを特徴とする。The present invention is characterized in that a laser scribing (hereinafter referred to as LS) method is used in order to reduce the area required for connecting a plurality of elements to 1/10 to 1/100 of the conventional mask alignment method.
この発明は、LS方式により、分離溝を第1の枠周の開
溝と第2の枠周の開溝とで設+Jることにより、何等の
マスクを用いることなしに製造するための構造を示す。This invention provides a structure that can be manufactured without using any mask by using the LS method to create a separation groove with an opening groove around the first frame and an opening groove around the second frame. show.
この発明はこの分離溝の形成においても、その光電変換
素子とまった(同一工程即ち余分の工程を用いることな
しに製造したものである。In the present invention, even in the formation of the separation groove, the photoelectric conversion element is fixed (manufactured in the same process, that is, without using an extra process).
さらに本発明においては、2つの端部における分離溝に
おいて、この光電変換装置のアルミナ・ノシ、炭素繊維
の枠との接続部がもしずれても素子の特性の劣化をもた
らさず、かつこの端部の形成に何等のマスクを用いずに
作製したことを特長としている。Furthermore, in the present invention, even if the connection between the alumina wood and the carbon fiber frame of this photoelectric conversion device is misaligned in the separation groove at the two ends, the characteristics of the element will not deteriorate, and the ends It is characterized by the fact that it was manufactured without using any kind of mask to form the .
即ちこの発明はマスクレスのLS方式であって、信頼性
において特に劣化しやすい外部引出し電極部での連結を
より確実に行うことを可能にした光電変換装置に関する
。That is, the present invention relates to a photoelectric conversion device using a maskless LS method, which makes it possible to more reliably connect an external extraction electrode portion, which is particularly susceptible to deterioration in reliability.
この発明ではレーザビームスクライブ方式を用いること
により、合わせマークを基準としてこのスクライブされ
るアドレスを予めコンピュータ(マイクロ・コンピュー
タ)のメモリに記憶させておくことにより、従来より知
られたマスク合わせ方式で必要なマスクのすれ、そり、
合わせ精度に対する製造歩留りの低下等のすべての製造
での価格増、歩留り減の原因を一気に排除せしめたこと
を特徴とする。In this invention, by using a laser beam scribing method, the address to be scribed using the alignment mark as a reference is stored in advance in the memory of a computer (microcomputer), which is not necessary in the conventional mask alignment method. The mask scratches, warps,
The feature is that all causes of price increases and yield decreases in manufacturing, such as decreases in manufacturing yields due to alignment accuracy, are eliminated at once.
従来、光電変換装置(以下単に装置とい゛)う)即ち同
一基板上に複数の素子を配置し、それを集積化またはハ
イブリッド化した装置はその実施例が多く知られている
。Conventionally, many examples of photoelectric conversion devices (hereinafter simply referred to as devices), that is, devices in which a plurality of elements are arranged on the same substrate and are integrated or hybridized, are known.
例えば特開昭55−4994、特開昭55−12427
4さらに本発明人の出願になる特願昭54=90097
/90098/90099’ (昭和54.7.16
)が知られている。For example, JP-A-55-4994, JP-A-55-12427
4 Furthermore, patent application No. 54=90097 filed by the present inventor.
/90098/90099' (Showa 54.7.16
)It has been known.
例えば本発明人の出願になる特許願は、半導体ヲ5ix
c1−y−5iのへテロ接合とし、単に他のアモルファ
ス・シリコン半導体を用いる場合と異ならせており、さ
らにこの半導体として、アモルファス構造以外に微結晶
構造を含む水素またはハロゲン元素が添加されたPNま
たはPIN接合を少なくとも1つ有する非単結晶半導体
を集積化またはハイブリッド化したものである。For example, the patent application filed by the present inventor is based on semiconductor 5ix
It is a c1-y-5i heterojunction, which is different from the case where other amorphous silicon semiconductors are simply used, and furthermore, this semiconductor is a PN to which hydrogen or halogen elements containing a microcrystalline structure is added in addition to the amorphous structure. Alternatively, it is an integrated or hybridized non-single crystal semiconductor having at least one PIN junction.
本発明はかかる集積化構造をマスクを用いずに成就する
ものであるが、この集積化の際、余分の工程がかかりや
すい外枠との連結部の周辺部の製造において、集積化工
程と同一工程で成就するものである。The present invention achieves such an integrated structure without using a mask, but during this integration, the manufacturing of the peripheral part of the connecting part with the outer frame, which tends to require extra steps, is the same as the integration process. It is achieved through the process.
このため、本発明の光電変換装置特に)V H’A型の
光電変換装置にあっては、それぞれの薄1漢層である電
極用導電層、また半導体1層はともにそれぞれ500人
〜1μであり、レーザスクライブ方式を用いることによ
り、まったくマスク合わせを必要としないで作製するこ
とが可能となった。For this reason, in the photoelectric conversion device of the present invention, particularly in the VH'A type photoelectric conversion device, each of the conductive layer for electrodes, which is one thin layer, and one semiconductor layer each have a thickness of 500 to 1 μm. By using the laser scribing method, it has become possible to manufacture the device without the need for mask alignment at all.
このLS方式においては10〜100μ例えば50μの
IJの線状の開溝により2つの領域を分離することが可
能である。しかしこのLS方式においては、面としての
選択的な除去はきわめて生産性が悪い。In this LS method, it is possible to separate two regions by a linear IJ groove of 10 to 100 μm, for example, 50 μm. However, in this LS method, selective removal as a surface has extremely poor productivity.
さらにLS方式においては直線状の線を有−已しめるこ
とは生産性が大きいが、曲線を複雑に走査すると走査ス
ピードが遅くなり、価格の上昇をもたらす。このことに
よりLS方式における集積化構造を作るにおいては、直
線状でかつ線状の開溝によって成就することが工業的に
きわめて重要である。Furthermore, in the LS method, although it is highly productive to scan a straight line, scanning a curved line in a complicated manner slows down the scanning speed, resulting in an increase in price. For this reason, when creating an integrated structure in the LS method, it is industrially extremely important to achieve this with linear open grooves.
本発明はかかる特長を十分用いることによる光電変換装
置の周辺部即ち側端部の構造および製造方法に関する。The present invention relates to a structure and manufacturing method of a peripheral portion, that is, a side end portion, of a photoelectric conversion device by making full use of such features.
本発明においては、このスクライブ工程がマイりIコ・
コンピュータを併用することによりきわめて簡単かつ高
粘度であり、装置の製造コス)・の低下をもたらした。In the present invention, this scribing process is
By using a computer, it is extremely simple and has a high viscosity, resulting in a reduction in the manufacturing cost of the device.
そのため500円/Wの製造も可能となり、その製造規
模の拡大により100〜200円/Wも可能となるとい
うきわめて画期的な光電変換装置を提イバすることによ
る。Therefore, it is possible to manufacture a photoelectric conversion device at a cost of 500 yen/W, and by expanding the manufacturing scale, it becomes possible to produce a photoelectric conversion device at a cost of 100 to 200 yen/W.
さらG二本発明においてはこのレーザスクライブ工程を
用いるに加えて、そのスクライブラインの合わせ精度に
冗長(余裕)度をもたせたことが重要である。そのため
隣合った素子間の第1の電極(下側)と他の素子の第2
の電極(上側電極)とが第2の電極より延在したリード
により第1の電極とその側面において電気的に連結させ
ることにより、スクライブラインの開溝の位置に冗長度
を持たせることができた。Furthermore, in the present invention, in addition to using this laser scribing process, it is important to have a degree of redundancy (margin) in the alignment accuracy of the scribe lines. Therefore, the first electrode (lower side) between adjacent elements and the second electrode of other elements
By electrically connecting the second electrode (upper electrode) to the first electrode on its side surface through a lead extending from the second electrode, redundancy can be provided in the position of the open groove of the scribe line. Ta.
第1図は本発明を用いた光電変換装置のパネル(50)
を上面より示したものである。即ち、図面において、光
電変換素子(31)、< 11 )は連結部(12)を
経て直列に連結して集積化されている。外部引出し電極
は(5)、(43)に両fai1部が設けられている。Figure 1 shows a panel (50) of a photoelectric conversion device using the present invention.
is shown from the top. That is, in the drawing, the photoelectric conversion elements (31) < 11 ) are connected in series through the connection part (12) and integrated. Both fai1 portions of external extraction electrodes are provided at (5) and (43).
パネルの上端、下線に枠と電気的にショートしないよう
に分離?a (62)が設けられている。Separate the top edge of the panel and the underline to prevent electrical short-circuiting with the frame? a (62) is provided.
この本発明の分離溝を特に設けたことにより、光電変換
装置の有効面積を精密に規定することができ、さらにこ
の分離溝の外側に導電膜が存在しても(即ちマスクを用
いないため被膜が基板全面に一般に作製される)この残
存導電膜と素子とを完全に電気的に分離することが可能
となった。By specifically providing the separation groove of the present invention, it is possible to precisely define the effective area of the photoelectric conversion device, and furthermore, even if a conductive film exists outside the separation groove (i.e., since no mask is used, the This makes it possible to completely electrically isolate the remaining conductive film (which is generally formed over the entire surface of the substrate) from the device.
第1図のパネルにおいて、その大きさは20cm x6
0cm、 40cmX120cm、40cmX60cm
等の任意の大きさを設計によって得ることができる。In the panel shown in Figure 1, its size is 20cm x 6
0cm, 40cmX120cm, 40cmX60cm
Any size can be obtained by design.
第1図における(A−A’)の縦断面図を第2図に示す
。(B−B’)の縦断面図を第3図(A )、(C−C
′)の縦断面図を第3図(B)に示してGする。FIG. 2 shows a vertical cross-sectional view along line (AA') in FIG. 1. Figure 3 (A) and (C-C
') is shown in FIG. 3(B).
さらに本発明の端部の構造を(D−D’)の縦断面図を
第4図(B)に、(E)を第4図(A:+ cこ拡大し
て示している。番号はそれぞれに対応させている。Further, the structure of the end portion of the present invention is shown in FIG. 4 (B) as a vertical cross-sectional view along (D-D'), and in FIG. 4 (E) enlarged as in FIG. It corresponds to each.
第2図は第1図(A −A“)の縦断面図を示す。即ち
、光電変換装置の製造工程を示す縦断面図であ第2図、
第4図において絶縁表面を有する基板例えば透光性基板
(1)即ちガラス板(例えば厚さ1.2 mm、、長さ
く図面では左右方向) 60cm、 I’p20cm)
を用いた。さらにこの上面に全面にわたって透光性導電
膜例えばITO(約1500人) +5n02 (20
0〜400人)またはハロゲン元素が添加された酸化ス
ズを主成分とする透光性導電膜(1500〜2000人
)を真空蒸着法、LP CVD法、プラズマCVD法ま
たはスプレー法により形成させた。この第1の導電膜は
外部引出し電極部においては不要であるか、マスクを用
いた型造価格の上昇を避りた。かくして第1図における
周辺部(59)にもCTFが同時に形成される。この後
この基板の下側または上側よりYAG レーザ加工機(
日本レーザM)により出力0.5〜3W出力を加え、ス
ボソ1−径30〜70μφ代表的には50μφをマイク
ロ・コンピュータを制御して照射し、その走査によりス
クライブライン用開溝(13)、<13’)を形成させ
、各素子領域間および外部引出し電極領域を分割した。FIG. 2 shows a vertical cross-sectional view of FIG. 1 (A-A"). That is, FIG.
In Fig. 4, a substrate having an insulating surface, for example, a transparent substrate (1), that is, a glass plate (for example, thickness 1.2 mm, length in left and right direction in the drawing: 60 cm, I'p 20 cm)
was used. Furthermore, a light-transmitting conductive film such as ITO (approximately 1500 people) +5n02 (20
A transparent conductive film (1,500 to 2,000 samples) mainly composed of tin oxide to which a halogen element was added was formed by a vacuum evaporation method, an LP CVD method, a plasma CVD method, or a spray method. This first conductive film is not necessary in the external lead-out electrode portion, or an increase in molding cost due to the use of a mask is avoided. In this way, CTF is simultaneously formed also in the peripheral area (59) in FIG. After this, from the bottom or top of this board, use a YAG laser processing machine (
Applying an output of 0.5 to 3 W using a Nippon Laser M), a micro-computer is controlled to irradiate the surface with a diameter of 30 to 70 μΦ, typically 50 μΦ, and the scanning creates an open groove for the scribe line (13), <13') to divide each element region and external extraction electrode region.
そして第1の電極を作製した。Then, a first electrode was produced.
この第1のLSにより形成された開溝(13)、<13
’)は巾約50μ、長さ20cmとし、深さは第1の電
極それぞれを完全に切断分離した。この長さは基板第1
図における上端から下端まで通り抜けている。Open groove (13) formed by this first LS, <13
') had a width of about 50 μm and a length of 20 cm, and the depth was such that each of the first electrodes was completely cut and separated. This length is the first
It passes through from the top end to the bottom end in the figure.
かくして外部引出し電極領域(5)、第1の素子領域(
31)および第2の素子領域(11)を構成させた。こ
れらの素子のl」は10〜20mmとした。In this way, the external extraction electrode region (5), the first element region (
31) and the second element region (11) were constructed. The l'' of these elements was 10 to 20 mm.
さらにこの第1の開溝(13)、<13’>とは直角方
向に第1の枠周の開溝を第4図におりる(5G)に示す
ごとくに作製した。この第1の枠周の開溝(56)は端
部(70)より1mmの巾で内側に設けた。Furthermore, an open groove on the circumference of the first frame was formed in a direction perpendicular to the first open grooves (13) and <13'> as shown in (5G) in FIG. The opening groove (56) around the first frame was provided inside the end (70) with a width of 1 mm.
この後この上面にプラズマCVD法またはLPCVI)
法、光cvn法、光プラズマCVD法、LT CVI)
法(110110、CVD法ともいう)によりPNまた
はpxNls合を有する非単結晶半導体層(3)を0.
2〜1.0μイし表的には0.4〜0.6 μの厚さに
形成させノこ。その代表例はP型半導体(SixC1−
×x −fl、850=150人)(42)−1型アモ
ルファスまたはセミアモルファスのシリコン半導体(0
,4〜0,6μX43) −N型 。After this, plasma CVD method or LPCVI) is applied to this upper surface.
method, optical CVN method, optical plasma CVD method, LT CVI)
A non-single crystal semiconductor layer (3) having a PN or pxNls combination is formed by a method (110110, also referred to as a CVD method) at a temperature of 0.
The saw is formed to a thickness of 2 to 1.0 microns, and typically 0.4 to 0.6 microns. A typical example is a P-type semiconductor (SixC1-
×x - fl, 850 = 150 people) (42) - type 1 amorphous or semi-amorphous silicon semiconductor (0
,4~0,6μX43) -N type.
(D’dl結晶(400〜200人)を存する半導体(
44)よりなる1つのPIN接合を有する非fli結晶
半導体(3)を形成させた。この半導体として、■)型
半導体(SixC1−x) I型Si半導体−N型Si
半導体−P型31半導体−I型5ixGc l−X半導
体−N型半導体よりなる2つのPIN接合と1つのII
N接合を有するクンテム型のPINP■N・・・・・P
IN接合の半導体(3)としてもよい。(Semiconductors containing D'dl crystals (400-200)
A non-fli crystalline semiconductor (3) having one PIN junction consisting of (44) was formed. As this semiconductor, ■) type semiconductor (SixC1-x) I type Si semiconductor - N type Si
Semiconductor - P type 31 semiconductor - I type 5ixGc l-X semiconductor - Two PIN junctions and one II consisting of N type semiconductor
Kuntem type PINP with N junction ■N...P
It may also be an IN junction semiconductor (3).
かかる非単結晶半導体(3)をC’l’li (2)
lの第1の開講(13)、<13’)、ざらに第1の枠
用開溝(56)上の全面にわたって均一の膜厚で形成さ
・ヒた。さらに第2図(B)に示されるごとく、第1の
開溝(13)の左側に第2の開溝(18)を50μの+
1Jに100〜500μの距離(17)をわたらせて第
2のLSI程により形成させた。このレーデはガラス(
1)の下方向またはこの基板の上あのいずれからも行っ
てよい。Such a non-single crystal semiconductor (3) is C'l'li (2)
In the first opening (13), <13'), the film is formed with a uniform thickness over the entire surface of the first frame groove (56). Furthermore, as shown in FIG. 2(B), a second groove (18) with a thickness of 50 μm is formed on the left side of the first groove (13).
The second LSI was formed over a distance (17) of 100 to 500 μ in 1J. This lede is made of glass (
1) It may be carried out either from below or from above this substrate.
かくして第2の開溝(18)は第1の電極の側面(8)
、< 9 )を露出させた。この第2の開溝により形成
された第1の電極の右側の側面(9)の存在は第1の電
極(37)の側面(1G)より左側の第1の素子の第1
の電極位置上にわたって設りられていることが特徴であ
る。そして第2図(B)に示されるごとく、第1の電極
(31)の内部に入ってしまうことにより、第1の電極
の側面を(8)、< 9 )と露出せしめている。かく
することにより第1の素子の第1の電極(37)の一部
が第2の開溝の右側に残存している。かかる残存領域か
ない場合、レーザ光の高熱(〜2000°C)によりC
TIン (2)よりもはるかに加工されやすいため、第
1の開溝(13)に充填された半導体が吹きflにんで
しまう。The second open groove (18) thus forms a side surface (8) of the first electrode.
, < 9) were exposed. The existence of the right side surface (9) of the first electrode formed by this second groove causes the first
It is characterized by being provided over the electrode positions. As shown in FIG. 2(B), by entering the inside of the first electrode (31), the side surface of the first electrode (8) is exposed. As a result, a portion of the first electrode (37) of the first element remains on the right side of the second groove. If there is no such remaining area, the high heat (~2000°C) of the laser beam will cause
Since it is much easier to process than the TI in (2), the semiconductor filled in the first groove (13) is blown away.
そのため第1および第2の素子の第1の電極間のアイソ
レイションが不可能になる。このことより第2図(B)
に示すごとく、第2の開溝が第1の電極の内部に入って
設けられていることはきわめて重要である。この(9)
の部分に残存するC T Fは50〜500μの巾を有
せしめた。このレーザ光か1〜5Wで多少強ずぎてこの
CTF (37)の深さ方向のすべてを除去してしまい
、その結果側面(8)に第2図(C)で第2の電極(3
8)を密接させても実用上同等問題はない。即ぢシー9
′光の出力パルスの強さに余裕を与えることができるこ
とが本発明の工業的応用の際きわめて重要である。Therefore, isolation between the first electrodes of the first and second elements becomes impossible. From this, Figure 2 (B)
It is very important that the second groove is provided inside the first electrode, as shown in FIG. This (9)
The CTF remaining in the portion was made to have a width of 50 to 500μ. This laser beam was somewhat strong at 1 to 5 W and removed the entire CTF (37) in the depth direction, resulting in the formation of a second electrode (3) on the side surface (8) as shown in Figure 2 (C).
8), there is no practical equivalent problem even if they are placed closely together. Immediate sea 9
'The ability to provide a margin for the intensity of the output pulse of light is extremely important in industrial applications of the present invention.
第2図において、さらにこの上面に第2図(C)に示さ
れるごとく、裏面の第2の電極(4)を形成し、さらに
第3のLS法により、切11i分離用の第3の開m (
20)を設けた。In FIG. 2, as shown in FIG. 2(C), a second back electrode (4) is further formed on this upper surface, and a third opening for separating the cut 11i is formed by the third LS method. m (
20) was established.
この第2の電極(4)は透光性導電膜を700〜140
0人の厚さにITO、(酸化インジ5.−ムスズ)によ
り形成し、さらにその上面に反射性金17Aの銀、アル
ミニュームまたはクロムを300〜3000人の)gさ
に形成した。さらにその上面に、銅、アルミニュームま
たはアルミニュームとニッケルとの2(ヨ膜を形成させ
た。例えば、ITOを1050人、クロムを500人、
銅を1000人、さらにニッケルを1500人の3層構
造とした。このITOと反則性全屈は裏面側での入射光
(10)の反射を促し、600〜800 II mの長
波長光を有効に光電変換させるためのものである。さら
にニッケルは外部引出し?′h極部(5)においてバン
ド(49)と外部接続体(23)との密着性を向上させ
るためのものである。これらは電rビーム蒸着法または
プラズマCvD法を用いて4″−合体層(3)を劣化さ
せない300°C以下の611!L度で形成させた。This second electrode (4) has a transparent conductive film of 700 to 140
It is formed of ITO (indium oxide 5.-m tin oxide) to a thickness of 0.0 g, and reflective gold 17A, silver, aluminum, or chromium is further formed on its upper surface to a thickness of 300 to 3000 g. Furthermore, a film of copper, aluminum, or aluminum and nickel was formed on the top surface. For example, 1050 layers of ITO, 500 layers of chromium,
It has a three-layer structure with 1,000 copper layers and 1,500 nickel layers. This ITO and total refractory refraction promote reflection of incident light (10) on the back surface side and effectively photoelectrically convert long wavelength light of 600 to 800 II m. Furthermore, is the nickel an external drawer? This is to improve the adhesion between the band (49) and the external connector (23) at the 'h pole part (5). These were formed using an electric r-beam evaporation method or a plasma CVD method at a temperature of 611!L degrees below 300° C., which does not deteriorate the 4″-coalescence layer (3).
このITOは半導体(3)と裏面電極(4)との化学反
応による信頼性低下の防止、即し信頼性の向上にも役立
っている。This ITO also helps to prevent a decrease in reliability due to a chemical reaction between the semiconductor (3) and the back electrode (4), thereby improving reliability.
かくのごとき裏面電極をレーザ光を上方より照射して第
2の電極を切断分離して第3の開溝(20)(rl15
0μ)を形成した場合を示している。このレーザ光は半
導体特に−(二面に密接するNまたばI)型の半導体屑
をえくりだしく40) llA合った第1の素子(31
)、第2の素子(11)間の開溝部での残存金属または
導電性半導体によるクロスト−り(リーク電流)の発生
を防止した。The back electrode is irradiated with a laser beam from above to cut and separate the second electrode to form a third open groove (20) (rl15).
0 μ) is shown. This laser light excites the semiconductor, especially the - (N or I) type semiconductor chips that are in close contact with the two surfaces.
), the occurrence of crosstalk (leakage current) due to residual metal or conductive semiconductor in the open groove between the second elements (11) was prevented.
特にこの半導体(3)がP型半導体層(42ン、■型半
導体層(43)、N型半導体層(44)と例えば1つの
PIN接合を有し、このN型半導体層が微結晶または多
結晶構造を有する場合、1〜200(Ωc m )−’
と高い電気伝導度を持つ。このためN型導電性半導体層
をえぐり出して除ノにし、凹B1;に真性半導体を設け
てリーク電流発生を防止することはきわめて重要であっ
た。このえぐりだしはI型半導体層を越え、第1の電極
用0CTI+にまで達成しないことが好ましい。この1
層の表面を酸化して酸化珪素とすると、さらにリーク電
流を少なくすることができた。In particular, this semiconductor (3) has, for example, one PIN junction with a P-type semiconductor layer (42), a ■-type semiconductor layer (43), and an N-type semiconductor layer (44), and this N-type semiconductor layer is microcrystalline or polycrystalline. If it has a crystal structure, 1 to 200 (Ωcm)-'
and has high electrical conductivity. For this reason, it was extremely important to hollow out the N-type conductive semiconductor layer to remove dirt and provide an intrinsic semiconductor in the recess B1 to prevent the generation of leakage current. It is preferable that this gouging does not go beyond the I-type semiconductor layer and do not reach 0CTI+ for the first electrode. This one
By oxidizing the surface of the layer to silicon oxide, leakage current could be further reduced.
本発明はレーザ光により開溝形成を第2の電極のめでな
く、その下側の0.2μ以上ある1型半導体層の厚さ分
の余裕を開溝91S (20)の形成の作業工程にもた
せることが工業上重要である。The present invention uses a laser beam to form an open groove, not just on the second electrode, but in the process of forming the open groove 91S (20) with a margin equal to the thickness of the type 1 semiconductor layer, which is 0.2μ or more below the second electrode. It is industrially important to maintain the strength.
さらに第4図に示すごとく、第1の枠角の開溝(56)
の端部側に第2の枠角の開溝(57)を形成し、分離溝
(62)を構成させた。この第2の枠角開溝は少なくと
も第2の導電11Q(4)をえ(り出ずことが重要であ
る。その面を第2図(C)における第3の開溝と同一レ
ーザ出力で形成してもよい。しかしさらに強くして第4
図(B)に示すごとく、その下の半導体(3)、第1の
導?Ii膜(2)をも同時切断してしまうことは製造上
きわめて容易であり、この時、第1の枠角開溝(56)
との間に間隙を50〜500 μ有し、ここにcrI+
(61)を残存させ、第2の開溝の形成により第1の開
14Xj内に充填されている半4K (7])が飛び散
ってしまうことを防いだ。Further, as shown in Fig. 4, the first frame corner opening groove (56)
An open groove (57) having a second frame angle was formed on the end side of the frame to form a separation groove (62). It is important that this second frame angle groove does not protrude at least the second conductive 11Q (4).The surface of this second frame corner groove should be exposed to the same laser output as the third groove in FIG. 2(C). However, it may be made stronger to form a fourth
As shown in Figure (B), the semiconductor (3) below, the first conductor? It is extremely easy to cut the Ii film (2) at the same time, and at this time, the first frame corner opening groove (56)
There is a gap of 50 to 500 μ between the crI+
(61) remained, and the formation of the second opening 14Xj prevented the half 4K (7]) filled in the first opening 14Xj from scattering.
かくして第2図(C’)に示されるごとく、複数の素子
(31>、(11)を連結部(12)で直列接続した。Thus, as shown in FIG. 2 (C'), a plurality of elements (31>, (11)) were connected in series at the connecting portion (12).
同時に外部引出し電極(5)を鍔環余分の工程を加える
ことなしに作製することができ、光電変換装置としての
LS方式による低価格製造が可能となった。At the same time, the external extraction electrode (5) can be manufactured without adding an extra process to the collar ring, making it possible to manufacture the photoelectric conversion device at low cost using the LS method.
第2図(D〉、第4図(B)はさらに本発明を光電変換
装置として完成させんとしたものであり、即ちパフシヘ
イション膜としてプラズマ気相法により窒化珪素膜(2
1)を500〜2000人の厚さに形成させ、各素子間
のリーク電流の発生を防いだ。Figures 2 (D) and 4 (B) show the present invention being further completed as a photoelectric conversion device, that is, a silicon nitride film (2
1) was formed to a thickness of 500 to 2,000 to prevent leakage current between each element.
これらにポリイミド、ポリアミド、カプトンまたはエポ
キシ等の有機樹脂(22)を充填した。These were filled with an organic resin (22) such as polyimide, polyamide, Kapton or epoxy.
かくして照射光(10)に対し、この実施例のことき基
板(60cm X 20cm)において、各素子を11
」14.35 mm、連結部(12)の11月5011
、外部引出し電極部(5)のIf]10mm、周辺部(
69) 4mmにより有りJ面積(192mm X14
.35 mmX40段 1102cnt即ら91.8%
)を得ることができた。その結果、セグメントが10.
6%の変換効率を有する場合、パネルにて9.7%(Δ
Ml (100mW / cJ) )にて11.(iW
の出力電力を有せしめることができた。Thus, for the irradiation light (10), each element was 11
” 14.35 mm, connection part (12) November 5011
, If of external extraction electrode part (5)] 10 mm, peripheral part (
69) 4mm J area (192mm x 14
.. 35 mm x 40 steps 1102 cnt or 91.8%
) was able to be obtained. As a result, the segment is 10.
If the conversion efficiency is 6%, the panel will have a conversion efficiency of 9.7% (Δ
Ml (100mW/cJ)) at 11. (iW
It was possible to have an output power of .
さらに金属マスクをまった(用いないため、大面積パネ
ルの製造工程において何等の工業上の支障がなく、大電
力発生用の大面積低価格大量生産用にきわめて通してい
る。Furthermore, since no metal mask is used, there is no industrial problem in the manufacturing process of large-area panels, making it extremely suitable for large-area, low-cost mass production for generating large amounts of power.
以上のYAGレーザのスポット層をその出力3〜5W(
30μ〉、5〜8W(50μ)で用いノこ場合であるが
、さらにそのスポット径を技術思想において小さくする
ことにより、この連結部をより小さく、ひいては光電変
換装置としての有効面積をより向上させることができる
という進歩性を有している。The above YAG laser spot layer has an output of 3 to 5 W (
30μ>, 5 to 8W (50μ), but by further reducing the spot diameter based on the technical concept, this connection part can be made smaller and the effective area as a photoelectric conversion device can be further improved. It has an inventive step in that it can be done.
第3図は本発明の外部引出し電極(5)、<41)を第
1図(B−B’)、(C−C’)に対応してその縦断面
図で示す。FIG. 3 shows the external extraction electrode (5), <41) of the present invention in a longitudinal sectional view corresponding to FIG. 1 (BB'), (CC').
第3図(A)は第1の外部引出し電極部の+11造を示
し、第2図に対j応しているが、外B]9引出し電極部
(5)は外部接続体(47)に接触するバノ1−(49
)を有し、このパッド(49)は隣の素子の第2の電極
(上側電極)(4)と連結している。この時、外部接続
体(47)の加圧が強すぎて、パノ1−(49)がその
下の第1の4電膜(53)に半導体(3)を突き抜けて
ショートしても、隣の素子の第1の電極(2)とショー
1−シないように開溝(13’)を設け、電極部(5)
の第1のバット (49)とその隣に位置している素子
の第1の電極(2)とを電気的に離間させている。まノ
こ外側部は基板(1)の端部であり、導体、半導体とも
側面(20’)により切断分離され一ζいる。Figure 3 (A) shows the +11 structure of the first external lead-out electrode part and corresponds to Figure 2, but the outside B]9 lead-out electrode part (5) is connected to the external connection body (47). Contact Bano 1-(49
), and this pad (49) is connected to the second electrode (upper electrode) (4) of the adjacent element. At this time, even if the pressure on the external connection body (47) is too strong and the pano 1- (49) penetrates the semiconductor (3) to the first four-electrode film (53) below it and short-circuits, An open groove (13') is provided so as not to be in contact with the first electrode (2) of the element, and the electrode part (5)
The first butt (49) of the element is electrically separated from the first electrode (2) of the element located next to it. The outside part of the saw is the end of the substrate (1), and both the conductor and the semiconductor are cut and separated by the side surface (20').
さらに第3図(B)は第2の外91(引出し電極部の構
造を示している。この第2の電極部は、1々の光電変換
素子の下側の第1の電極(2)の側面(55)にバンド
(48)が第2の導電性材料により(1B’>にて連結
して設けられている。さらにバンド(48)は外部接続
体(46)と電気的に連結接触している。ここでも開溝
(20′す、端a++ <2o”>によリパノl” (
,18)はまったく他の光電変換素子と電気的に分離さ
れており、1つのパネルで合わせ用マスクをまったく用
いることなしに光電変換装置を作ることができるという
特徴を自する。Furthermore, FIG. 3(B) shows the structure of the second outer 91 (extracting electrode part). A band (48) is connected to the side surface (55) by a second conductive material (1B'>). Furthermore, the band (48) is in electrical connection contact with the external connector (46). Here too, there is an open groove (20', end a++ <2o"> with lipano l" (
, 18) are completely electrically isolated from other photoelectric conversion elements, and have the feature that a photoelectric conversion device can be manufactured using one panel without using any alignment mask.
第4図は本発明の第1図におり)る(]) −D’)お
よび(E)の拡大図である。FIG. 4 is an enlarged view of (]) -D') and (E) in FIG. 1 of the present invention.
第4図(A)において、2つの素子(31)、< 11
)および連結部(12)を有している。側端部(70
)およびその近傍におい°ζも、第4図(13)に示す
ごとく、CTF (59)、第2の導電膜(58)が残
存してしまう。このため、これらの導体が残存しても素
子(31)、<11)の特性が劣化しないようにするこ
と、さらにこの導体(69)が残存しても、ここの部分
を外枠(60)で固定することが可能な構造を有せしめ
ている。即ち、基板の側端部にそって、第1の導電1漠
(2)は第1の枠角の開溝(56)を形成している。さ
らにこの第1の枠角の開溝を覆って、半導体(3)、第
2の導電jI史(4)を形成する。その後、第1の枠角
の開溝(56)のα1;1側にわたって第2の枠角の開
a(57)を設げ、この開溝をLSにより作り、導体(
2>、< 4 )、半導体(3)を切断分離している。In FIG. 4(A), two elements (31), < 11
) and a connecting portion (12). Side edge (70
) and in the vicinity thereof, the CTF (59) and the second conductive film (58) remain, as shown in FIG. 4 (13). Therefore, even if these conductors remain, it is necessary to prevent the characteristics of the element (31), <11) from deteriorating, and furthermore, even if this conductor (69) remains, this part must be connected to the outer frame (60). It has a structure that allows it to be fixed in place. That is, along the side edge of the substrate, the first conductive groove (2) forms an open groove (56) with a first frame angle. Further, a semiconductor (3) and a second conductive layer (4) are formed to cover the opening groove of the first frame corner. After that, an opening a (57) of a second frame angle is provided over the α1;1 side of the opening groove (56) of the first frame angle, and this opening groove is made by LS, and the conductor (
2>, <4), the semiconductor (3) is cut and separated.
すると第2の導電膜(4)と第1の導電膜(61)とが
ショー1−シても、第1の枠角の開溝(56)により電
極(2)、(4)間のショートを防ぐことができる。ま
た、アルミザノシ、炭素繊維等による枠(60)により
、導体(69)が加圧され、ショー1−シても、素子(
31>、< 11 )は何等の特性劣化がない。即ち、
側端部は2つの枠角の開溝(56)、<57)による分
l14It渦(62)により初めて安定に外枠等により
機械的に補強することができた。そしてこの外枠によっ
て素子が劣化することがなく、樹脂(63)で枠と光電
変換装置と固めても、十分信頼性の高い装置とすること
か可能となった。Then, even if the second conductive film (4) and the first conductive film (61) are connected to each other, a short circuit between the electrodes (2) and (4) is caused by the opening groove (56) at the first frame corner. can be prevented. Moreover, the conductor (69) is pressurized by the frame (60) made of aluminum shavings, carbon fiber, etc.
31>, <11), there is no characteristic deterioration of any kind. That is,
For the first time, the side edges could be stably mechanically reinforced by the outer frame, etc., due to the vortex (62) formed by the two frame angle open grooves (56), <57). This outer frame does not cause any deterioration of the element, and even if the frame and the photoelectric conversion device are hardened together with resin (63), it is possible to obtain a sufficiently reliable device.
またさらにこのパネル例えば40cm X 20cmま
たは60cm X 20cmを6ケまたは4ヶ直列に枠
内に組め合わせることによりパッケージされ、120c
m X40CIllのNEDO規格の大電力用のパネル
を設けることが可能である。Furthermore, this panel is packaged by assembling 6 or 4 panels in series in a frame, for example, 40cm
It is possible to provide a high power panel of NEDO standard of mX40CIll.
またこのNEDO規格のパネルはシーフレックスにより
他のガラス板を本発明の光電変換装置1ffiの反対面
側(図面では上側)にはりあわせて合わせガラスとし、
その間に光電変換装置を配置し、風圧、雨等に対し機械
強度の増加を図ることもを効である。In addition, this NEDO standard panel is made by laminating another glass plate using Seaflex on the opposite side (upper side in the drawing) of the photoelectric conversion device 1ffi of the present invention,
It is also effective to place a photoelectric conversion device between them to increase mechanical strength against wind pressure, rain, etc.
第1図〜第4図において光入射は下側のガラス板よりと
した。しかし本発明はその光の入射側を下側に限定する
ものではない。In FIGS. 1 to 4, light was incident from the lower glass plate. However, the present invention does not limit the light incident side to the lower side.
即ち、基板を可曲性の絶縁表面を有する基板例えばアル
ミニュームを陽極化成させたものを用い、上面の第2の
電極を11゛0のみとすることにより、上面よりの入射
による光電変換を行うことを可能とする。That is, by using a substrate having a flexible insulating surface, such as anodized aluminum, and setting the second electrode on the top surface to only 11゛0, photoelectric conversion is performed by incidence from the top surface. make it possible.
第1図は本発明の光電変換装H’lのパネルである。
第2図は本発明の光電変換装置の製造工程を示す縦断面
図である。
第3図、第4図は本発明の第1図の光電変換装置を拡大
して示した縦断面図である。FIG. 1 shows a panel of the photoelectric conversion device H'l of the present invention. FIG. 2 is a longitudinal sectional view showing the manufacturing process of the photoelectric conversion device of the present invention. 3 and 4 are enlarged vertical cross-sectional views of the photoelectric conversion device of FIG. 1 of the present invention.
Claims (1)
極と、該電極上に非単結晶半導体と、該半導体上に第2
の導電膜の第2の電極とを有する光電変換素子を複数個
互いに電気的に直列接続せしめ、前記基板上に配設した
光電変換装置の周辺部においζ、前記基板端部近傍にお
ける前記第1の導電1模を前記素子の第1の電極と電気
的に離間する第1の枠周の開溝を設け、該開溝を覆って
前記非単結晶半導体と前記第2の導電膜とを設け、少な
くとも該第2の導電膜を前記第1の枠周開溝より端部側
にて前記開溝に添って第2の開溝を設けることにより前
記基板端部近傍における前記第1または第2の導電膜と
前記素子の第1または第2の電極とを電気的に分離して
設けたことを特徴とする光電変換装置。 2、絶縁表面を有する基板上に第1の導電膜を形成する
工程と、該導電膜に第1の開溝を形成して隣合う光電変
換素子の第1の電極を離間せしめるとともに前記基板の
端部近傍において端部に添って周辺部に第1の枠周の開
溝を形成する工程と、前記素子領域、前記第1の開溝、
前記第1の枠周の開溝を覆って非単結晶半導体と該半導
体上に第2の導電膜とを形成する工程と、前記素子の第
2の導電膜を離間して複数の素子の第2の電極を形成す
るとともに、前記基板の端部に添って少なくとも前記第
2の導電膜に対し、前記基板端部近傍にて枠周の第2の
開溝を前記第1の枠周の開溝の端部側に形成することに
より前記第2の枠周の開溝と前記基板の端部との間に残
存する前記第1および第2の導電膜が前記素子と電気的
に分離して形成させたことを特徴とする光電変換装置作
製方法。 3、特許請求の範囲第2項において、枠周の開講はレー
ザ光を照射して形成することを特徴とする光電変換半導
体装置作製方法。[Claims] (1) A first electrode of a first conductive film on a substrate having an insulating surface, a non-single crystal semiconductor on the electrode, and a second electrode on the semiconductor.
A plurality of photoelectric conversion elements each having a second electrode of a conductive film are electrically connected to each other in series, and a plurality of photoelectric conversion elements having a second electrode of a conductive film and a second electrode of a conductive film are electrically connected to each other in series. A groove is provided around a first frame that electrically separates the conductive pattern from the first electrode of the element, and the non-single crystal semiconductor and the second conductive film are provided to cover the groove. , by providing at least the second conductive film with a second open groove along the open groove on the end side of the first frame circumferential open groove, the first or second conductive film in the vicinity of the edge of the substrate is A photoelectric conversion device characterized in that a conductive film and a first or second electrode of the element are electrically separated from each other. 2. Forming a first conductive film on a substrate having an insulating surface, forming a first groove in the conductive film to separate first electrodes of adjacent photoelectric conversion elements, and forming a first conductive film on the substrate. a step of forming a first frame circumferential open groove in the peripheral portion along the end near the end; the element region; the first open groove;
a step of forming a non-single crystal semiconductor and a second conductive film on the semiconductor so as to cover the opening groove around the first frame; 2 electrodes are formed along the edge of the substrate, and at least the second conductive film is formed with a second groove on the frame periphery near the edge of the substrate and an opening on the first frame periphery. By forming the first and second conductive films on the edge side of the groove, the first and second conductive films remaining between the open groove around the second frame and the edge of the substrate are electrically isolated from the element. A method for manufacturing a photoelectric conversion device, characterized by forming a photoelectric conversion device. 3. A method for manufacturing a photoelectric conversion semiconductor device according to claim 2, characterized in that the opening of the frame periphery is formed by irradiating laser light.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58168555A JPS6059785A (en) | 1983-09-12 | 1983-09-12 | Photoelectric conversion device and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58168555A JPS6059785A (en) | 1983-09-12 | 1983-09-12 | Photoelectric conversion device and manufacture thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6059785A true JPS6059785A (en) | 1985-04-06 |
JPH0566754B2 JPH0566754B2 (en) | 1993-09-22 |
Family
ID=15870193
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58168555A Granted JPS6059785A (en) | 1983-09-12 | 1983-09-12 | Photoelectric conversion device and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6059785A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60100482A (en) * | 1983-11-05 | 1985-06-04 | Semiconductor Energy Lab Co Ltd | Manufacture of photoelectric converting semicoductor device |
JPS60100480A (en) * | 1983-11-04 | 1985-06-04 | Semiconductor Energy Lab Co Ltd | Manufacture of photoelectric converter |
JPS60100479A (en) * | 1983-11-04 | 1985-06-04 | Semiconductor Energy Lab Co Ltd | Photoelectric converter |
JPS60100481A (en) * | 1983-11-05 | 1985-06-04 | Semiconductor Energy Lab Co Ltd | Photoelectric converting semiconductor device |
JPS62242371A (en) * | 1986-04-14 | 1987-10-22 | Sanyo Electric Co Ltd | Manufacture of photovoltaic device |
US4963600A (en) * | 1988-12-19 | 1990-10-16 | E. I. Du Pont De Nemours And Company | Chroma neutralization of clear coats by adding pigment dispersions |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5712568A (en) * | 1980-06-02 | 1982-01-22 | Rca Corp | Method of producing solar battery |
JPS5753986A (en) * | 1980-07-25 | 1982-03-31 | Eastman Kodak Co | |
JPS5996778A (en) * | 1982-11-24 | 1984-06-04 | Semiconductor Energy Lab Co Ltd | Manufacture of photoelectric conversion device |
JPS5996783A (en) * | 1983-09-12 | 1984-06-04 | Semiconductor Energy Lab Co Ltd | Photoelectric conversion device |
JPS5996779A (en) * | 1982-11-24 | 1984-06-04 | Semiconductor Energy Lab Co Ltd | Photoelectric conversion device |
-
1983
- 1983-09-12 JP JP58168555A patent/JPS6059785A/en active Granted
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5712568A (en) * | 1980-06-02 | 1982-01-22 | Rca Corp | Method of producing solar battery |
JPS5753986A (en) * | 1980-07-25 | 1982-03-31 | Eastman Kodak Co | |
JPS5996778A (en) * | 1982-11-24 | 1984-06-04 | Semiconductor Energy Lab Co Ltd | Manufacture of photoelectric conversion device |
JPS5996779A (en) * | 1982-11-24 | 1984-06-04 | Semiconductor Energy Lab Co Ltd | Photoelectric conversion device |
JPS5996783A (en) * | 1983-09-12 | 1984-06-04 | Semiconductor Energy Lab Co Ltd | Photoelectric conversion device |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60100480A (en) * | 1983-11-04 | 1985-06-04 | Semiconductor Energy Lab Co Ltd | Manufacture of photoelectric converter |
JPS60100479A (en) * | 1983-11-04 | 1985-06-04 | Semiconductor Energy Lab Co Ltd | Photoelectric converter |
JPH0566755B2 (en) * | 1983-11-04 | 1993-09-22 | Handotai Energy Kenkyusho | |
JPH0566756B2 (en) * | 1983-11-04 | 1993-09-22 | Handotai Energy Kenkyusho | |
JPS60100482A (en) * | 1983-11-05 | 1985-06-04 | Semiconductor Energy Lab Co Ltd | Manufacture of photoelectric converting semicoductor device |
JPS60100481A (en) * | 1983-11-05 | 1985-06-04 | Semiconductor Energy Lab Co Ltd | Photoelectric converting semiconductor device |
JPH0476227B2 (en) * | 1983-11-05 | 1992-12-03 | Handotai Energy Kenkyusho | |
JPH0476226B2 (en) * | 1983-11-05 | 1992-12-03 | Handotai Energy Kenkyusho | |
JPS62242371A (en) * | 1986-04-14 | 1987-10-22 | Sanyo Electric Co Ltd | Manufacture of photovoltaic device |
US4963600A (en) * | 1988-12-19 | 1990-10-16 | E. I. Du Pont De Nemours And Company | Chroma neutralization of clear coats by adding pigment dispersions |
Also Published As
Publication number | Publication date |
---|---|
JPH0566754B2 (en) | 1993-09-22 |
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