JPH05299595A - Formation method of source and drain electrode of mos semiconductor device - Google Patents

Abstract

PURPOSE:To enable a source and a drain electrode to be lessened in contact resistance without deteriorating a MOS semiconductor device in densification by a method wherein the source electrode and the drain electrode are increased in contact area with regions without enlarging a contact hole. CONSTITUTION:A semiconductor substrate 1 is subjected to anisotropic etching to dig down the bases of contact holes 5 and 6 for the formation of V-shaped grooves 3a and 4a in impurity diffusion regions 3 and 4 respectively. Aluminum is deposited and patterned, whereby a source electrode 13 is formed coming into contact with a source region 10 on the inner side of the V-shaped groove 3a, and a drain electrode 14 is formed coming into contact with a drain region 11 on the inner side of the V-shaped groove 4a. By this setup, the inner faces of the grooves 3a and 4a as electrode contact faces are set larger in area than the bases of the contact holes 5 and 6 as electrode contact faces when the grooves 3a and 4a are not formed, so that the electrodes 13 and 14 are enhanced in contact area with the regions 10 and 11 and lessened in contact resistance.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a source electrode and a drain electrode of a MOS semiconductor device.

[0002]

2. Description of the Related Art One of MOS (insulated gate type) semiconductor devices is a CMOS (Complementary MOS) transistor, which is very useful as a constituent element of an LSI. FIG. 8 shows a main structure of a conventional CMOS transistor. The CMOS transistor 51 is provided with an n-channel MOS transistor A and a p-channel MOS transistor B.

In the n-channel MOS transistor A, a source region 61 and a drain region 62 are formed in the surface portion of the p-type region of the semiconductor substrate 52, and the insulated gate electrode 63 is formed.
Is provided between the source region 61 and the drain region 62,
The source electrode 64 and the drain electrode 65 are in contact with the source region 61 and the drain region 62 through contact holes 67 and 68 formed in the insulating film 66, respectively.

In the p-channel MOS transistor B, a source region 71 and a drain region 72 are formed on the surface of the n-type well region 70 of the semiconductor substrate 52, and an insulated gate electrode 73 is provided between the source region 71 and the drain region 72. , And the source electrode 74 and the drain electrode 75 are in contact with the source region 71 and the drain region 72 through contact holes 77 and 78 formed in the insulating film 76, respectively.

Usually, after the contact holes 67, 68, 77 and 78 are opened by using hydrofluoric acid or the like, the source electrode 6 is formed.
Before forming the drain electrodes 65 and 75 and 4, 74, the impurity is ion-implanted to increase the impurity concentration and then the electrodes are formed to reduce the contact resistance. This is because the loss increases as the contact resistance increases.

[0006]

In the case of the CMOS transistor described above, it is sufficient to make the contact hole large in order to further reduce the contact resistance, but this is difficult. This is because the enlargement of the contact hole is accompanied by an increase in the substrate area. In particular, in LSI, there is a strong demand for higher density, and it is impossible to increase the substrate area. Further, in the LSI, the contact hole tends to become smaller in accordance with the tendency toward higher density, the contact area (contact area) of the source electrode and the drain electrode is reduced, and the contact resistance is becoming larger. Very large number of C in LSI
Since the MOS transistor is provided, the increase in loss due to the increase in contact resistance is considerable.
A reduction in contact resistance is highly desired.

In view of the above circumstances, it is an object of the present invention to provide a method of forming a source electrode and a drain electrode of a MOS semiconductor device which can reduce the contact resistance without impairing the high density.

[0008]

In order to solve the above problems, a method for forming a source electrode and a drain electrode of a MOS semiconductor device according to the present invention comprises a semiconductor substrate having a source region and a drain region formed on its surface portion. An insulated gate electrode is provided between the source region and the drain region in the semiconductor substrate, and the source region and the drain electrode are provided in the source region and the drain region through contact holes formed in an insulating film formed thereon. In forming the source electrode and the drain electrode of the MOS semiconductor device which are in contact with each other, as the semiconductor substrate, the impurity diffusion regions for the source region and the drain region are respectively formed on the surface portions and the contact holes are opened. Using a semiconductor substrate whose surface is covered with an insulating film Anisotropic etching is performed on the plate to form a groove by digging down the portions of the impurity diffusion region facing the bottoms of both contact holes, and then the electrode is formed so that the source electrode and the drain electrode contact each other on the inner surface of the groove. It is configured to do.

The MOS semiconductor device according to the present invention may have a CMOS transistor structure or an LSI structure, but is not limited to this, and may have a single structure such as one MOS transistor. In the case of LSI configuration, C
A large number of MOS transistors or MOS transistors are integrally formed on one substrate.

[0010]

In the present invention, the bottoms of both contact holes in the source region and the drain region are dug down to form a groove, and then the source electrode and the drain electrode are brought into contact with each other on the inner surface of the groove. When the groove is formed by digging the bottom of the contact hole, the area of the inner surface of the groove, which is the electrode contact surface, is larger than the area of the bottom surface of the contact hole, which is the electrode contact surface before the groove is formed. The contact area between the electrode and each region is increased by the increase of this area. Since the contact resistance is in inverse proportion to the contact area between the electrode and each region, the contact resistance decreases as the contact area increases. As described above, according to the present invention, the contact resistance can be reduced only by digging the bottom and forming the groove without enlarging the contact hole.

[0011]

Embodiments of the present invention will be described below in detail with reference to the drawings. Needless to say, the present invention is not limited to the following embodiments. First, as shown in Figure 2,
Impurity diffusion regions 3 and 4 for the source region and the drain region
A semiconductor substrate 1 is prepared which is formed on the surface portion and whose surface is covered with an insulating film (SiO ₂ film) 7 in which contact holes 5 and 6 are opened. It goes without saying that the semiconductor substrate 1 can be manufactured by using the impurity diffusion technique, the insulating film forming technique, the photolithography technique, etc. used in the manufacture of the semiconductor device, as in the conventional case.
The semiconductor substrate 1 itself is a silicon substrate having a (100) surface.

Subsequently, the semiconductor substrate 1 is anisotropically etched using hydrazine (NH ₂ —NH ₂ ),
As shown in FIG. 1, the bottoms of the contact holes 5 and 6 are dug down, and V-shaped grooves 3a and 4a having (111) planes as side surfaces are formed in the impurity diffusion regions 3 and 4. When the impurity diffusion regions 3 and 4 are shallow as shown in FIG. 4, the V-shaped grooves 3a and 4a may penetrate the impurity diffusion regions 3 and 4 as shown in FIG. At times, as shown in FIG. 5, for example, impurities of As ions may be ion-implanted through the contact holes 5 and 6, and then annealing for activation may be performed to repair.

After this, as in the conventional case, for example, aluminum is deposited by a sputtering method or the like and then patterned, so that the source electrode 13 and the source region 10 and the V-shape are formed as shown in FIG. 3 or FIG. The drain electrode 14 is formed while being in contact with the inner surface of the groove 3a.
Are formed in contact with the drain region 11 on the inner surface of the V-shaped groove 4a. The V-shaped groove 3 is formed before the electrode is formed.
Electrodes may be formed by ion-implanting n-type impurities into the inner surfaces of a and 4a. The contact resistance can be further reduced.

Next, a CMOS transistor manufactured by using the method of forming the source electrode and the drain electrode according to the present invention will be described with reference to FIG. This CMO
The S transistor 21 is provided with an n-channel MOS transistor a and a p-channel MOS transistor b. The n-channel MOS transistor a is formed on the semiconductor substrate 2
A source region 31 and a drain region 32 are formed on the surface of the second p-type region, an insulated gate electrode 33 is provided between the source region 31 and the drain region 32, and a source electrode 34 and a drain electrode 35 are insulated from each other. The source region 31 and the drain region 32 are in contact with each other through the contact holes 37 and 38 formed in the film 36.

In the p-channel MOS transistor b, a source region 41 and a drain region 42 are formed on the surface portion of the n-type well region 40 of the semiconductor substrate 22, and an insulated gate electrode 43 is provided between the source region 41 and the drain region 42. And the source electrode 44 and the drain electrode 45 are in contact with the source region 41 and the drain region 42 through contact holes 47 and 48 formed in the insulating film 46, respectively.

In the CMOS transistor 21, the source electrodes 34 and 44 are the source regions 31 and 41 and the V-shaped groove 31.
a, 41a are contacted on the inner surface, and drain electrodes 35, 4
5 is a drain region 32, 42 and V-shaped groove 32a, 42
As described above, the contact is made on the inner surface of a, and the contact resistance can be reduced.

[0017]

When a MOS semiconductor device is manufactured by using the source electrode and drain electrode forming method according to the present invention, the contact area between the source electrode and the drain electrode and each region is increased without enlarging the contact hole. Since the contact resistance can be reduced, the contact resistance can be reduced without impairing the high density.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a groove forming process in an example.

FIG. 2 is a cross-sectional view showing a semiconductor substrate used in an example.

FIG. 3 is a cross-sectional view showing a source electrode and a drain electrode formed in an example.

FIG. 4 is a sectional view showing a semiconductor substrate used in another embodiment.

FIG. 5 is a cross-sectional view showing a groove forming step in another embodiment.

FIG. 6 is a cross-sectional view showing a source electrode and a drain electrode formed in another example.

FIG. 7 is a cross-sectional view showing a CMOS transistor manufactured by utilizing the present invention.

FIG. 8 is a cross-sectional view showing a conventional CMOS transistor.

[Explanation of symbols]

 1 semiconductor substrate 3 impurity diffusion region for source region 3a V-shaped groove 4 impurity diffusion region for drain region 4a V-shaped groove 5 contact hole 6 contact hole 7 insulating film 10 source region 11 drain region 13 source electrode 14 drain electrode

Claims (1)

[Claims] 1. A semiconductor substrate having a source region and a drain region formed on a surface portion thereof, wherein an insulated gate electrode is provided between the source region and the drain region in the semiconductor substrate, and the source region and the drain region are provided in the source region and the drain region. In a method of forming the source electrode and the drain electrode of a MOS semiconductor device in which the source electrode and the drain electrode are in contact with each other through a contact hole opened in an insulating film formed on the source region, as a semiconductor substrate. And a drain region are formed on the surface of the semiconductor substrate, and a semiconductor substrate whose surface is covered with an insulating film in which a contact hole is opened is used. Grooves are formed by digging into the parts of the impurity diffusion region that face the bottoms of both contact holes. Then, the method of forming a source electrode and a drain electrode of a MOS semiconductor device, characterized in that the source electrode and the drain electrode are formed so as to contact each other on the inner surface of the groove.