JPH05251574A - コンタクト窓における段差被覆性改善方法 - Google Patents

コンタクト窓における段差被覆性改善方法

Info

Publication number
JPH05251574A
JPH05251574A JP4327026A JP32702692A JPH05251574A JP H05251574 A JPH05251574 A JP H05251574A JP 4327026 A JP4327026 A JP 4327026A JP 32702692 A JP32702692 A JP 32702692A JP H05251574 A JPH05251574 A JP H05251574A
Authority
JP
Japan
Prior art keywords
silicon dioxide
layer
dioxide layer
metal layer
photoresist mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4327026A
Other languages
English (en)
Japanese (ja)
Inventor
Helmut I Endl
アイ．エンドル ヘルムット
Helmut Rinck
リンク ヘルムット
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Deutschland GmbH
Original Assignee
Texas Instruments Deutschland GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Deutschland GmbH filed Critical Texas Instruments Deutschland GmbH
Publication of JPH05251574A publication Critical patent/JPH05251574A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/082—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being tapered via holes

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
JP4327026A 1991-12-06 1992-12-07 コンタクト窓における段差被覆性改善方法 Pending JPH05251574A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE41403304 1991-12-06
DE4140330A DE4140330C1 (enExample) 1991-12-06 1991-12-06

Publications (1)

Publication Number Publication Date
JPH05251574A true JPH05251574A (ja) 1993-09-28

Family

ID=6446481

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4327026A Pending JPH05251574A (ja) 1991-12-06 1992-12-07 コンタクト窓における段差被覆性改善方法

Country Status (3)

Country Link
EP (1) EP0545411A3 (enExample)
JP (1) JPH05251574A (enExample)
DE (1) DE4140330C1 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5874782A (en) * 1995-08-24 1999-02-23 International Business Machines Corporation Wafer with elevated contact structures
CA3006799A1 (en) 2015-12-01 2017-06-08 The Arizona Board Of Regents On Behalf Of The University Of Arizona Htert modulators and methods of use

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2554638A1 (de) * 1975-12-04 1977-06-16 Siemens Ag Verfahren zur erzeugung definierter boeschungswinkel bei einer aetzkante
JPS62194644A (ja) * 1986-02-20 1987-08-27 Mitsubishi Electric Corp 半導体装置およびその製造方法
DE3915337A1 (de) * 1989-05-10 1990-11-15 Siemens Ag Verfahren zum herstellen einer niederohmigen planen kontaktmetallisierung fuer hochintegrierte halbleiterschaltungen
CA1339817C (en) * 1989-05-31 1998-04-14 Mitel Corporation Curing and passivation of spin-on-glasses by a plasma process, and product produced thereby

Also Published As

Publication number Publication date
EP0545411A3 (en) 1993-07-21
DE4140330C1 (enExample) 1993-03-18
EP0545411A2 (en) 1993-06-09

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