JPH0512315B2 - - Google Patents

Info

Publication number
JPH0512315B2
JPH0512315B2 JP1029286A JP2928689A JPH0512315B2 JP H0512315 B2 JPH0512315 B2 JP H0512315B2 JP 1029286 A JP1029286 A JP 1029286A JP 2928689 A JP2928689 A JP 2928689A JP H0512315 B2 JPH0512315 B2 JP H0512315B2
Authority
JP
Japan
Prior art keywords
silicon film
orientation
polycrystalline silicon
film
plasma
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1029286A
Other languages
English (en)
Japanese (ja)
Other versions
JPH02208293A (ja
Inventor
Seiichi Hasegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KANAZAWA DAIGAKUCHO
Original Assignee
KANAZAWA DAIGAKUCHO
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by KANAZAWA DAIGAKUCHO filed Critical KANAZAWA DAIGAKUCHO
Priority to JP1029286A priority Critical patent/JPH02208293A/ja
Priority to US07/472,954 priority patent/US5064779A/en
Publication of JPH02208293A publication Critical patent/JPH02208293A/ja
Publication of JPH0512315B2 publication Critical patent/JPH0512315B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901Materials
    • H10P14/2921Materials being crystalline insulating materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743Silicon
    • H10D30/6745Polycrystalline or microcrystalline silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901Materials
    • H10P14/2922Materials being non-crystalline insulating materials, e.g. glass or polymers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3402Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411Silicon, silicon germanium or germanium
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3466Crystal orientation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/122Polycrystalline

Landscapes

  • Crystals, And After-Treatments Of Crystals (AREA)
  • Thin Film Transistor (AREA)
JP1029286A 1989-02-08 1989-02-08 多結晶シリコン膜の製造方法 Granted JPH02208293A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP1029286A JPH02208293A (ja) 1989-02-08 1989-02-08 多結晶シリコン膜の製造方法
US07/472,954 US5064779A (en) 1989-02-08 1990-01-31 Method of manufacturing polycrystalline silicon film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1029286A JPH02208293A (ja) 1989-02-08 1989-02-08 多結晶シリコン膜の製造方法

Publications (2)

Publication Number Publication Date
JPH02208293A JPH02208293A (ja) 1990-08-17
JPH0512315B2 true JPH0512315B2 (enExample) 1993-02-17

Family

ID=12272006

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1029286A Granted JPH02208293A (ja) 1989-02-08 1989-02-08 多結晶シリコン膜の製造方法

Country Status (2)

Country Link
US (1) US5064779A (enExample)
JP (1) JPH02208293A (enExample)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5691249A (en) * 1990-03-20 1997-11-25 Nec Corporation Method for fabricating polycrystalline silicon having micro roughness on the surface
US5366917A (en) * 1990-03-20 1994-11-22 Nec Corporation Method for fabricating polycrystalline silicon having micro roughness on the surface
JP3491903B2 (ja) * 1990-05-18 2004-02-03 セイコーエプソン株式会社 薄膜半導体装置の製造方法
US5256566A (en) * 1991-05-08 1993-10-26 Texas Instruments Incorporated Method for in-situ doping of deposited silicon
US5510146A (en) * 1991-07-16 1996-04-23 Seiko Epson Corporation CVD apparatus, method of forming semiconductor film, and method of fabricating thin-film semiconductor device
JP3121131B2 (ja) * 1991-08-09 2000-12-25 アプライド マテリアルズ インコーポレイテッド 低温高圧のシリコン蒸着方法
US5614257A (en) * 1991-08-09 1997-03-25 Applied Materials, Inc Low temperature, high pressure silicon deposition method
US5695819A (en) * 1991-08-09 1997-12-09 Applied Materials, Inc. Method of enhancing step coverage of polysilicon deposits
US5227330A (en) * 1991-10-31 1993-07-13 International Business Machines Corporation Comprehensive process for low temperature SI epit axial growth
TW215967B (en) * 1992-01-17 1993-11-11 Seiko Electron Co Ltd MOS Poly-Si thin film transistor with a flattened channel interface and method of producing same
JPH06204137A (ja) * 1992-10-19 1994-07-22 Samsung Electron Co Ltd 多結晶シリコン薄膜の製造方法
KR100250020B1 (ko) * 1993-03-02 2000-03-15 가네꼬 히사시 반도체 소자용 다결정 실리콘 박막 형성 방법(method of forming polycrystalline silicon thin films for semiconductor devices)
JP2616554B2 (ja) * 1994-04-22 1997-06-04 日本電気株式会社 半導体装置の製造方法
US5438019A (en) * 1994-07-11 1995-08-01 Micron Semiconductor, Inc. Large area thin film growing method
US5651839A (en) * 1995-10-26 1997-07-29 Queen's University At Kingston Process for engineering coherent twin and coincident site lattice grain boundaries in polycrystalline materials
JP2001147446A (ja) * 1999-11-19 2001-05-29 Hitachi Ltd 液晶表示装置とその製造方法
US6726955B1 (en) 2000-06-27 2004-04-27 Applied Materials, Inc. Method of controlling the crystal structure of polycrystalline silicon
KR100769521B1 (ko) * 2005-11-30 2007-11-06 주식회사 유진테크 다결정 폴리실리콘 박막 제조방법
US20080057220A1 (en) * 2006-01-31 2008-03-06 Robert Bachrach Silicon photovoltaic cell junction formed from thin film doping source
US7858427B2 (en) * 2009-03-03 2010-12-28 Applied Materials, Inc. Crystalline silicon solar cells on low purity substrate
JP5928366B2 (ja) * 2013-02-13 2016-06-01 豊田合成株式会社 Iii族窒化物半導体の製造方法
US9837271B2 (en) 2014-07-18 2017-12-05 Asm Ip Holding B.V. Process for forming silicon-filled openings with a reduced occurrence of voids
US9443730B2 (en) 2014-07-18 2016-09-13 Asm Ip Holding B.V. Process for forming silicon-filled openings with a reduced occurrence of voids
US10460932B2 (en) 2017-03-31 2019-10-29 Asm Ip Holding B.V. Semiconductor device with amorphous silicon filled gaps and methods for forming

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3976511A (en) * 1975-06-30 1976-08-24 Ibm Corporation Method for fabricating integrated circuit structures with full dielectric isolation by ion bombardment
JPS57109323A (en) * 1980-12-26 1982-07-07 Fujitsu Ltd Plasma chemical vapor-phase growing method
JPS58176929A (ja) * 1982-04-09 1983-10-17 Fujitsu Ltd 半導体装置の製造方法
US4497683A (en) * 1982-05-03 1985-02-05 At&T Bell Laboratories Process for producing dielectrically isolated silicon devices
JPS5982715A (ja) * 1982-11-02 1984-05-12 Nec Corp 再結晶シリコン膜の形成方法
JPS59155121A (ja) * 1983-02-24 1984-09-04 Toshiba Corp 半導体薄膜の製造方法
US4662059A (en) * 1985-09-19 1987-05-05 Rca Corporation Method of making stabilized silicon-on-insulator field-effect transistors having 100 oriented side and top surfaces
US4918028A (en) * 1986-04-14 1990-04-17 Canon Kabushiki Kaisha Process for photo-assisted epitaxial growth using remote plasma with in-situ etching
JPH0639703B2 (ja) * 1986-04-15 1994-05-25 キヤノン株式会社 堆積膜形成法
JPS6310573A (ja) * 1986-07-02 1988-01-18 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPS63236310A (ja) * 1987-03-25 1988-10-03 Nippon Soken Inc 半導体素子及びその製造方法
JP2580265B2 (ja) * 1988-06-30 1997-02-12 大阪瓦斯株式会社 複合不織布

Also Published As

Publication number Publication date
JPH02208293A (ja) 1990-08-17
US5064779A (en) 1991-11-12

Similar Documents

Publication Publication Date Title
JPH02208293A (ja) 多結晶シリコン膜の製造方法
US7186630B2 (en) Deposition of amorphous silicon-containing films
JP4417625B2 (ja) トリシランを用いる混合基板への成膜方法、および、ベース構造の製造方法
TWI385714B (zh) 含矽薄膜的選擇性沉積
TWI405248B (zh) 沉積摻雜碳之磊晶半導體層之方法、沉積半導體材料的方法與裝置及在反應腔室中之基板上形成電晶體設備之方法
TW475252B (en) Semiconductor device having crystallinity-controlled gate electrode
JPH05211127A (ja) プラズマ強化化学気相成長法
KR100425934B1 (ko) 실리콘-게르마늄막 형성 방법
JP3320180B2 (ja) 薄膜トランジスタの製造方法
JP3705733B2 (ja) 半導体装置の製造方法
JP3116403B2 (ja) 薄膜トランジスタの製造方法
JP2756320B2 (ja) 結晶の形成方法
JP2003318110A (ja) 半導体基板とその製法,半導体装置の製法
US20070254451A1 (en) Process for forming a silicon-based single-crystal portion
KR100341059B1 (ko) 다결정실리콘박막형성방법
KR20140112836A (ko) 나노 와이어 제조 방법
JP4504445B2 (ja) 半導体装置の製造方法
Nakata et al. Study on Chemical Reactions on the Growing Surface to Control the Structures of µc-Silicon from Fluorinated Precursors
JPH05136415A (ja) 電界効果トランジスター及びその製造方法
JPS6223451B2 (enExample)
KR20260057032A (ko) 에피택셜 웨이퍼의 제조방법
US20070254450A1 (en) Process for forming a silicon-based single-crystal portion
JP3610172B2 (ja) 半導体記憶素子の製造方法
JPH02139929A (ja) 絶縁薄膜の製造方法
JP2001237190A (ja) 多結晶シリコン薄膜およびその形成方法

Legal Events

Date Code Title Description
S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

R371 Transfer withdrawn

Free format text: JAPANESE INTERMEDIATE CODE: R371

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

EXPY Cancellation because of completion of term