JPH05121855A - Manufacture of ceramic insulating board for electronic parts component - Google Patents

Manufacture of ceramic insulating board for electronic parts component

Info

Publication number
JPH05121855A
JPH05121855A JP3281390A JP28139091A JPH05121855A JP H05121855 A JPH05121855 A JP H05121855A JP 3281390 A JP3281390 A JP 3281390A JP 28139091 A JP28139091 A JP 28139091A JP H05121855 A JPH05121855 A JP H05121855A
Authority
JP
Japan
Prior art keywords
ceramic material
material plate
scribe
insulating substrate
groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3281390A
Other languages
Japanese (ja)
Other versions
JP3065743B2 (en
Inventor
Hiroaki Hayashi
浩昭 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP3281390A priority Critical patent/JP3065743B2/en
Publication of JPH05121855A publication Critical patent/JPH05121855A/en
Application granted granted Critical
Publication of JP3065743B2 publication Critical patent/JP3065743B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To improve the accuracy in the length dimension and the width dimension of an insulating board in the case of manufacturing the ceramic insulating board by breaking a ceramic raw material along a plurality of scribe grooves. CONSTITUTION:When carving a plurality of scribe grooves 3 and 4 in a ceramic raw material board 2, each scribe groove 3 and 4 is carved leaving scribe free parts 5 and 6 with narrow dimensions S's at the sections contiguous to each side face 2a, 2b, 2c, and 2d of the ceramic raw material board 2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、サーマルプリントヘッ
ド又はハイブリッド集積回路等の電子部品において、表
面にグレーズ層又は各種配線回路或いは抵抗素子等をペ
ーストの塗着・焼成によって形成するようにしたセラミ
ック製絶縁基板を製造する方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component such as a thermal print head or a hybrid integrated circuit, in which a glaze layer or various wiring circuits or resistive elements are formed on the surface by applying and firing a paste. The present invention relates to a method for manufacturing an insulating substrate.

【0002】[0002]

【従来の技術】従来、サーマルプリントヘッド又はハイ
ブリッド集積回路等の電子部品に使用されるセラミック
製の絶縁基板は、先づ、図5に示すように、絶縁基板1
の複数枚を並べて連接した状態のセラミック素材板2を
製作し、このセラミック素材板2の裏面に、レーザー光
線を断続的に又は連続的に照射することにより、当該セ
ラミック素材基板2を各絶縁基板1ごとにブレイクする
ためのスクライブ溝3,4を、図6及び図7に示すよう
に、セラミック素材板2の各側端面2a,2b,2c,
2dから延びるように刻設し、次いで、前記セラミック
素材板2の表面に、グレーズ層又は各種配線回路或いは
各種素子用のペーストを塗着したのち、炉内で高い温度
で焼成し、次いで、前記セラミック素材板2を、図8に
示すように、前記各スクライブ溝3,4に沿って各絶縁
基板1ごとにブレイクすることによって製造するように
していた。
2. Description of the Related Art Conventionally, as shown in FIG. 5, an insulating substrate made of ceramics used for electronic parts such as a thermal print head or a hybrid integrated circuit has been used.
Of the ceramic material board 2 are manufactured by arranging a plurality of the same and connecting them, and the back surface of the ceramic material board 2 is intermittently or continuously irradiated with a laser beam, so that the ceramic material board 2 is connected to each insulating substrate 1 As shown in FIG. 6 and FIG. 7, the scribe grooves 3 and 4 for breaking each of the side end surfaces 2a, 2b, 2c of the ceramic material plate 2 are formed.
It is engraved so as to extend from 2d, and then a glaze layer or a paste for various wiring circuits or various elements is applied to the surface of the ceramic material plate 2 and then fired at a high temperature in a furnace, then, As shown in FIG. 8, the ceramic material plate 2 is manufactured by breaking each insulating substrate 1 along the scribe grooves 3 and 4.

【0003】[0003]

【発明が解決しようとする課題】ところで、この従来に
おける製造方法において、前記セラミック素材板2にお
ける裏面に刻設する各スクライブ溝3,4の溝深さHを
深くすると、前記セラミック素材板2を、この各スクラ
イブ溝3,4に沿ってブレイクするとき、前記セラミッ
ク素材板2は、各スクライブ溝3,4の箇所において、
当該セラミック素材板2における表裏両面に対して直角
に近い状態にブレイクすることができるから、絶縁基板
1の長さ寸法L及び幅寸法Wにおける寸法のバラ付きを
小さくできて、各絶縁基板1における長さ寸法L及び幅
寸法Wの寸法精度を向上することができる。
By the way, in the conventional manufacturing method, when the groove depth H of each of the scribe grooves 3, 4 engraved on the back surface of the ceramic material plate 2 is increased, the ceramic material plate 2 is formed. When breaking along the scribe grooves 3 and 4, the ceramic material plate 2 is
Since it is possible to break the ceramic material plate 2 into a state close to a right angle with respect to both front and back surfaces, it is possible to reduce variations in the length dimension L and the width dimension W of the insulating substrate 1 and to reduce the size of each insulating substrate 1. The dimensional accuracy of the length dimension L and the width dimension W can be improved.

【0004】しかし、その反面、各スクライブ溝3,4
の溝深さHを深くすると、グレーズ層又は各種配線回路
用の導電性ペーストを塗着したのち炉内で高い温度で焼
成するときにおいて、セラミック素材板2は熱によって
膨張・収縮する一方、前記各スクライブ溝3,4は、い
ずれも、セラミック素材板2における各側端面2a,2
b,2c,2dから延びていることにより、当該セラミ
ック素材板2には、前記各スクライブ溝3,4に沿った
割れ又は亀裂が頻発すると言う問題がある。
However, on the other hand, on the other hand, each scribe groove 3, 4
When the groove depth H is increased, when the glaze layer or the conductive paste for various wiring circuits is applied and then fired at a high temperature in the furnace, the ceramic material plate 2 expands and contracts due to heat, Each of the scribe grooves 3 and 4 has a respective side end surface 2a, 2 of the ceramic material plate 2.
Since it extends from b, 2c, and 2d, the ceramic material plate 2 has a problem that cracks or cracks frequently occur along the scribe grooves 3 and 4.

【0005】また、前記各スクライブ溝3,4の溝深さ
Hを浅くすると、前記ペーストの焼成に際して、セラミ
ック素材板2に各スクライブ溝3,4に沿った割れ又は
亀裂が発生することを防止できるが、その反面、前記セ
ラミック素材板2を、この各スクライブ溝3,4に沿っ
てブレイクするとき、前記セラミック素材板2は、各ス
クライブ溝3,4の箇所において、図7に一点鎖線A又
は二点鎖線Bで示すように、当該セラミック素材板2に
おける表裏両面に対して傾いた状態にブレイクされるこ
とになるから、前記各絶縁基板1の長さ寸法L及び幅寸
法Wにおける寸法のバラ付きが大きくなり、各絶縁基板
1における長さ寸法L及び幅寸法Wの寸法精度が低下す
ると言う問題がある。
Further, when the groove depth H of each of the scribe grooves 3 and 4 is made shallow, cracks or cracks along the scribe grooves 3 and 4 are prevented from occurring in the ceramic material plate 2 during the firing of the paste. However, on the other hand, when the ceramic material plate 2 is broken along the scribe grooves 3 and 4, the ceramic material plate 2 is shown in FIG. Alternatively, as indicated by the chain double-dashed line B, the ceramic material plate 2 is broken in a state of being inclined with respect to both the front and back surfaces, so that the dimensions of the length dimension L and the width dimension W of each insulating substrate 1 There is a problem that the variation becomes large and the dimensional accuracy of the length dimension L and the width dimension W in each insulating substrate 1 is reduced.

【0006】本発明は、絶縁基板の製造に際して、この
ような問題を招来することがないようにした製造方法を
提供することを技術的課題とするものである。
An object of the present invention is to provide a manufacturing method which does not cause such a problem in manufacturing an insulating substrate.

【0007】[0007]

【課題を解決するための手段】この技術的課題を達成す
るため本発明は、複数個の絶縁基板を連接した状態のセ
ラミック素材板を製作し、このセラミック素材板に、当
該セラミック素材板を前記各絶縁基板ごとにブレイクす
る複数本のスクライブ溝をレーザー光線の照射によって
刻設し、次いで、前記セラミック素材板に、グレーズ層
又は各種配線回路或いは各種素子用のペーストを塗着し
たのち焼成し、次いで、前記セラミック素材板を、前記
各スクライブ溝に沿って各絶縁基板ごとにブレイクする
ようにした絶縁基板の製造方法において、前記各スクラ
イブ溝を、前記セラミック素材板における各側端面に隣
接する部分に、狭い寸法のスクライブ溝無し部を残して
刻設することにした。
In order to achieve this technical object, the present invention produces a ceramic material plate in which a plurality of insulating substrates are connected to each other, and the ceramic material plate is provided with the ceramic material plate. A plurality of scribe grooves that break for each insulating substrate are engraved by irradiation with a laser beam, and then the ceramic material plate is coated with a paste for glaze layer or various wiring circuits or various elements and then baked, and then In the method for manufacturing an insulating substrate in which the ceramic material plate is broken along each scribe groove for each insulating substrate, each scribe groove is formed in a portion adjacent to each side end surface of the ceramic material plate. , I decided to engrave with a narrow scribed groove-free part.

【0008】[0008]

【作 用】セラミック素材板の表面に、当該セラミッ
ク素材板を各絶縁基板ごとにブレイクする複数本のスク
ライブ溝を刻設するに際して、前記のように、各スクラ
イブ溝を、前記セラミック素材板における各側端面に隣
接する部分に、狭い寸法のスクライブ溝無し部を残して
刻設したことにより、前記セラミック素材板のうちその
各側端面に隣接する部分は、前記各スクライブ溝によっ
て分断されることなく、前記スクライブ溝無し部にて一
体的に連続しているから、前記各スクライブ溝の溝深さ
を深くしても、グレーズ層又は各種配線回路或いは各種
素子用のペーストを塗着したあとの焼成に際して、前記
セラミック素材板に、前記各スクライブ溝に沿った割れ
又は亀裂が発生することを確実に防止できる。
[Operation] When engraving a plurality of scribe grooves on the surface of the ceramic material plate for breaking the ceramic material plate for each insulating substrate, each scribe groove is formed on the surface of the ceramic material plate as described above. Since the portion adjacent to the side end surface is engraved with a narrow scribe groove-free portion left, the portion of the ceramic material plate adjacent to each side end surface thereof is not divided by the scribe grooves. Since the scribe groove-less portion is integrally continuous, even if the groove depth of each scribe groove is increased, baking is performed after applying a glaze layer or a paste for various wiring circuits or various elements. At this time, it is possible to reliably prevent the ceramic material plate from being cracked or cracked along the scribe grooves.

【0009】一方、前記セラミック素材板における各側
端面に隣接するスクライブ溝無し部は、狭い寸法である
ことより、前記セラミック素材板を各スクライブ溝に沿
って各絶縁基板ごとにブレイクするときにおいて、同時
に容易にブレイクすることができる。
On the other hand, since the scribe groove-less portion adjacent to each side end surface of the ceramic material plate has a narrow dimension, when the ceramic material plate is broken along each scribe groove for each insulating substrate, You can easily break at the same time.

【0010】[0010]

【発明の効果】従って、本発明によると、グレーズ層又
は各種配線回路或いは各種素子用ペーストの焼成に際し
て、セラミック素材板に各スクライブ溝に沿った割れ又
は亀裂が発生することを確実に防止することができる状
態のもとで、前記各スクライブ溝の溝深さを深くするこ
とができるから、各絶縁基板の長さ寸法及び幅寸法にお
ける寸法のバラ付きを小さくできて、各絶縁基板におけ
る長さ寸法及び幅寸法の寸法精度を、従来の製造方法に
よる場合よりも大幅に向上できる効果を有する。
Therefore, according to the present invention, it is possible to surely prevent cracks or cracks along the scribed grooves from being formed in the ceramic material plate during firing of the glaze layer or various wiring circuits or various element pastes. Since the groove depth of each of the scribe grooves can be increased under the condition that the above-mentioned can be achieved, it is possible to reduce the variation in the length dimension and the width dimension of each insulating substrate, and to reduce the length of each insulating substrate. It has an effect that the dimensional accuracy of the dimension and the width dimension can be significantly improved as compared with the case of the conventional manufacturing method.

【0011】[0011]

【実施例】以下、本発明の実施例を図面(図1〜図4)
について説明する。この図において符号2は、複数枚の
絶縁基板1を連接するようにして製作したセラミック素
材板を示し、このセラミック素材板2における裏面に、
レーザー光線を断続的に又は連続的に照射することによ
り、当該セラミック素材基板2を各絶縁基板1ごとにブ
レイクするためのスクライブ溝3,4を刻設するに際し
て、該各スクライブ溝3,4を、前記セラミック素材板
2における各側端面2a,2b,2c,2dにまで到達
することなく、図1及び図2に示すように、前記セラミ
ック素材板2における各側端面2a,2b,2c,2d
に隣接する部分に、狭い寸法Sのスクライブ溝無し部
5,6を残して刻設するように構成する。
Embodiments of the present invention will now be described with reference to the drawings (FIGS. 1 to 4).
Will be described. In this figure, reference numeral 2 indicates a ceramic material plate manufactured by connecting a plurality of insulating substrates 1 to each other.
When engraving the scribe grooves 3 and 4 for breaking the ceramic material substrate 2 for each insulating substrate 1 by irradiating the laser beam intermittently or continuously, the scribe grooves 3 and 4 are As shown in FIGS. 1 and 2, each side end surface 2a, 2b, 2c, 2d of the ceramic material plate 2 is reached without reaching each side end surface 2a, 2b, 2c, 2d of the ceramic material plate 2.
The scribed groove-free portions 5 and 6 having a narrow dimension S are left in the portion adjacent to the above.

【0012】次いで、前記セラミック素材板2における
表面に、グレーズ層又は各種配線回路或いは各種素子用
のペーストを塗着したのち、炉内で高い温度で焼成し、
次いで、前記セラミック素材板2を、図4に示すよう
に、前記各スクライブ溝3,4に沿って各絶縁基板1ご
とにブレイクするのである。そして、前記グレーズ層又
は各種配線回路或いは各種素子用ペーストの焼成に際し
て、前記セラミック素材板2のうちその各側端面2a,
2b,2c,2dに隣接する部分は、前記各スクライブ
溝3,4によって分断されることなく、前記スクライブ
溝無し部5,6にて一体的に連続しているから、前記各
スクライブ溝3,4の溝深さHを深くしても、前記セラ
ミック素材板2に、前記各スクライブ溝3,4に沿った
割れ又は亀裂が発生することを確実に防止できる一方、
前記セラミック素材板2における各側端面2a,2b,
2c,2dに隣接するスクライブ溝無し部5,6は、狭
い寸法Sであることより、前記セラミック素材板2を各
スクライブ溝3,4に沿って各絶縁基板1ごとにブレイ
クするときにおいて、同時にブレイクすることができる
のである。
Next, a glaze layer or a paste for various wiring circuits or various elements is applied to the surface of the ceramic material plate 2 and then fired at a high temperature in a furnace,
Next, the ceramic material plate 2 is broken for each insulating substrate 1 along the scribe grooves 3 and 4 as shown in FIG. When firing the glaze layer or the various wiring circuits or the paste for various elements, each side end surface 2a of the ceramic material plate 2 is
The portions adjacent to 2b, 2c, and 2d are not divided by the scribing grooves 3 and 4 and are integrally continuous in the scribing groove-less portions 5 and 6, respectively. Even if the groove depth H of 4 is increased, it is possible to reliably prevent the ceramic material plate 2 from cracking or cracking along the scribe grooves 3 and 4.
Each side end surface 2a, 2b of the ceramic material plate 2,
Since the scribed groove-free portions 5 and 6 adjacent to 2c and 2d have a narrow dimension S, when the ceramic material plate 2 is broken along the scribed grooves 3 and 4 for each insulating substrate 1, at the same time, You can break.

【0013】なお、本発明者の実験によると、前記各ス
クライブ溝無し部5,6における寸法Sは、2mm以内
にすることが好ましく、また、各スクライブ溝3,4に
おける溝深さHは、セラミック素材板2における厚さに
対して5分の2以上にすることができて、絶縁基板1に
おける長さ寸法L及び幅寸法Wの精度を大幅に向上でき
るのであった。
According to experiments conducted by the present inventor, it is preferable that the dimension S of each of the scribed grooveless portions 5 and 6 is within 2 mm, and the groove depth H of each scribed groove 3 and 4 is The thickness of the ceramic material plate 2 can be set to two fifths or more, and the accuracy of the length dimension L and the width dimension W of the insulating substrate 1 can be significantly improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例によるセラミック素材板の斜視
図である。
FIG. 1 is a perspective view of a ceramic material plate according to an embodiment of the present invention.

【図2】図1における要部の拡大斜視図である。FIG. 2 is an enlarged perspective view of a main part in FIG.

【図3】図2のIII −III 視拡大断面図である。FIG. 3 is an enlarged sectional view taken along line III-III of FIG.

【図4】図1のセラミック素材板を各絶縁基板ごとにブ
レイクした状態の斜視図である。
FIG. 4 is a perspective view showing a state in which the ceramic material plate of FIG. 1 is broken for each insulating substrate.

【図5】従来の例によるセラミック素材板の斜視図であ
る。
FIG. 5 is a perspective view of a ceramic material plate according to a conventional example.

【図6】図5における要部の拡大斜視図である。FIG. 6 is an enlarged perspective view of a main part in FIG.

【図7】図6のVII −VII 視拡大断面図である。7 is an enlarged sectional view taken along line VII-VII of FIG.

【図8】図5のセラミック素材板を各絶縁基板ごとにブ
レイクした状態の斜視図である。
FIG. 8 is a perspective view showing a state where the ceramic material plate of FIG. 5 is broken for each insulating substrate.

【符号の説明】[Explanation of symbols]

1 絶縁基板 2 セラミック素材板 3,4 スクライブ溝 5,6 スクライブ溝無し部 1 Insulating substrate 2 Ceramic material plate 3,4 Scribing groove 5,6 No scribing groove

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】複数個の絶縁基板を連接した状態のセラミ
ック素材板を製作し、このセラミック素材板に、当該セ
ラミック素材板を前記各絶縁基板ごとにブレイクする複
数本のスクライブ溝をレーザー光線の照射によって刻設
し、次いで、前記セラミック素材板に、グレーズ層又は
各種配線回路或いは各種素子用のペーストを塗着したの
ち焼成し、次いで、前記セラミック素材板を、前記各ス
クライブ溝に沿って各絶縁基板ごとにブレイクするよう
にした絶縁基板の製造方法において、前記各スクライブ
溝を、前記セラミック素材板における各側端面に隣接す
る部分に、狭い寸法のスクライブ溝無し部を残して刻設
することを特徴とする電子部品用セラミック製絶縁基板
の製造方法。
1. A ceramic material plate in which a plurality of insulating substrates are connected to each other is produced, and a plurality of scribe grooves for breaking the ceramic material plate for each insulating substrate is irradiated with a laser beam. Engraved, then apply glaze layer or paste for various wiring circuits or various elements to the ceramic material plate, and then burn, and then insulate the ceramic material plate along each scribe groove with each insulation. In the method of manufacturing an insulating substrate that breaks for each substrate, it is possible to engrave each scribe groove in a portion adjacent to each side end surface of the ceramic material plate, leaving a scribe groove-less portion having a narrow size. A method of manufacturing a ceramic insulating substrate for electronic parts, which is characterized.
JP3281390A 1991-10-28 1991-10-28 Manufacturing method of ceramic insulating substrate for electronic components Expired - Fee Related JP3065743B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3281390A JP3065743B2 (en) 1991-10-28 1991-10-28 Manufacturing method of ceramic insulating substrate for electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3281390A JP3065743B2 (en) 1991-10-28 1991-10-28 Manufacturing method of ceramic insulating substrate for electronic components

Publications (2)

Publication Number Publication Date
JPH05121855A true JPH05121855A (en) 1993-05-18
JP3065743B2 JP3065743B2 (en) 2000-07-17

Family

ID=17638479

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3281390A Expired - Fee Related JP3065743B2 (en) 1991-10-28 1991-10-28 Manufacturing method of ceramic insulating substrate for electronic components

Country Status (1)

Country Link
JP (1) JP3065743B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03117724A (en) * 1989-09-28 1991-05-20 Ntn Corp Roller bearing
JPH08107255A (en) * 1994-10-04 1996-04-23 Rohm Co Ltd Ceramic circuit substrate structure and its manufacturing

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03117724A (en) * 1989-09-28 1991-05-20 Ntn Corp Roller bearing
JPH08107255A (en) * 1994-10-04 1996-04-23 Rohm Co Ltd Ceramic circuit substrate structure and its manufacturing

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