JPH0744163B2 - Substrate for thermal head and electronic component including the same - Google Patents

Substrate for thermal head and electronic component including the same

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Publication number
JPH0744163B2
JPH0744163B2 JP31720789A JP31720789A JPH0744163B2 JP H0744163 B2 JPH0744163 B2 JP H0744163B2 JP 31720789 A JP31720789 A JP 31720789A JP 31720789 A JP31720789 A JP 31720789A JP H0744163 B2 JPH0744163 B2 JP H0744163B2
Authority
JP
Japan
Prior art keywords
substrate
electronic component
thermal head
pattern
scribe line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP31720789A
Other languages
Japanese (ja)
Other versions
JPH03177047A (en
Inventor
忍 小畠
浩昭 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP31720789A priority Critical patent/JPH0744163B2/en
Publication of JPH03177047A publication Critical patent/JPH03177047A/en
Publication of JPH0744163B2 publication Critical patent/JPH0744163B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 (イ)産業上の利用分野 この発明は、サーマルヘッド用の基板に関する。The present invention relates to a substrate for a thermal head.

(ロ)従来の技術 電子部品、例えばサーマルヘッドは、セラミック基板を
使用する。近年、サーマルヘッドの基板寸法の縮小化に
伴い、第5図にも示すように、一枚の大きな基板11から
サーマルヘッド用基板を多数個取ることが行われてい
る。基板11の外形寸法は統一されているため、サーマル
ヘッド用基板を多数個取りする場合には、寸法調整用の
捨てパターン15が設けられることが多い。
(B) Conventional Technology An electronic component such as a thermal head uses a ceramic substrate. In recent years, as the substrate size of the thermal head has been reduced, as shown in FIG. 5, many thermal head substrates have been taken from one large substrate 11. Since the outer dimensions of the substrate 11 are uniform, when a large number of thermal head substrates are to be taken, a discard pattern 15 for adjusting the dimensions is often provided.

この基板11には、分割を容易とするためのスクライブラ
イン12が形成されており、基板11はこのスクライブライ
ン12により、サーマルヘッド用基板のパターン14と捨て
パターン15とに区画されることになる。
A scribe line 12 for facilitating the division is formed on the substrate 11, and the substrate 11 is divided by the scribe line 12 into a pattern 14 of a thermal head substrate and a discard pattern 15. .

このスクライブライン12は、レーザ処理により形成され
る。第6図はスクライブライン12を拡大して示す図であ
り、レーザビームBを所定ピッチをおいて1回ずつ照射
して、穴pが列設されている。穴pの深さdは、基板11
の厚さtの1/3程度とされる。
The scribe line 12 is formed by laser processing. FIG. 6 is an enlarged view of the scribe line 12, in which the laser beam B is irradiated once at a predetermined pitch to form holes p in a row. The depth d of the hole p is the substrate 11
The thickness t is about 1/3.

(ハ)発明が解決しようとする課題 上記基板11において、捨てパターン15の幅が小さい(2
〜5mm)と、捨てパターン15の分割が困難であり、割れ
角度θ(第4図参照)が大きくなるなどの分割不良が生
じやすい。
(C) Problems to be Solved by the Invention In the substrate 11 described above, the width of the discard pattern 15 is small (2
.About.5 mm), it is difficult to divide the discard pattern 15, and a division defect such as a large crack angle .theta. (See FIG. 4) easily occurs.

そこで、スクライブライン12の穴pを深くすることが考
えられる。しかし、穴pを基板厚さtの1/3以上の深さ
とすると、ビーム径が大きくなり、基板11にマイクロク
ラックが生じやすくなる。
Therefore, it is conceivable to deepen the hole p of the scribe line 12. However, if the hole p has a depth of 1/3 or more of the substrate thickness t, the beam diameter becomes large, and microcracks are likely to occur on the substrate 11.

この発明は、上記に鑑みなされたものであり、マイクロ
クラックを生じさせることなく、捨てパターンの分割を
容易としたサーマルヘッド用基板の提供を目的としてい
る。
The present invention has been made in view of the above, and an object thereof is to provide a substrate for a thermal head that facilitates division of a discard pattern without causing microcracks.

(ニ)課題を解決するための手段及び作用 上記課題を解決するため、この発明のサーマルヘッド用
基板は、レーザ処理によりスクライブラインを形成し、
各パターンに区画してなる概略矩形状の基板において、
各パターン間のスクライブラインは、1回レーザ処理に
より形成すると共に、基板端辺側の捨てパターンを区画
するスクライブラインは、2回レーザ処理して形成する
ことを特徴としている。
(D) Means and Actions for Solving the Problem In order to solve the above problem, the thermal head substrate of the present invention forms a scribe line by laser treatment,
In a roughly rectangular substrate divided into each pattern,
The scribe line between the patterns is formed by performing the laser processing once, and the scribe line that defines the discarded pattern on the edge side of the substrate is formed by performing the laser processing twice.

この発明のサーマルヘッド用基板では、基板端辺側の捨
てパターンを区画するスクライブラインは、2回レーザ
ビームを照射して穴を形成するので、ビーム径を大きく
することなく、穴を深くすることができる。従って、捨
てパターンの分割が容易となり、分割不良の発生率を低
くすることが可能となる。
In the thermal head substrate of the present invention, the scribe line that defines the discard pattern on the substrate edge side is irradiated with the laser beam twice to form a hole, so that the hole should be deepened without increasing the beam diameter. You can Therefore, it becomes easy to divide the discard pattern, and it is possible to reduce the occurrence rate of division defects.

(ホ)実施例 この発明の一実施例を第1図乃至第4図に基づいて以下
に説明する。
(E) Embodiment An embodiment of the present invention will be described below with reference to FIGS. 1 to 4.

第2図は、実施例電子部品用基板(サーマルヘッド用基
板)1の平面図である。この電子部品用基板1は、例え
ばセラミックよりなるもので、スクライブライン2、3
により、電子部品の基板として使用されるパターン4及
び捨てパターン5とに区画される。
FIG. 2 is a plan view of the electronic component substrate (thermal head substrate) 1 of the embodiment. The electronic component substrate 1 is made of, for example, ceramic, and has scribe lines 2 and 3
Thus, it is divided into a pattern 4 and a discard pattern 5 used as a substrate of an electronic component.

スクライブライン2は、パターン4同志を区画している
もので、従来と同様、1回のレーザ処理で形成されてい
る(第6図参照)。これに対して、スクライブライン3
は、パターン4と捨てパターン5とを区画しており、2
回のレーザ処理すなわち、1箇所に2回レーザビームを
照射して深さが基板厚さtの1/2程度の穴pを所定ピッ
チをおいて形成したものである(第1図参照)。レーザ
ビーム径は1回処理の場合と同じなので、電子部品用基
板1にマイクロクラックが生じる危険性は少ない。
The scribe line 2 divides the patterns 4 from each other, and is formed by one laser treatment as in the conventional case (see FIG. 6). On the other hand, scribe line 3
Divides the pattern 4 and the discard pattern 5,
Laser processing is performed once, that is, a laser beam is irradiated twice at one location to form holes p having a depth of about ½ of the substrate thickness t at a predetermined pitch (see FIG. 1). Since the diameter of the laser beam is the same as in the case of one-time processing, the risk of microcracks in the electronic component substrate 1 is low.

この電子部品用基板1は、各パターン4の部分に、電子
部品の構成要素をつくりこんだ後、例えばサーマルヘッ
ドの場合であれば、グレーズ層、発熱抵抗体、電極パタ
ーン等を形成した後、個々のパターン4に分割される。
In this electronic component substrate 1, after forming the components of the electronic component in the portions of each pattern 4, for example, in the case of a thermal head, after forming a glaze layer, a heating resistor, an electrode pattern, etc., It is divided into individual patterns 4.

以下の第1表は、2回レーザ処理の場合と、1回レーザ
処理の場合とで、捨てパターン5分割時の抗折力F、不
良率P、割れ角度θとを比較して示している。
Table 1 below shows a comparison of the transverse rupture force F, the defect rate P, and the crack angle θ when the discard pattern is divided into five, in the case of the two-time laser treatment and the case of the one-time laser treatment. .

ここで抗折力Fは、第3図に示すように、治具6a、6bで
電子部品用基板1を挟持すると共に、捨てパターン5に
治具7を装着して、この治具7をプッシュプルゲージ8
で押圧し、捨てパターン5が割り取れた時のプッシュプ
ルゲージ8の読みである。ここでは、電子部品基板1の
厚さt及び幅wは、それぞれ1.05mm、55mmである。な
お、参考までに治具6a、6bの寸法l1、l2は、それぞれ23
mm、73mmである。また、割れ角度θは、第4図に示すよ
うに、割れ面fと電子部品用基板1に垂直な方向とのな
す角度であり、小さいほど分割が良好に行われたことに
なる。
Here, as for the transverse rupture force F, as shown in FIG. 3, the electronic component substrate 1 is clamped by the jigs 6a and 6b, the jig 7 is mounted on the discard pattern 5, and the jig 7 is pushed. Pull gauge 8
This is a reading of the push-pull gauge 8 when the discard pattern 5 is broken by pressing with. Here, the thickness t and the width w of the electronic component substrate 1 are 1.05 mm and 55 mm, respectively. For reference, the dimensions l 1 and l 2 of jigs 6a and 6b are 23
mm and 73 mm. As shown in FIG. 4, the crack angle θ is an angle formed by the crack surface f and the direction perpendicular to the electronic component substrate 1, and the smaller the crack angle, the better the division.

第1表にも示すように、2回レーザ処理の場合は、1回
レーザ処理の場合に比べて、抗折力F、不良率P、割れ
角度θのいずれもが小さく、捨てパターン5を容易に分
割できることが確認できる。
As shown in Table 1, in the case of the double laser treatment, the transverse rupture force F, the defect rate P, and the crack angle θ are all smaller than in the case of the single laser treatment, and the discard pattern 5 can be easily formed. It can be confirmed that it can be divided into.

(ヘ)発明の効果 以上説明したように、この発明のサーマルヘッド用基板
は、端部の捨てパターンを区画するスクライブライン
は、2回レーザ処理して形成することを特徴とするもの
であるから、捨てパターンを容易に分割でき、分割不良
の発生を防止できる利点を有している。
(F) Effects of the Invention As described above, the thermal head substrate of the present invention is characterized in that the scribe line that defines the end waste pattern is formed by performing laser processing twice. The advantage is that the discard pattern can be divided easily and the occurrence of division failure can be prevented.

【図面の簡単な説明】[Brief description of drawings]

第1図は、この発明の一実施例における電子部品用基板
(サーマルヘッド用基板)のスクライブラインに沿う断
面図、第2図は、同電子部品用基板の平面図、第3図
は、同電子部品用基板の抗折力測定を説明する斜視図、
第4図は、同電子部品用基板の捨てパターンの割れ角度
を説明する図、第5図は、従来の電子部品用基板の平面
図、第6図(a)は、同従来の電子部品用基板のスクラ
イブラインを拡大して示す図、第6図(b)は、同従来
の電子部品用基板のスクライブラインに沿う断面図であ
る。 1:電子部品用基板、5:捨てパターン、 2・3:スクライブライン。
FIG. 1 is a sectional view of an electronic component substrate (thermal head substrate) along a scribe line according to an embodiment of the present invention, FIG. 2 is a plan view of the electronic component substrate, and FIG. A perspective view illustrating bending strength measurement of an electronic component substrate,
FIG. 4 is a diagram for explaining a crack angle of a discard pattern of the electronic component substrate, FIG. 5 is a plan view of a conventional electronic component substrate, and FIG. 6 (a) is a conventional electronic component substrate. The figure which expands and shows the scribe line of a board | substrate, FIG.6 (b) is sectional drawing which follows the scribe line of the same conventional electronic component board | substrate. 1: Electronic component substrate, 5: Discard pattern, 2/3: Scribe line.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】レーザ処理によりスクライブラインを形成
し、各パターン区画してなる概略矩形状のサーマルヘッ
ド用基板において、 各パターン間のスクライブラインは、1回レーザ処理に
より形成すると共に、基板端辺側の捨てパターンを区画
するスクライブラインは、2回レーザ処理して形成する
ことを特徴とするサーマルヘッド用基板。
1. A substrate for a thermal head having a substantially rectangular shape in which scribe lines are formed by laser processing and each pattern is divided, and a scribe line between each pattern is formed by laser processing once, and a substrate edge is formed. The scribe line that defines the side discard pattern is formed by performing laser processing twice, and is a substrate for a thermal head.
【請求項2】特許請求の範囲1記載の基板を備えた電子
部品。
2. An electronic component provided with the substrate according to claim 1.
JP31720789A 1989-12-05 1989-12-05 Substrate for thermal head and electronic component including the same Expired - Lifetime JPH0744163B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31720789A JPH0744163B2 (en) 1989-12-05 1989-12-05 Substrate for thermal head and electronic component including the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31720789A JPH0744163B2 (en) 1989-12-05 1989-12-05 Substrate for thermal head and electronic component including the same

Publications (2)

Publication Number Publication Date
JPH03177047A JPH03177047A (en) 1991-08-01
JPH0744163B2 true JPH0744163B2 (en) 1995-05-15

Family

ID=18085659

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31720789A Expired - Lifetime JPH0744163B2 (en) 1989-12-05 1989-12-05 Substrate for thermal head and electronic component including the same

Country Status (1)

Country Link
JP (1) JPH0744163B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5621708B2 (en) * 2011-05-17 2014-11-12 株式会社村田製作所 Manufacturing method of multilayer ceramic electronic component

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4886466A (en) * 1972-02-16 1973-11-15
JPS6255310U (en) * 1985-09-25 1987-04-06

Also Published As

Publication number Publication date
JPH03177047A (en) 1991-08-01

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