JPH09306710A - Chip network electronic component - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable reduction in the possibility that a micro crack is generated at a portion where a plane part and a bottom part cross each other, causing a crack in a protruding portion and isolating a chip network electronic component from an electrode. SOLUTION: This competent has a plurality of element, such as, resistors or capacitors, on the surface of a base, and a plurality of recessed parts one the outer periphery thereof, each of which includes a pair of plane parts 8A and a bottom part 8B continued to both plane parts 8A. Protruding parts between the recessed parts are formed as electrodes. In this case, by chamfering a part where the plane part 8A and the bottom part 8B of the recessed part cross each other, so as to have a radius greater than 0.1mm, generation of a crack in the protruding part is prevented to reduce the possibility of a defective product.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to, for example, a chip network electronic component provided with a plurality of resistors and capacitors, a coil and the like, or a composite chip network electronic component in which the resistors, capacitors and coils are combined and a manufacturing method thereof. Involve

[0002]

2. Description of the Related Art Conventionally, as a chip network electronic component of this type, a chip network resistor having a plurality of resistance elements has been known. Taking this chip network resistor as an example, a conventional technique will be described below with reference to FIGS. Reference numeral 20 shown in FIG. 5 is a substrate having a plate thickness having an insulating property such as a ceramic for a network resistor. The substrate 20 is a product on the upper and lower surfaces of a so-called green sheet substrate 20 for firing such as aluminum in advance. The substrate 21 is divided into a substantially rectangular base body 21 (break), and in order to facilitate the break, vertical slit lines 22 and horizontal slit lines 23 are provided on the base 21.
A rectangular hole 28 having a rectangular shape in plan view is formed so as to penetrate the plate thickness of the substrate 20 at the intersection with the lines 2 and 23 and in the middle of the vertical slit, and then baked at a high temperature of about 700 degrees Celsius.

On the surface of the substrate 20 thus formed, a resistor layer (not shown) whose main component is, for example, ruthenium oxide, and a surface electrode layer 29A for energizing the resistor layer,
After providing a protective layer 30 covering a part of the resistor layer and the surface electrode 29 by printing or vapor deposition, the substrate 20 is divided along the vertical slits 22 and divided into a plurality of strip-shaped substrates.

Side electrodes 29B are provided by printing and baking on the side surfaces of the plurality of substrates thus separated, and further separated by the lateral slits 23 to separate each chip network resistor. The surface of the electrode 29 of the chip network resistor that is separated and exposed to the outside in this way is plated with Ni and solder to complete the product. FIG. 6 is an external plan view of the chip network of this finished product. As shown in FIG. 6, the external appearance is such that a plurality of electrodes 29 project from the outer periphery of the base 21 and, as a result, a concave shape is formed between the electrodes 29, 29. 21A of convex portions are formed between the concave portions. The shape of this concave portion will be described in detail later.

Further, in the network resistor as described above, the electrode pitch of other ICs similarly mounted on the wiring pattern of the circuit board is made uniform, and the dimension between this electrode pitch and the electrodes 29, 29. Therefore, the interval P2 between the adjacent electrodes 29 is set to 0.3 to 0.
It is set to an extremely narrow 5 mm. The thickness of the substrate 20 is also very thin, and a ceramic substrate of 0.5, 0.4, or 0.3 mm is used.

As described above, the distance between the electrodes 29 is 0.5 mm.
When soldering the network resistance to the wiring pattern of the circuit board made of glass epoxy or the like as described below, there is a fear that adjacent electrodes may be short-circuited by the solder, and in order to improve such a problem, the present application Person is Japanese Patent Publication No. 5-243020 or US Pat. No. 5,334,9.
As shown in No. 68, it is proposed to replace the conventional round hole or oval hole with a hole 28 having a rectangular shape in plan view.

The hole 2 described above has a rectangular shape in plan view.
By changing the number to 8, the pair of linear flat portions 28A and 28A facing each other and the bottom portion 28B orthogonal to the flat portions 28A and 28A are formed as shown in FIG.
In the step of becoming one chip network resistor, the plane portions 28A and 28A are divided into two at the central portions thereof, respectively, and the above-mentioned concave portions are formed as shown in FIG. As described above, by forming the concave portion with one linear bottom portion 28B and the pair of flat surface portions 28A orthogonal to the concave bottom portion 28B, it is possible to reduce the above-described problem of short circuit due to solder during mounting. It is experimentally known that such reduction can be achieved, but various technical reasons are conceivable, one of which will be described with reference to FIG.

The distance between the electrodes 29, 29 is 0.5 because it is necessary to make it uniform with other wiring pattern intervals as described above.
Since it is limited to mm or less, it cannot be made large so as not to cause a short circuit. However, as described above, the electrodes 29, 29 are separated from each other by the concave portion composed of the one linear bottom portion 28B and the pair of flat surface portions 28A orthogonal to the linear bottom portion 28B. The distance between the electrodes can be long. That is, the solder is propagated from the flat surface portion 28A to the bottom surface portion 28 along the direction of the arrow in FIG.
Since it propagates to B and the plane portion 28A, it is possible to extend the substantial distance between the electrodes 29 where solder propagates. For example, in the case of a conventional semi-circular shape where the concave portion is shown by the one-dot chain line K (see, for example, Japanese Utility Model Laid-Open No. 61-37994), the above-mentioned flat portions are not parallel and there is no bottom portion. Therefore, compared with the configuration of the concave portion described above, the substantial inter-electrode distance is substantially the same in the linear distance between the electrodes 29 and 29 and the substantial solder propagation distance, and thus the possibility of short circuit is high.

[0009]

However, as described above, in the case where the concave portion formed of the pair of flat surface portions 28A and the bottom surface portion 28B is formed, the strength of the convex portion formed between the concave portions is the same as that described above. The strength is smaller than the strength of the convex portions formed between the semicircular concave portions as in Japanese Utility Model Laid-Open No. 61-37994. To solve this, it is conceivable to increase the width P1 of the electrode 29, but it is 1 mm or less (usually 0.5 mm in view of the wiring pattern pitch to be mounted).
There is a problem that it can not be increased because it can only take the width of (degree). When the strength of the convex portion 21A is low as described above, during the manufacturing process (for example, during plating of a barrel or the like, or the measuring terminal 3 shown in FIG. 9).
1 is pressed from above with a pressure of about 100 g,
When the resistance value is measured (and when the resistance value is measured), the convex portion 21A is cracked and separated from the base 21.
May disappear, or microcracks may occur at the intersections of the flat surface portion 28A and the bottom surface portion 28B, as shown in FIG. 8, causing breakage of the convex portion 21A.

[0010]

In order to solve the above-mentioned problems, the invention described in claim 1 of the present application has a plurality of elements such as resistors or capacitors on the surface of a substrate, and a pair of elements on the outer periphery thereof. Is a chip network electronic component having a plurality of concave portions each including a flat surface portion and a bottom surface portion connected to both flat surface portions, and a convex portion between the concave portions is an electrode, wherein the flat surface portion and the bottom surface portion of the concave portion It is characterized in that the portion where is intersected with has a chamfered shape with a radius larger than 0.1. Normally when chamfering a ceramic substrate in a rectangular shape, chamfering with a radius of about 0.08 mm is recommended so that cracks do not occur at the corners during processing (for example, during firing). In order to reduce the occurrence of problems such as cracks in the manufacturing process of parts, it is necessary to chamfer more than 0.1 mm.

Further, according to the present invention, a plurality of elements such as resistors or capacitors are provided on the surface of the base body, and a plurality of concave portions having a pair of flat portions and a bottom portion connected to both flat portions are provided on the outer periphery thereof. A pair of plane portions facing each other of the concave portions are arranged substantially parallel to each other, and a distance P2 between the two flat portions is smaller than 0.5 mm. It is characterized in that a portion where the portion and the bottom portion intersect each other has a chamfered shape having a radius larger than 0.1. In claim 3, claim 2
In the above chip network electronic component, the width P1 of the electrode of the convex portion is set to be larger than the distance P2 of the plane portion.

It goes without saying that if the element formed on the surface of the base is a conductor integrally formed with the electrode, it can be applied to a network electronic component as a jumper chip network.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION One embodiment in the case of applying a resistance element to a chip network electronic component of the present invention will be described below with reference to FIGS. 1 is a plan view of the chip network resistor, FIG. 2 is a sectional view taken along the line AA of FIG. 1, and FIG. 3 is a sectional view taken along the line BB.

A plurality of resistance elements 2 are provided on the surface of a base 1 having a rectangular shape in a plan view, and two of the resistance elements 2 facing each other in the outer periphery M thereof are provided.
On one side M1, M1, a concave portion 8 including a pair of flat surface portions 8A, 8A and a bottom surface portion 8B connected to both flat surface portions 8A, 8A.
Is a chip network having a plurality of convex portions 9 between the concave portions as electrodes, and the pair of flat surface portions 8A, 8A facing each other of the concave portions are arranged substantially in parallel. The resistance element 2 is formed by printing a resistance material such as ruthenium oxide and adjusting the resistance value by laser trimming or by vapor deposition or by providing the resistance material so as to have a predetermined resistance value. In order to protect the resistance element 2, it is protected by the glass or resin coating layer 3.

The distance P2 between the flat portions 8A and 8A is 0.3 mm in this embodiment, and the flat portion 8A and the bottom portion 8B are the same.
The portion where is intersected with has a chamfered shape with a radius larger than 0.1 mm. If the chamfered shape is 0.1 mm or more in this way, as in the conventional case described with reference to FIG.
The risk of being separated from According to the experiment, it is possible to almost eliminate cracks during measurement and during transportation.

Further, in the present embodiment, the width P1 of the electrode 9 of the convex portion shown in FIG. 1 is 0.5 mm larger than the width P2.
However, by making the electrode width as large as possible such that P1> P2, it is possible to reduce the influence of cracking. Further, the concave portion 8 is constituted by a pair of flat surface portions 8A, 8A and a bottom surface portion 8B connected to both flat surface portions 8A, 8A,
Even if the pitch between the wiring patterns of the circuit board on which the chip network resistor is mounted is a fine pitch of 0.5 mm or less, the substantial distance between the adjacent electrodes 9 (see FIG. 8).
(See arrow) can be increased, and there is an advantage that the problem of short circuit during soldering or plating such as solder reflow can be reduced. In FIGS. 1 and 2, 9A is a front surface electrode, 9B is a side surface electrode, 9C is a back surface electrode, and the side surface electrode 9B is formed by printing. Become.

A portion where the flat surface portion 8A and the bottom surface portion 8B, which are chamfered and have a radius larger than 0.1 mm of the concave portion 8, intersect with each other is formed as follows. The ceramic used as the material of the base 1 is a liquid viscous material in which alumina powder is mixed with a binder and a solvent, for example, is spread on a roll of a spreader by adjusting the thickness by a doctor blade method or the like, dried, and formed into a sheet. Then, a so-called green sheet, which is a mixture of unfired ceramic sheets, is fired to be formed, and the concave portion is formed by punching in the die 10 shown in FIG. 4 before firing. The shape of the portion where the flat surface portion 8A and the bottom surface portion 8B intersect (the chamfered shape larger than 0.1 mm) is formed by transferring the corner portion 10A of the mold 10.

As described above, when making a rectangular hole in the green sheet, it is recommended to chamfer with a radius of about 0.08 mm so that cracks do not occur at the corners during firing, but such chamfering is recommended. In view of the problem that cracks occur due to barrel plating during the manufacturing process and the load during measurement, and the finished product is stored in the taping with the electrodes separated (defective), the result of trial and error is a radius of 0.1 mm.
It was found that when the chamfering was performed to a larger extent, the problem of defects as described above was almost eliminated.

[0019]

By adopting the configuration as in the present invention,
There is an effect that it is possible to reduce the risk that microcracks are generated at the intersection of the flat surface portion and the bottom surface portion, the convex portion is broken, and the electrodes are separated from the chip network electronic component.

[Brief description of drawings]

FIG. 1 is a plan view of a chip network resistor of the present invention.

FIG. 2 is a sectional view taken along line AA of FIG.

FIG. 3 is a sectional view taken along line BB of FIG. 1;

FIG. 4 is a perspective view showing a die for punching out a green sheet.

FIG. 5 is a partial perspective view showing a state of being separated into individual chip network resistors.

FIG. 6 is a plan view of a conventional chip network resistor.

FIG. 7 is an enlarged perspective view of a concave portion.

FIG. 8 is an explanatory diagram illustrating a conventional problem.

FIG. 9 is an explanatory diagram illustrating a conventional problem.

[Explanation of symbols]

 28B ... ・ Bottom part 28A ・ ・ ・ ・ Flat part 10 ・ ・ ・ ・ ・ ・ Mold 10A ・ ・ ・ ・ Corner

Claims (3)

[Claims] 1. A substrate is provided with a plurality of elements such as resistors or capacitors on the surface thereof, and a plurality of concave portions each having a pair of flat portions and a bottom portion connected to both flat portions are provided on the outer periphery thereof, and between the concave portions. Is a chip network electronic component using the convex portion as an electrode, and a portion where the flat portion and the bottom portion of the concave portion intersect each other has a chamfered shape with a radius larger than 0.1 mm. 2. A substrate is provided with a plurality of elements such as resistors or capacitors on the surface thereof, and a plurality of concave portions each having a pair of flat surface portions and a bottom surface portion connected to both flat surface portions are provided on the outer periphery thereof, and between the concave portions Is a chip network electronic component using the convex portions as electrodes, and the pair of flat portions facing each other of the concave portions are arranged substantially parallel to each other, and the distance P2 between the flat portions is less than 0.5 mm, and the flat portions and the bottom surface are A chip network electronic component having a chamfered shape with a radius larger than 0.1 mm at a portion where the parts intersect. 3. The chip network electronic component according to claim 2, wherein a width P1 of the electrode of the convex portion is set to be larger than a distance P2 of the flat portion.