JP2001345661A - High frequency circuit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a board which contains a high frequency circuit including a high precision LC which is hardly affected by irregularity of thickness of a dielectric layer. SOLUTION: In this high frequency circuit board, an inductor L and a capacitor C are included by forming electrodes 2, 3 and conductors 4, 5 which are connected with the electrodes on both surfaces of a dielectric layer 8. The conductors 4, 5 of the inductor L are constituted of a plurality of conductor columns 6 which penetrate the dielectric layer 8 of the capacitor in the thickness direction at positions different from those of the electrodes 2, 3, and conductor wirings 4a, 4b, 5a, 5b which are formed on an upper or a lower surface of the dielectric layer 8 of the capacitor and connect the conductor columns 6 in series between the one electrode 2 and the other electrode 3 of the capacitor C.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a high-frequency circuit board, and more particularly to a high-frequency circuit board including a high-precision parallel resonance circuit.

[0002]

2. Description of the Related Art Conventionally, as an example of a circuit board having a built-in high-frequency circuit including an inductor component L and a capacitor component C, as shown in FIG. It is used for a diplexer Dx used for sharing with the unit Rx. In addition to the diplexer Dx, it is widely used in other high-frequency circuits and components.

As shown in FIG. 4, a specific circuit of the diplexer Dx generally comprises a parallel resonance circuit composed of an inductor L1 and a capacitor C1 on the transmission side and an inductor L2 and a capacitor C2 on the reception side. Each resonance circuit has a specific frequency f ₀ (f ₀ = 1 / (2π (LC))
^It functions as a filter that becomes band rejection for ^1/2 ))).

[0004] Means for forming a capacitor and an inductor in order to incorporate such a high-frequency circuit including LC in a multilayer circuit board are usually as follows. That is, as shown in FIG. 5, a dielectric layer 8 having one capacitor counter electrode 2 and an inductor conductor 4 connected thereto formed on the surface, and the other capacitor counter electrode 3 and an inductor conductor 5 connected thereto being formed on the surface. And a dielectric layer 9 formed on the substrate. Then, a multilayer circuit board 7 is formed by connecting the inductor conductor 4 and the inductor conductor 5 by the via conductor 6 provided in the dielectric layer 8.

In this case, the capacitance value C of the capacitor is appropriately determined by appropriately changing the areas of the capacitance counter electrodes 2 and 3. Further, the inductance value L of all inductor conductors including the inductor conductor 4, the via hole conductor 5, and the inductor conductor 4 is appropriately determined by the length and width of the inductor conductors 4, 5.

As described above, in the high-frequency circuit in which the capacitance component is built in the multilayer circuit board 7, the capacitance value C changes due to the thickness variation of the dielectric layer 8. That is, as the thickness of the dielectric layer 8 increases (or decreases), the capacitance value C decreases (or increases).
On the other hand, the inductance value of the inductor depends not only strictly on the length and width of the inductor conductors 4 and 5, but also on the length and diameter of the via conductor 6 connecting them. That is, as the thickness of the dielectric layer 8 increases (or decreases), the inductance value L increases (or decreases), and the inductance value L cancels out the change in the capacitance value C due to the variation in the thickness of the dielectric layer 8. L fluctuates.

[0007]

However, since the conductor length that determines the inductance value L is the sum of the inductor conductors 4, 5 and the via conductor 6, the variation Δd due to the variation in the thickness of the dielectric layer 8 is: Only the via conductor 6 is slight. Accordingly, while the capacitance value C varies almost in inverse proportion to the thickness of the dielectric layer 8, the inductance value L
Does not change much, and eventually the band rejection frequency changes with the variation Δd of the thickness of the dielectric layer 8.

As a result, high-precision high-frequency circuit boards cannot be mass-produced.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to provide a substrate with a built-in high-frequency circuit including a high-precision LC which is hardly affected by variations in the thickness of a dielectric layer. Is to provide.

[0010]

In order to solve the above-mentioned problems, a high-frequency circuit board according to the present invention is provided on both sides of a dielectric layer.
A high-frequency circuit board comprising a capacitor counter electrode and an inductor conductor connected thereto and including an inductor component L and a capacitor component C, wherein the inductor conductor positions the dielectric layer at a different position from the capacitor counter electrode. 3. A high-frequency circuit comprising: a plurality of conductor pillars penetrating in a thickness direction; and a plurality of conductor wirings formed on an upper surface or a lower surface of the dielectric layer and connected in series via the conductor pillars. It is a substrate.

Further, the conductor pillar may be a via conductor or an end face conductor, and a plurality of these may be combined.

Further, when the number of the conductor pillars is the thickness d of the dielectric layer and the thickness variation Δd of the dielectric layer, the inductance value L of the inductor conductor is proportional to the sum of the thickness and the thickness variation d + Δd. It is a high-frequency circuit board that is set to be:

In the high-frequency circuit board according to the present invention, since the inductor L is formed by the conductor wiring and the plurality of conductor columns, the total length of the conductor forming the inductor L increases with the variation in the thickness of the dielectric layer. fluctuate. Therefore, the inductance of the inductor L greatly changes due to the variation in the thickness of the dielectric layer. For this reason, even if the capacitance value of the capacitor C fluctuates due to variations in the thickness of the dielectric layer, the inductance fluctuates so as to sufficiently cancel the fluctuation amount. For example, when the thickness of the dielectric layer is larger than the design value, the capacitance generated in the capacitor C is smaller than the design value, but since the length of all the conductor pillars is longer, the inductance value of the inductor L also becomes larger, and The frequency is kept almost constant near the design value.

Therefore, when the number of the conductor pillars is assumed to vary within a predetermined range, the inductance value of the inductor L is equal to the sum (d + Δd) of the thickness d and the thickness variation Δd of the dielectric layer. It is preferable to set them so as to have a proportional relationship. Because the capacitance value of the capacitor is inversely proportional to (d + Δd) according to the principle of the capacitor, by setting the number of the conductor columns as such, LC = constant, and the band rejection frequency is also kept constant.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A high-frequency circuit board according to the present invention will be described below with reference to the drawings.

FIG. 1 is an exploded perspective view showing a ceramic multilayer circuit board according to an embodiment having a built-in band rejection filter composed of an LC parallel resonance circuit.

Components corresponding to the conventional components are denoted by the same reference numerals, but the inductor conductors 4, 5 and the via conductor 6 have different shapes and positional relationships, and will be described in detail together with the other components.

The multilayer circuit board 7 includes two laminated dielectric layers 8 and 9, and on the upper surfaces of the dielectric layers 8 and 9, capacitor counter electrodes 2 and 3 for capacitors are formed to face each other. Have been. In addition, an inductor conductor 4 is connected to a part of the one capacitance opposing electrode 2. This inductor conductor 4 includes a plurality of upper surface conductor wires 4a,... 4a formed on the upper surface of the dielectric layer 8, and a plurality of lower surface conductor wires 4b, formed on the upper surface of the dielectric layer 9. .. 4b and via conductors 6,... 6 which are a plurality of conductor pillars penetrating in a thickness direction of the dielectric layer 8 at positions different from the capacitance counter electrodes 2, 3. . The conductor wirings 4a and 4b and the via conductor 6 are connected to the upper conductor wiring 4 starting from the capacitance counter electrode 2.
a, the via conductor 6, the lower conductor wire 4b, the via conductor 6, and the upper conductor wire 4a are connected in series while repeating rectangular irregularities like a pulse waveform in a sectional view in the thickness direction.

On the other hand, the capacitance counter electrode 3 and the inductor conductor 5 connected thereto have a shape in which the capacitance counter electrode 2 and the inductor conductor 4 are inverted and provided on the dielectric layer 9. The lower conductor wiring 4b is formed on the upper surface of the dielectric layer 9 in a later-described manufacturing stage, but is formed on the lower surface of the multilayer circuit board 7 when viewed from the dielectric layer 8. Further, it may be formed on the lower surface of the dielectric layer 8 from the actual manufacturing stage. The same applies to the upper surface conductor wiring 5a. The inductor conductor 4 and the inductor conductor 5 are connected to the lower conductor wire 4b at the end of the inductor conductor 4, the upper conductor wire 5b at the end of the inductor conductor 5, and the conductor wire 4b.
b and 5b are connected via via conductors 6 provided farthest from the capacitance counter electrodes 2 and 3.

FIG. 2 shows an equivalent circuit of an LC circuit portion formed on the multilayer circuit board. The inductor conductors 4 and 5 have an inductance component L4, which is divided into an inductance Lp by the conductors 4a, 4b, 5a and 5b and an inductance Lv by the via conductor 6. Therefore, the equivalent circuit is the capacitance C4 of the capacitor.
And a inductance Lp, Lv.

This circuit has a specific frequency fo (f ₀ = 1 / (2
π (L ₄ C ₄ ) ^1/2 )).

In this equivalent circuit, the capacitance value C4 and the inductance value L4 of the capacitor change depending on the thickness of the dielectric layer 8. However, while the capacitance value C4 of the capacitor is inversely proportional to its thickness, the inductance value L4
Increases and decreases with the increase and decrease in the thickness of the dielectric layer 8 along with the total conductor length. Moreover, a sufficient number of via conductors 6 are provided so that the inductance value L4 can compensate for the increase or decrease of the capacitance value C4 in a predetermined thickness range. As a result, even when the thickness of the dielectric layer varies within a predetermined thickness range, the capacitance value C4
The product L4 × C4 of the frequency and the inductance value L4 becomes substantially constant, and the variation of the band rejection frequency is suppressed.

The above-mentioned multilayer circuit board can be manufactured by a known method. For example, a green sheet mainly composed of a dielectric ceramic to be the dielectric layer 8 is prepared by a doctor blade method, a pulling method or the like. After the ceramic green sheet is cut to a predetermined size, a through hole serving as a via conductor is punched out, and the through hole is filled with a conductive paste serving as a material for the via conductor. Thereafter, linear conductors to be used as the capacitor counter electrode 2 of the capacitor and the conductor wirings 4a and 5b of the inductor are formed by printing a conductive paste.

Next, the green sheet serving as the dielectric layer 9 is similarly provided with the electrode 3 of the capacitor and the conductor wiring 4 of the inductor.
The linear conductors to be b and 5a are formed by printing a conductive paste.

The green sheets on which the various conductors are formed as described above are laminated to form an unfired substrate. This substrate is subjected to predetermined firing conditions suitable for the ceramic and conductive paste, for example, a peak temperature of 800 to 1
The firing is performed in an air atmosphere at 000 ° C., for example, 950 ° C. for 30 minutes, or in a neutral atmosphere.

Thereafter, a thick film resistor is burned on the fired substrate so as to be connected to the conductor wiring on the surface, if necessary, or a protective film made of an insulating material is coated. Various electronic components such as chip capacitors are joined by soldering. Thus, the high-frequency circuit board according to the embodiment of the present invention is completed.

Although the above manufacturing method utilizes a method of laminating green sheets, a slurry for forming a dielectric layer and a conductive paste for forming conductive wiring may be sequentially printed and laminated. In this case, a photo-curable monomer may be added to the slurry, and the printed dielectric coating film may be selectively exposed and developed. Alternatively, the substrate in the unfired state may be formed into a large shape in which a plurality of substrates are united, and division grooves may be formed as necessary before firing, and the substrate may be divided into individual circuit boards after firing.

[0028]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the circuit board shown in FIG. 1, the thickness d of the dielectric layer is 0.2 mm, and the variation Δd of the thickness of the dielectric layer is ±±.
0.004 mm, relative permittivity εr of the dielectric layer = 18, width w of the conductor wiring among the inductor conductors = 0.1 mm, inductor conductor length (not including the via conductor) lp = 1.1 mm,
Via conductor diameter r = 0.1 mm, number of via conductors n = 11,
A high-frequency circuit board was manufactured so that the via conductor length was the same as the thickness d of the dielectric layer, and the capacitor electrode area S was 0.3 mm × 0.3 mm.

As a result of measuring the frequency at which the band of the circuit board is rejected, the results are as shown in Table 1 and FIG.

[0030]

[Table 1]

As a result, the thickness variation Δd of the dielectric layer
The variation of the frequency fo, which causes band rejection, is 4% or less. Comparative Example In the circuit board shown in FIG.
2 mm, variation in thickness of dielectric layer Δd = ± 0.004
mm, the relative permittivity εr of the dielectric layer = 18, the width w of the inductor conductor is 0.1 mm, the inductor conductor length (not including the via conductor) lp = 3.1 mm, the via conductor diameter r = 0.1 mm,
The number n of via conductors is one, and the via conductor length is the thickness d of the dielectric layer.
Same as above, capacitor electrode area S = 0.3mm × 0.3m
A high-frequency circuit board was manufactured so as to obtain m.

As a result of measuring the frequency at which the band of the circuit board is rejected, the results are as shown in Table 2 and FIG.

[0033]

[Table 2]

As a result, the thickness variation Δd of the dielectric layer
The variation of the frequency fo, which is the band rejection, is 10% or more.

[0035]

As described above, according to the present invention, the frequency characteristics are kept substantially constant even if the thickness of the dielectric layer varies, so that a high-precision high-frequency circuit board can be manufactured at a high yield at a low cost. can do.

[Brief description of the drawings]

FIG. 1 is an exploded perspective view showing a high-frequency circuit board according to the present invention.

FIG. 2 is an equivalent circuit diagram of the high-frequency circuit board of FIG.

FIG. 3 is a circuit example to which the high-frequency circuit board of the present invention is applied.

FIG. 4 is a substantial circuit diagram of FIG. 3;

FIG. 5 is an exploded perspective view showing a conventional high-frequency circuit board.

FIG. 6 is a characteristic diagram showing a relationship between a thickness of a dielectric layer and a band frequency in the high-frequency circuit board according to the present invention.

FIG. 7 is a characteristic diagram illustrating a relationship between a thickness of a dielectric layer and a band frequency in a high-frequency circuit board according to a comparative example.

[Explanation of symbols]

 2, 3 electrode 4, 5 inductor conductor 6 via conductor 7 multilayer circuit board (high-frequency circuit board) 8, 9 dielectric layer

Claims (3)

[Claims] 1. A high-frequency circuit board comprising a capacitor opposing electrode and an inductor conductor connected thereto formed on both surfaces of a dielectric layer, and comprising an inductor component L and a capacitor component C, wherein the inductor conductor comprises: A plurality of conductor pillars penetrating the dielectric layer in a thickness direction at a position different from the capacitance counter electrode, and a plurality of conductor pillars formed on an upper surface or a lower surface of the dielectric layer and connected in series via the conductor pillars A high-frequency circuit board comprising a conductor wiring. 2. The high-frequency circuit board according to claim 1, wherein said conductor pillar is at least one selected from a via conductor and an end surface conductor. 3. The number of said conductor pillars is determined by the thickness d of a dielectric layer,
3. The high-frequency circuit board according to claim 1, wherein when the thickness variation of the dielectric layer is Δd, the inductance value L of the inductor conductor is set so as to be proportional to the sum of the thickness and the thickness variation d + Δd.