JPH04241401A - Manufacture of electronic parts equipped with ceramic insulating substrate - Google Patents

Manufacture of electronic parts equipped with ceramic insulating substrate

Info

Publication number
JPH04241401A
JPH04241401A JP3014681A JP1468191A JPH04241401A JP H04241401 A JPH04241401 A JP H04241401A JP 3014681 A JP3014681 A JP 3014681A JP 1468191 A JP1468191 A JP 1468191A JP H04241401 A JPH04241401 A JP H04241401A
Authority
JP
Japan
Prior art keywords
ceramic material
insulating substrate
material plate
breaking
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3014681A
Other languages
Japanese (ja)
Inventor
Hiroaki Hayashi
浩昭 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP3014681A priority Critical patent/JPH04241401A/en
Publication of JPH04241401A publication Critical patent/JPH04241401A/en
Pending legal-status Critical Current

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  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Ceramic Capacitors (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Abstract

PURPOSE:To reduce the fraction defective when manufacturing electronic parts which are constituted by baking a resistor, etc., at the surface of a ceramic insulating substrate. CONSTITUTION:A resistor, etc., are made in the order of manufacturing a ceramic material board 2, making a resistor film 5, etc., at the ceramic material board 2, making nicks 3 and 4 for breaking at the ceramic material board 2, and breaking it into every insulating board 1 along the nicks 3 and 4. There never occurs breaking of cracks in the ceramic material board 2 during the baking of the resistor film 5, etc., and also by deepening the dimensions of the depths of the nicks 3 and 4 and making the end face of an insulating substrate 1 in the condition that it crosses the topside of the insulating substrate 1 at approximately right angles, the dimension accuracy of the insulating substrate 1 can be improved.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、チップ型抵抗器やチッ
プ型コンデンサ、サーマルヘッド或いはハイブリッドI
Cのように、セラミック製の絶縁基板の表面に、抵抗等
の素子や回路等を塗着焼成にて形成して成る電子部品の
製造方法に関するものである。
[Industrial Application Field] The present invention is applicable to chip resistors, chip capacitors, thermal heads, or hybrid I
The present invention relates to a method of manufacturing an electronic component in which elements such as resistors, circuits, etc. are formed on the surface of a ceramic insulating substrate by coating and firing, as shown in FIG.

【0002】0002

【従来の技術】これらセラミック製の絶縁基板を備えた
電子部品のうちチップ型抵抗器Rは、従来は、例えば特
開平2−222103号公報に記載され、且つ、図4に
示すような工程を経て量産されていた。すなわち、多数
個の絶縁基板1を縦方向及び横方向に並べて連接した状
態のセラミック素材板2を、当該セラミック素材板2を
各絶縁基板1ごとにブレイクするための縦筋目線3と横
筋目線4とを予め形成した状態に焼成することによって
製作し、このセラミック素材板2における各絶縁基板1
の上面に、ペースト状の抵抗体をスクリーン印刷にて塗
着して炉内で焼成することによって各抵抗膜5を形成し
、次いで、セラミック素材板2を各横筋目線4に沿って
各棒状セラミック素材板2aごとにブレイクし、これら
各棒状セラミック素材板2aの長手方向に沿った両側縁
に、各抵抗膜5に対する側面電極6を塗着形成し、それ
から、各棒状セラミック素材板2aを、各縦筋目線3に
沿って各絶縁基板1ごとにブレイクするようにしていた
BACKGROUND OF THE INVENTION Among these electronic components equipped with a ceramic insulating substrate, a chip resistor R is conventionally described in, for example, Japanese Unexamined Patent Publication No. 2-222103, and is manufactured by a process as shown in FIG. It was later mass-produced. That is, a ceramic material plate 2 in which a large number of insulating substrates 1 are arranged and connected in the vertical and horizontal directions is separated by a vertical line 3 and a horizontal line 4 for breaking the ceramic material plate 2 for each insulating substrate 1. Each insulating substrate 1 in this ceramic material plate 2 is manufactured by firing in a pre-formed state.
Each resistor film 5 is formed by applying a paste-like resistor on the upper surface by screen printing and firing it in a furnace.Then, the ceramic material plate 2 is attached to each bar-shaped ceramic plate along each horizontal line 4. Each raw ceramic material plate 2a is broken, and side electrodes 6 for each resistive film 5 are applied and formed on both edges along the longitudinal direction of each of these rod-shaped ceramic material plates 2a. A break was made for each insulating substrate 1 along the vertical line 3.

【0003】ところが、このように、セラミック素材板
2を、予め縦筋目線3と横筋目線4とを形成した状態で
焼成して形成する方法では、セラミック素材板2を焼成
するに際しての収縮により、各絶縁基板の平面形状が変
形て、寸法精度が著しく低下してしまうため、抵抗膜5
を印刷するに際して、抵抗膜5の位置がずれてしまう事
態が頻発すると言う問題があった。
However, in this method of firing the ceramic material plate 2 with the vertical grain lines 3 and the horizontal grain lines 4 formed in advance, shrinkage occurs when the ceramic material plate 2 is fired. Since the planar shape of each insulating substrate is deformed and the dimensional accuracy is significantly reduced, the resistive film 5
When printing, there is a problem in that the position of the resistive film 5 frequently shifts.

【0004】そこで最近は、図5に示すように、セラミ
ック素材板2を、縦及び横筋目線3,4を形成していな
い状態に焼成して製作して、焼成後におけるセラミック
素材板2の表面に、レーザーを連続的に又は断続的に照
射することにより、直線状又はミシン目状に延びる縦及
び横筋目線3,4を形成し、次いで、セラミック素材板
2における各絶縁基板1への抵抗膜5の塗着工程、抵抗
膜5の焼成工程、側面電極6の形成工程、各絶縁基板1
へのブレイクと言う工程を順次行うようにしている。
Therefore, recently, as shown in FIG. 5, a ceramic material plate 2 is produced by firing without vertical and horizontal lines 3 and 4, and the surface of the ceramic material plate 2 after firing is By irradiating the laser continuously or intermittently, vertical and horizontal lines 3 and 4 extending linearly or perforated are formed, and then a resistive film is formed on each insulating substrate 1 in the ceramic material plate 2. 5 painting process, baking process of resistive film 5, forming process of side electrode 6, each insulating substrate 1
I try to perform the process of breaking to .

【0005】[0005]

【発明が解決しようとする課題】この図5による製法で
は、各絶縁基板1を所定の平面形状及び所定の寸法に正
確に形成できるので、抵抗膜5を印刷するに際しての抵
抗膜5の位置のずれを防止することはできるが、その反
面、抵抗膜5を焼成して形成する際に、セラミック素材
板2も高温で加熱されるため、縦及び横筋目線3,4の
深さ寸法Hを深く形成すると、抵抗膜5を焼成する際の
熱応力により、セラミック素材板2に、縦及び横筋目線
3,4に沿った割れや亀裂の発生が頻発すると言う問題
があり、このため、縦及び横筋目線3,4の深さ寸法H
を、セラミック素材板2の板厚寸法Tの3分の1程度の
浅い寸法に形成せざるを得なかった。
[Problems to be Solved by the Invention] With the manufacturing method shown in FIG. 5, each insulating substrate 1 can be accurately formed to have a predetermined planar shape and predetermined dimensions, so that the position of the resistive film 5 can be easily determined when printing the resistive film 5. Although it is possible to prevent misalignment, on the other hand, since the ceramic material plate 2 is also heated at a high temperature when the resistive film 5 is fired and formed, the depth dimension H of the vertical and horizontal lines 3 and 4 must be set deep. When formed, there is a problem in that cracks and cracks occur frequently in the ceramic material plate 2 along the vertical and horizontal lines 3 and 4 due to thermal stress during firing of the resistive film 5. Depth dimension H at line of sight 3 and 4
had to be formed to have a shallow dimension of about one-third of the thickness T of the ceramic material plate 2.

【0006】しかし、縦及び横筋目線3,4の深さ寸法
Hが浅いと、セラミック素材板2を各棒状セラミック素
材板2aにブレイクする際、及び、各棒状セラミック素
材板2aを各絶縁基板1ごとにブレイクする際に、セラ
ミック素材板2及び棒状セラミック素材板2aが各絶縁
基板1の表面と直角な方向に沿って割れずに、図3に示
すように、絶縁基板1の表面に対して傾斜した方向に沿
って割れる現象が多発しており、このため、ブレイク後
における各絶縁基板1における端面1aの形状が不揃い
になる、換言すると、絶縁基板1の寸法精度が低下して
しまって、側面電極6の形成に支障をきたしたり、プリ
ント基板への装着が不能になったりすることになり、不
良品の発生率が高いと言う問題があった。
However, if the depth dimension H of the vertical and horizontal lines 3 and 4 is shallow, when breaking the ceramic material plate 2 into each rod-shaped ceramic material plate 2a, and when breaking each rod-shaped ceramic material plate 2a into each insulating substrate 1. When breaking each time, the ceramic material plate 2 and the rod-shaped ceramic material plate 2a do not break along the direction perpendicular to the surface of each insulating substrate 1, and as shown in FIG. The phenomenon of cracking along the inclined direction occurs frequently, and as a result, the shape of the end surface 1a of each insulating substrate 1 after breaking becomes irregular, in other words, the dimensional accuracy of the insulating substrate 1 decreases, This causes problems in the formation of the side electrodes 6 and makes it impossible to attach them to the printed circuit board, resulting in a high rate of defective products.

【0007】同様の問題は、チップ型コンデンサやサー
マルヘッド、或いは、ハイブリッドIC等のように、広
い面積のセラミック素材板を材料として、これに素子や
回路等を焼成したのちブレイクして製造するようにした
電子部品の製造一般において生じていた。本発明は、セ
ラミック製の絶縁基板を備えた電子部品を、不良率を格
段に低減した状態で製造できるようにした方法を提供す
ることを目的とする。
A similar problem arises when manufacturing chip-type capacitors, thermal heads, hybrid ICs, etc. using a ceramic material plate with a large area, firing elements and circuits on it, and then breaking it. This occurred in the general manufacturing of electronic components. SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing an electronic component including a ceramic insulating substrate with a significantly reduced defect rate.

【0008】[0008]

【課題を解決するための手段】この目的を達成するため
本発明は、多数個の絶縁基板を整列して連接した状態の
セラミック素材板を製作し、このセラミック素材板にお
ける各絶縁基板の上面に、抵抗等の素子や回路等を塗着
焼成にて形成し、次いで、前記セラミック素材板を、当
該セラミック素材板を各絶縁基板ごとにブレイクするた
めの筋目線をレーザーの照射にて形成したのち、前記各
筋目線に沿って各絶縁基板ごとにブレイクする構成にし
た。
[Means for Solving the Problems] In order to achieve this object, the present invention manufactures a ceramic material plate in which a large number of insulating substrates are aligned and connected, and the upper surface of each insulating substrate in this ceramic material plate is , elements such as resistors, circuits, etc. are formed by coating and firing, and then, the ceramic material plate is formed with lines for breaking each insulating substrate by laser irradiation. , the structure is such that each insulating substrate is broken along each of the above-mentioned lines.

【0009】[0009]

【作用・効果】このように、セラミック素材板に抵抗等
の素子や回路等を塗着焼成にて形成してから、ブレイク
用の筋目線を形成する構成にすると、セラミック素材板
における各絶縁基板に素子や回路等を焼成する工程にお
いて、セラミック素材板に割れや亀裂が発生することを
、確実に防止できるのであり、しかも、各筋目線を形成
した後においてセラミック素材板に大きな熱応力が生じ
ることはないから、各筋目線の深さ寸法を充分に深くし
て、セラミック素材板を、各絶縁基板の端面を絶縁基板
の上面と略直角にした状態にして、各絶縁基板ごとにブ
レイクすることができ、ブレイク後における各絶縁基板
の寸法精度を格段に向上できることになる。更に、セラ
ミック素材板に筋目線を形成する手段としてのレーザー
は、ごく細巾であるので、レーザーの熱によって抵抗等
の素子や回路等が損傷することもない。
[Function/Effect] In this way, if the configuration is such that elements such as resistors, circuits, etc. are formed on the ceramic material plate by coating and firing, and then the lines for breaking are formed, each insulating substrate on the ceramic material plate is In the process of firing elements, circuits, etc., it is possible to reliably prevent cracks and cracks from occurring in the ceramic material plate, and also to prevent large thermal stress from occurring in the ceramic material plate after forming each line. Therefore, make the depth of each line sufficiently deep, and break the ceramic material board for each insulating board with the end face of each insulating board approximately perpendicular to the top surface of the insulating board. This makes it possible to significantly improve the dimensional accuracy of each insulating substrate after breaking. Further, since the laser used as a means for forming the lines on the ceramic material plate is extremely narrow, elements such as resistors, circuits, etc. are not damaged by the heat of the laser.

【0010】従って本発明によれば、セラミック素材板
に素子や回路等を焼成にて形成するに際してセラミック
素材板に割れや亀裂が発生することを確実に防止できる
ことと、ブレイク後における絶縁基板の寸法精度を格段
に向上できること、及び、抵抗等を損傷するこことなく
ブレイク用の筋目線を形成できることとの三者が相俟っ
て、絶縁基板に抵抗等の素子や回路等を焼成して成る電
子部品を、不良率を格段に低減した状態で量産できる効
果を有する。
Therefore, according to the present invention, it is possible to reliably prevent the occurrence of cracks or cracks in the ceramic material board when forming elements, circuits, etc. on the ceramic material board by firing, and the size of the insulating substrate after the breakage can be reduced. The combination of three factors: the ability to significantly improve accuracy and the ability to form a line of sight for breaking without damaging resistors, etc., is achieved by firing resistors and other elements and circuits on an insulating substrate. It has the effect of mass producing electronic components with a significantly reduced defective rate.

【0011】[0011]

【実施例】次に、本発明をチップ型抵抗器の製造に適用
した場合の実施例を、図面(図1〜図2)に基づいて説
明する。本発明では、先ず、絶縁基板1を縦横に整列し
て連接した状態のセラミック素材板2を、成形してから
炉内で焼成することにより製作し、焼成後におけるセラ
ミック素材板2における各絶縁基板1の上面に、ペース
ト状の抵抗体をスクリーン印刷等にて塗着してから、炉
内で焼成することにより、抵抗膜5を形成する。
[Embodiment] Next, an embodiment in which the present invention is applied to the manufacture of a chip type resistor will be described based on the drawings (FIGS. 1 and 2). In the present invention, first, a ceramic material plate 2 in which insulating substrates 1 are arranged vertically and horizontally and connected is manufactured by molding and firing in a furnace, and each insulating substrate in the ceramic material plate 2 after firing is formed. A resistive film 5 is formed by applying a paste-like resistor to the upper surface of the resistor 1 by screen printing or the like and then firing it in a furnace.

【0012】次いで、セラミック素材板2の表面に、各
絶縁基板1ごとにブレイクするための縦筋目線3と横筋
目線4とを、炭酸ガスレーザー等のレーザーを連続的に
照射して直線状に形成するか、又は、レーザーを断続的
に照射してミシン目状に形成する。この場合、縦及び横
筋目線3,4の深さ寸法は、セラミック素材板2の板厚
寸法Tの半分以上(例えば、セラミック素材板2の板厚
寸法Tの10分の9程度)の深い寸法に形成し、また、
縦及び横筋目線3,4をミシン目状に形成する場合には
、レーザーの照射間隔を150ミクロン以下の寸法にす
る。
Next, vertical lines 3 and horizontal lines 4 for breaking each insulating substrate 1 are formed on the surface of the ceramic material plate 2 by continuous irradiation with a laser such as a carbon dioxide laser to form straight lines. Alternatively, it may be formed into perforations by intermittent laser irradiation. In this case, the depth dimension of the vertical and horizontal lines 3 and 4 is a deep dimension that is more than half the thickness dimension T of the ceramic material plate 2 (for example, about 9/10 of the thickness dimension T of the ceramic material plate 2). and also,
When forming the vertical and horizontal lines 3 and 4 in the form of perforations, the laser irradiation interval is set to 150 microns or less.

【0013】そして、セラミック素材板2を、裏返した
状態でゴム製等の弾性板の上に載せて、これを、軸線を
横筋目線4と平行にしたローラにて押圧するか、又は、
外周面にゴム等の弾性体を張設した2つの平行なローラ
の間に、横筋目線4を両ローラの軸線と平行にした状態
で挿入して、両ローラでセラミック素材板2を挟み付け
た状態で当該両ローラを回転するとかして、セラミック
素材板2を、各横筋目線4に沿って各棒状セラミック素
材板2aごとにブレイクする。それから、各棒状セラミ
ック素材板2aの長手方向に沿った両側縁に、ペースト
状の電極を被覆したのち乾燥することによって側面電極
6を形成し、次いで、各棒状セラミック素材板2aを、
各縦筋目線4に沿って各絶縁基板1ごとにブレイクする
ことにより、チップ型抵抗器Rの単体を得る。
Then, the ceramic material plate 2 is placed upside down on an elastic plate made of rubber or the like, and this is pressed with a roller whose axis is parallel to the horizontal line 4, or
The ceramic material plate 2 was inserted between two parallel rollers whose outer peripheral surfaces were stretched with an elastic material such as rubber, with the horizontal line 4 parallel to the axes of both rollers, and the ceramic material plate 2 was sandwiched between the rollers. By rotating both rollers in this state, the ceramic material plate 2 is broken along each horizontal line 4 into each bar-shaped ceramic material plate 2a. Then, paste-like electrodes are coated on both edges along the longitudinal direction of each rod-shaped ceramic material plate 2a and dried to form side electrodes 6. Next, each rod-shaped ceramic material plate 2a is
By breaking each insulating substrate 1 along each vertical line 4, a single chip resistor R is obtained.

【0014】この製造工程において、抵抗膜5の焼成に
よる形成は、セラミック素材板2に縦及び横筋目線3,
4を形成する以前において行うものであるから、抵抗膜
5を焼成して形成するに際して、セラミック素材板2に
割れや亀裂が発生することは全くないのであり、また、
縦及び横筋目線3,4を形成したあとにおいてセラミッ
ク素材板2に大きな熱応力が生じることがないことによ
り、縦及び横筋目線3,4の深さ寸法を深く形成するこ
とができるから、ブレイク後における各絶縁基板1の端
面1aを、絶縁基板1の上面と略直角な状態に形成する
ことができ、ブレイク後における各絶縁基板1の寸法精
度を格段に向上できるのである。
In this manufacturing process, the resistive film 5 is formed by firing so that the ceramic material plate 2 has vertical and horizontal lines 3,
Since this is carried out before forming the resistive film 4, no cracks or cracks will occur in the ceramic material plate 2 when the resistive film 5 is fired and formed.
Since no large thermal stress is generated in the ceramic material plate 2 after forming the vertical and horizontal lines 3 and 4, the depth of the vertical and horizontal lines 3 and 4 can be formed deep. The end surface 1a of each insulating substrate 1 can be formed to be substantially perpendicular to the upper surface of the insulating substrate 1, and the dimensional accuracy of each insulating substrate 1 after breaking can be significantly improved.

【0015】上記の実施例は、チップ型抵抗器の製造に
適用した場合であったが、本発明は、チップ型コンデン
サやサーマルヘッド、或いは、ハイブリッドICのよう
に、絶縁基板の表面に抵抗等の素子や回路等を焼成する
ようにした電子部品一般の製造に適用できることは言う
までもない。
The above embodiment was applied to the manufacture of a chip type resistor, but the present invention can be applied to the manufacture of a chip type resistor, but the present invention can be applied to a chip type capacitor, a thermal head, or a hybrid IC, in which a resistor or the like is formed on the surface of an insulating substrate. Needless to say, the present invention can be applied to the production of electronic components in general, such as firing elements and circuits.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明にてチップ型抵抗器を製造する場合の工
程の概略を示す図である。
FIG. 1 is a diagram schematically showing the steps for manufacturing a chip resistor according to the present invention.

【図2】図1のII−II視拡大断面図である。FIG. 2 is an enlarged sectional view taken along line II-II in FIG. 1;

【図3】図5のIII −III 視断面図である。FIG. 3 is a sectional view taken along line III-III in FIG. 5;

【図4】チップ型抵抗器の従来の製造工程の概略を示す
図である。
FIG. 4 is a diagram schematically showing a conventional manufacturing process of a chip resistor.

【図5】チップ型抵抗器の従来の製造工程の改良型を示
す概略図である。
FIG. 5 is a schematic diagram illustrating an improved version of the conventional manufacturing process for chip resistors.

【符号の説明】[Explanation of symbols]

R  電子部品の一例としてのチップ型抵抗器1  絶
縁基板 2  セラミック素材板 3  縦筋目線 4  横筋目線 5  抵抗膜 6  側面電極
R Chip resistor as an example of electronic component 1 Insulating substrate 2 Ceramic material plate 3 Vertical line 4 Horizontal line 5 Resistive film 6 Side electrode

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】多数個の絶縁基板を整列して連接した状態
のセラミック素材板を製作し、このセラミック素材板に
おける各絶縁基板の上面に、抵抗等の素子や回路等を塗
着焼成にて形成し、次いで、前記セラミック素材板を、
当該セラミック素材板を各絶縁基板ごとにブレイクする
ための筋目線をレーザーの照射にて形成したのち、前記
各筋目線に沿って各絶縁基板ごとにブレイクするように
したことを特徴とするセラミック製絶縁基板を備えた電
子部品の製造方法。
Claim 1: A ceramic material plate is produced in which a large number of insulating substrates are arranged and connected, and elements such as resistors, circuits, etc. are coated and fired on the top surface of each insulating substrate in this ceramic material plate. forming the ceramic material plate, and then forming the ceramic material plate,
A ceramic product characterized in that the ceramic material plate is formed with a laser irradiation to form lines for breaking each insulating substrate, and then breaks are made for each insulating substrate along each of the lines. A method for manufacturing electronic components with an insulating substrate.
JP3014681A 1991-01-14 1991-01-14 Manufacture of electronic parts equipped with ceramic insulating substrate Pending JPH04241401A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3014681A JPH04241401A (en) 1991-01-14 1991-01-14 Manufacture of electronic parts equipped with ceramic insulating substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3014681A JPH04241401A (en) 1991-01-14 1991-01-14 Manufacture of electronic parts equipped with ceramic insulating substrate

Publications (1)

Publication Number Publication Date
JPH04241401A true JPH04241401A (en) 1992-08-28

Family

ID=11867957

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3014681A Pending JPH04241401A (en) 1991-01-14 1991-01-14 Manufacture of electronic parts equipped with ceramic insulating substrate

Country Status (1)

Country Link
JP (1) JPH04241401A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0757972A (en) * 1993-08-09 1995-03-03 Koa Corp Chip type cr network element and manufacture thereof
JP2003086408A (en) * 2001-09-11 2003-03-20 Mitsubishi Materials Corp Method of manufacturing chip resistor
JP2007173627A (en) * 2005-12-22 2007-07-05 Ngk Spark Plug Co Ltd Capacitor incorporated into wiring board, and manufacturing method thereof
JP2015023095A (en) * 2013-07-17 2015-02-02 コーア株式会社 Manufacturing method of chip resistor

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5861602A (en) * 1981-10-09 1983-04-12 富士通株式会社 Method of producing resistor part

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5861602A (en) * 1981-10-09 1983-04-12 富士通株式会社 Method of producing resistor part

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0757972A (en) * 1993-08-09 1995-03-03 Koa Corp Chip type cr network element and manufacture thereof
JP2003086408A (en) * 2001-09-11 2003-03-20 Mitsubishi Materials Corp Method of manufacturing chip resistor
JP2007173627A (en) * 2005-12-22 2007-07-05 Ngk Spark Plug Co Ltd Capacitor incorporated into wiring board, and manufacturing method thereof
JP2015023095A (en) * 2013-07-17 2015-02-02 コーア株式会社 Manufacturing method of chip resistor
CN105393316A (en) * 2013-07-17 2016-03-09 兴亚株式会社 Chip-resistor manufacturing method

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