JPH0474863B2 - - Google Patents
Info
- Publication number
- JPH0474863B2 JPH0474863B2 JP62271137A JP27113787A JPH0474863B2 JP H0474863 B2 JPH0474863 B2 JP H0474863B2 JP 62271137 A JP62271137 A JP 62271137A JP 27113787 A JP27113787 A JP 27113787A JP H0474863 B2 JPH0474863 B2 JP H0474863B2
- Authority
- JP
- Japan
- Prior art keywords
- mounting
- circuit board
- electrode
- protruding
- electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H10W72/012—
-
- H10W72/072—
-
- H10W72/536—
-
- H10W72/5363—
Landscapes
- Wire Bonding (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62271137A JPH01112743A (ja) | 1987-10-27 | 1987-10-27 | Ic実装用回路基板 |
| DE3817600A DE3817600C2 (de) | 1987-05-26 | 1988-05-24 | Verfahren zur Herstellung einer Halbleitervorrichtung mit einem keramischen Substrat und einem integrierten Schaltungskreis |
| FR8806997A FR2617335B1 (fr) | 1987-05-26 | 1988-05-26 | Substrat de connexion en ceramique muni de protuberances de raccordement a la pastille de circuit integre |
| US07/504,028 US5126818A (en) | 1987-05-26 | 1990-04-02 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62271137A JPH01112743A (ja) | 1987-10-27 | 1987-10-27 | Ic実装用回路基板 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01112743A JPH01112743A (ja) | 1989-05-01 |
| JPH0474863B2 true JPH0474863B2 (cg-RX-API-DMAC10.html) | 1992-11-27 |
Family
ID=17495831
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62271137A Granted JPH01112743A (ja) | 1987-05-26 | 1987-10-27 | Ic実装用回路基板 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01112743A (cg-RX-API-DMAC10.html) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005347299A (ja) | 2004-05-31 | 2005-12-15 | Shinko Electric Ind Co Ltd | チップ内蔵基板の製造方法 |
-
1987
- 1987-10-27 JP JP62271137A patent/JPH01112743A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01112743A (ja) | 1989-05-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7161242B2 (en) | Semiconductor device, semiconductor device substrate, and manufacturing method thereof that can increase reliability in mounting a semiconductor element | |
| KR100595885B1 (ko) | 반도체장치 및 그 제조방법 | |
| JP3258764B2 (ja) | 樹脂封止型半導体装置の製造方法ならびに外部引出用電極およびその製造方法 | |
| KR100264479B1 (ko) | 범프전극의 구조와 그 형성방법 | |
| EP0690490B1 (en) | Method of making a flip chip using electrically conductive polymers and dielectrics | |
| CN101276809B (zh) | 半导体器件及其制造方法 | |
| US4466181A (en) | Method for mounting conjoined devices | |
| US6236112B1 (en) | Semiconductor device, connecting substrate therefor, and process of manufacturing connecting substrate | |
| JP2001127240A (ja) | 半導体装置の製造方法 | |
| JP2002134545A (ja) | 半導体集積回路チップ及び基板、並びにその製造方法 | |
| US11315848B2 (en) | Semiconductor device and method of manufacturing semiconductor device | |
| JPS62230027A (ja) | 半導体装置の製造方法 | |
| US6687989B1 (en) | Method for fabricating interconnect having support members for preventing component flexure | |
| JP2001156203A (ja) | 半導体チップ実装用プリント配線板 | |
| JPH09129669A (ja) | 半導体のチップと基板間の電気的連結構造 | |
| JP2951882B2 (ja) | 半導体装置の製造方法及びこれを用いて製造した半導体装置 | |
| JPH0474863B2 (cg-RX-API-DMAC10.html) | ||
| JP2002231765A (ja) | 半導体装置 | |
| JP3598189B2 (ja) | チップサイズパッケージ、その製造方法、およびその実装位置合わせの方法 | |
| JPH0410635A (ja) | フリップチップ実装方法 | |
| JPH05251513A (ja) | 半導体装置 | |
| JP2652222B2 (ja) | 電子部品搭載用基板 | |
| JP2000068271A (ja) | ウエハ装置およびチップ装置並びにチップ装置の製造方法 | |
| JP2867547B2 (ja) | 導電突起の形成方法 | |
| KR100331386B1 (ko) | 웨이퍼 레벨 패키지 |