JPH0472389B2 - - Google Patents

Info

Publication number
JPH0472389B2
JPH0472389B2 JP59215235A JP21523584A JPH0472389B2 JP H0472389 B2 JPH0472389 B2 JP H0472389B2 JP 59215235 A JP59215235 A JP 59215235A JP 21523584 A JP21523584 A JP 21523584A JP H0472389 B2 JPH0472389 B2 JP H0472389B2
Authority
JP
Japan
Prior art keywords
strip
strips
resin
lead frame
section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59215235A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6194349A (ja
Inventor
Sadao Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP21523584A priority Critical patent/JPS6194349A/ja
Publication of JPS6194349A publication Critical patent/JPS6194349A/ja
Publication of JPH0472389B2 publication Critical patent/JPH0472389B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4842Mechanical treatment, e.g. punching, cutting, deforming, cold welding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP21523584A 1984-10-16 1984-10-16 樹脂封止形半導体装置の製造方法及びその製造方法に使用するリ−ドフレ−ム Granted JPS6194349A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21523584A JPS6194349A (ja) 1984-10-16 1984-10-16 樹脂封止形半導体装置の製造方法及びその製造方法に使用するリ−ドフレ−ム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21523584A JPS6194349A (ja) 1984-10-16 1984-10-16 樹脂封止形半導体装置の製造方法及びその製造方法に使用するリ−ドフレ−ム

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP1150428A Division JPH06103728B2 (ja) 1989-06-15 1989-06-15 樹脂封止形半導体装置の製造方法
JP1150427A Division JPH0736430B2 (ja) 1989-06-15 1989-06-15 樹脂封止形半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS6194349A JPS6194349A (ja) 1986-05-13
JPH0472389B2 true JPH0472389B2 (ko) 1992-11-18

Family

ID=16668951

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21523584A Granted JPS6194349A (ja) 1984-10-16 1984-10-16 樹脂封止形半導体装置の製造方法及びその製造方法に使用するリ−ドフレ−ム

Country Status (1)

Country Link
JP (1) JPS6194349A (ko)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0736430B2 (ja) * 1989-06-15 1995-04-19 サンケン電気株式会社 樹脂封止形半導体装置の製造方法
NL9100470A (nl) * 1991-03-15 1992-10-01 Asm Fico Tooling Werkwijze en inrichting voor het uit op een leadframe opgenomen geintegreerde schakelingen vervaardigen van een enkelvoudig produkt.

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57178352A (en) * 1981-04-28 1982-11-02 Matsushita Electronics Corp Manufacture of resin sealing type semiconductor device and lead frame employed thereon

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57178352A (en) * 1981-04-28 1982-11-02 Matsushita Electronics Corp Manufacture of resin sealing type semiconductor device and lead frame employed thereon

Also Published As

Publication number Publication date
JPS6194349A (ja) 1986-05-13

Similar Documents

Publication Publication Date Title
US6187614B1 (en) Electronic component, method for making the same, and lead frame and mold assembly for use therein
KR100927319B1 (ko) 스탬핑된 리드프레임 및 그 제조 방법
EP0330512B1 (en) Producing electronic components with the aid of lead frames
JP3209696B2 (ja) 電子部品の製造方法
EP0354696A2 (en) Semiconductor device assembly comprising a lead frame structure
JP2000150765A (ja) 半導体集積回路プラスチックパッケ―ジ、およびそのパッケ―ジの製造のための超小型リ―ドフレ―ムおよび製造方法
KR100568225B1 (ko) 리드 프레임 및 이를 적용한 반도체 패키지 제조방법
US7224049B2 (en) Method of fabricating lead frame and method of fabricating semiconductor device using the same, and lead frame and semiconductor device using the same
US5508232A (en) Method of manufacturing a semiconductor device
CN110034078A (zh) 用于半导体器件的封装内嵌结构和制造方法
US11569152B2 (en) Electronic device with lead pitch gap
JPH0472389B2 (ko)
JPH0254665B2 (ko)
JPH088375A (ja) 半導体装置およびその製造に使用されるリードフレーム並びに金型
CN218101253U (zh) 用于半导体器件的预模制引线框架和半导体器件
JPH0242751A (ja) 樹脂封止形半導体装置の製造方法
JPH0242752A (ja) 樹脂封止形半導体装置の製造方法
EP4113601B1 (en) Method of manufacturing substrates for semiconductor devices, corresponding substrate and semiconductor device
JP2714002B2 (ja) 樹脂封止型半導体装置の製造方法
CN217507315U (zh) 半导体器件和引线框
KR960003854B1 (ko) 반도체 장치 제조방법
JP2000012752A (ja) リードフレームおよびそれを用いた半導体装置ならびに半導体装置の製造方法
JP4493170B2 (ja) プラスチックパッケージの製造方法
KR19980073905A (ko) 합성수지 댐바가 구비된 리드 프레임 및 그 제조방법
JPH0563937B2 (ko)