JPH045640U - - Google Patents

Info

Publication number
JPH045640U
JPH045640U JP1990045235U JP4523590U JPH045640U JP H045640 U JPH045640 U JP H045640U JP 1990045235 U JP1990045235 U JP 1990045235U JP 4523590 U JP4523590 U JP 4523590U JP H045640 U JPH045640 U JP H045640U
Authority
JP
Japan
Prior art keywords
wire bonding
metal plate
showing
semiconductor device
view
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1990045235U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990045235U priority Critical patent/JPH045640U/ja
Publication of JPH045640U publication Critical patent/JPH045640U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Description

【図面の簡単な説明】
第1図はこの考案の一実施例である半導体装置
を示す斜視図、第2図は第1図の半導体装置のダ
イボンド部を示す拡大断面図、第3図は従来の半
導体装置を示す斜視図、第4図は第3図の半導体
装置のダイボンド部を示す断面図である。 図において、1……ベースセラミツクス、2…
…メタライズパターン、3……Niめつき層、4
……Au又はAgめつき層、5……フレームセラ
ミツクス、6……外部端子、7……金属板、8…
…放熱フイン、9……半導体チツプ、10……半
田流れ、11……金属細線、12……ろう材を示
す。なお、図中、同一符号は同一、又は相当部分
を示す。

Claims (1)

    【実用新案登録請求の範囲】
  1. メタライズを施した基板上にチツプをダイボン
    ドした後、その同一メタライズパターンからコレ
    クタリード配線のためのワイヤボンドを行う際ワ
    イヤボンデイングパツド用金属板をろう付けした
    ことを特徴とする半導体パツケージ。
JP1990045235U 1990-04-27 1990-04-27 Pending JPH045640U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990045235U JPH045640U (ja) 1990-04-27 1990-04-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990045235U JPH045640U (ja) 1990-04-27 1990-04-27

Publications (1)

Publication Number Publication Date
JPH045640U true JPH045640U (ja) 1992-01-20

Family

ID=31559228

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990045235U Pending JPH045640U (ja) 1990-04-27 1990-04-27

Country Status (1)

Country Link
JP (1) JPH045640U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008244399A (ja) * 2007-03-29 2008-10-09 Nichia Corp 発光装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008244399A (ja) * 2007-03-29 2008-10-09 Nichia Corp 発光装置

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