JPS6194359U - - Google Patents

Info

Publication number
JPS6194359U
JPS6194359U JP1984180386U JP18038684U JPS6194359U JP S6194359 U JPS6194359 U JP S6194359U JP 1984180386 U JP1984180386 U JP 1984180386U JP 18038684 U JP18038684 U JP 18038684U JP S6194359 U JPS6194359 U JP S6194359U
Authority
JP
Japan
Prior art keywords
soldered
array type
opposite side
mounting surface
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984180386U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1984180386U priority Critical patent/JPS6194359U/ja
Publication of JPS6194359U publication Critical patent/JPS6194359U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Cooling Or The Like Of Electrical Apparatus (AREA)

Description

【図面の簡単な説明】
第１図はＩＣチツプを実装したこの考案のプラ
スチツク製ピングリツドアレイ型パツケージの一
実施例を示す断面図、第２図は他の実施例を示す
断面図、第３図ａ，ｂは金属環の形状を示す平面
図である。 １１，１１ａ，１１″…ガラス布基材高耐熱性
樹脂銅張積層板、１１′…封止用樹脂流出防止用
枠板、１２…ボンデイング端子、１３…回路、１
４…金属環、１５…スルホール穴、１６…ランド
、１７…リードピン、１８…金属板、１９…ダイ
パツト、２０…クリーム半田、２１…金属パツド
、２２…ＩＣチツプ、２３…ポツテイング樹脂、
２６…金属ワイヤ。

Claims (1)

  1. 【実用新案登録請求の範囲】 (1) 半導体用プラスチツク製ピングリツドアレ
    イ型パツケージにおけるＩＣチツプ搭載面の反対
    側に金属板を半田接合したことを特徴とするプラ
    スチツク製ピングリツドアレイ型パツケージ。 (2) 金属板はＩＣチツプ搭載面の反対側に形成
    した金属製パツド部に半田接合したことを特徴と
    する実用新案登録請求の範囲第１項記載のプラス
    チツク製ピングリツドアレイ型パツケージ。 (3) 金属板はＩＣチツプ搭載面の反対側周囲に
    形成した金属環に半田接合したことを特徴とする
    実用新案登録請求の範囲第１項記載のプラスチツ
    ク製ピングリツドアレイ型パツケージ。
JP1984180386U 1984-11-27 1984-11-27 Pending JPS6194359U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984180386U JPS6194359U (ja) 1984-11-27 1984-11-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984180386U JPS6194359U (ja) 1984-11-27 1984-11-27

Publications (1)

Publication Number Publication Date
JPS6194359U true JPS6194359U (ja) 1986-06-18

Family

ID=30737942

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984180386U Pending JPS6194359U (ja) 1984-11-27 1984-11-27

Country Status (1)

Country Link
JP (1) JPS6194359U (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62196855A (ja) * 1986-02-22 1987-08-31 Ibiden Co Ltd 半導体搭載用基板
JPH02278856A (ja) * 1989-04-20 1990-11-15 Nec Corp 半導体集積回路装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58159355A (ja) * 1982-03-17 1983-09-21 Nec Corp 半導体装置の製造方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58159355A (ja) * 1982-03-17 1983-09-21 Nec Corp 半導体装置の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62196855A (ja) * 1986-02-22 1987-08-31 Ibiden Co Ltd 半導体搭載用基板
JPH02278856A (ja) * 1989-04-20 1990-11-15 Nec Corp 半導体集積回路装置

Similar Documents

Publication Publication Date Title
KR100294719B1 (ko) 수지밀봉형 반도체장치 및 그 제조방법, 리드프레임
KR100214561B1 (ko) 버틈 리드 패키지
US6104085A (en) Semiconductor device and method of producing the same
KR100192760B1 (ko) 메탈 캐리어 프레임을 이용한 bag반도체 패키지의 제조방법 및 그반도체 패키지
US5241133A (en) Leadless pad array chip carrier
US5653891A (en) Method of producing a semiconductor device with a heat sink
KR100214549B1 (ko) 버텀리드 반도체 패키지
KR100846939B1 (ko) 마이크로 리드프레임패키지 및 마이크로 리드프레임패키지제조방법
JP2569400B2 (ja) 樹脂封止型半導体装置の製造方法
KR930017154A (ko) 반도체 패키지
JPS6194359U (ja)
JP2677242B2 (ja) 半導体装置及びその製造方法
KR200179419Y1 (ko) 반도체패키지
JPH0333068Y2 (ja)
JPH08181168A (ja) 半導体装置
JPH0547464Y2 (ja)
KR930009028A (ko) 인터컨넥트 리드를 이용한 반도체 패키지 및 그 제조방법
KR0147156B1 (ko) 필름 온 칩 패키지와 그 제조방법
JPS6032769Y2 (ja) 半導体素子
KR960002344Y1 (ko) 반도체 패키지
KR200164522Y1 (ko) Ic 카드 패키지
JPS63160262A (ja) リ−ドフレ−ムおよびそれを用いた半導体装置
JPS6032770Y2 (ja) 半導体素子
JP3059007U (ja) 半導体パッケージ
JPH0343738U (ja)